On 10/27/2017 2:36 PM, Koul, Vinod wrote:
>> On 10/26/2017 1:01 PM, Radu Alexe wrote:
>>> This patch-set introduces a new DMA memcpy driver based on the DMA
>>> capabilities of the CAAM crypto engine. Because of this dependency the
>>> included commits target various parts of the kernel tree.
>> I
On 10/26/2017 1:01 PM, Radu Alexe wrote:
> This patch-set introduces a new DMA memcpy driver based on the DMA
> capabilities of the CAAM crypto engine. Because of this dependency the
> included commits target various parts of the kernel tree.
I don't see the patches on any of the mail lists.
If
caam/qi frontend (i.e. caamalg_qi) mustn't be used in case it runs on a
DPAA2 part (this could happen when using a multiplatform kernel).
Fixes: 297b9cebd2fc ("crypto: caam/jr - add support for DPAA2 parts")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
If this
From: Radu Alexe <radu.al...@nxp.com>
Fixes: 3ebfa92f49a6 ("crypto: caam - Add new macros for building extended SEC
descriptors (> 64 words)")
Signed-off-by: Radu Alexe <radu.al...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caa
Dan steps down as caam maintainer, being replaced by Aymen.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 92df4e80a170..bb3016c2c342 100644
--- a/MAINTAINERS
+++ b/MAINT
On 10/12/2017 12:49 PM, Herbert Xu wrote:
> On Thu, Oct 12, 2017 at 09:39:34AM +0000, Horia Geantă wrote:
>>
>> Taking ascii art from crypto API docs:
>>
>> DATA ---.
>> v
>> .init() -> .update() ->
On 10/12/2017 9:44 AM, Herbert Xu wrote:
> On Wed, Oct 11, 2017 at 12:36:11PM +0000, Horia Geantă wrote:
>> Hi Herbert,
>>
>> I am evaluating whether ahash implementation in caam crypto driver
>> behaves correctly.
>> One thing I've noticed is that fo
Hi Herbert,
I am evaluating whether ahash implementation in caam crypto driver
behaves correctly.
One thing I've noticed is that for each ahash tfm there is support for
at most two in-flight requests, and I would like to know whether this is
an issue or not.
In this context, could you please
On 9/6/2017 1:14 PM, Gilad Ben-Yossef wrote:
> On Tue, Sep 5, 2017 at 6:33 PM, Horia Geantă <horia.gea...@nxp.com> wrote:
>> On 8/14/2017 10:59 AM, Gilad Ben-Yossef wrote:
>>> Hi,
>>>
>>> On Thu, Jun 29, 2017 at 1:19 PM, Horia Geantă <horia.gea...@nxp
On 8/14/2017 10:59 AM, Gilad Ben-Yossef wrote:
> Hi,
>
> On Thu, Jun 29, 2017 at 1:19 PM, Horia Geantă <horia.gea...@nxp.com> wrote:
>> On 6/28/2017 4:42 PM, Horia Geantă wrote:
>>> On 6/28/2017 4:27 PM, David Gstir wrote:
>>>> Certain ciph
sta...@vger.kernel.org>
Fixes: 6c3af9559352 ("crypto: caam - add support for LS1021A")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/Kconfig | 5 +---
drivers/crypto/caam/ctrl.c | 19 ---
drivers/cr
From: Radu Alexe <radu.al...@nxp.com>
Order preservation is a feature that will be supported
in dpni, dpseci and dpci devices.
This is a preliminary patch for the changes to be
introduced in the corresponding drivers.
Signed-off-by: Radu Alexe <radu.al...@nxp.com>
Signed-off-by:
her accelerators
can make use of them.
While here, fix the values of FD_CTRL_FSE and FD_CTRL_FAERR, which
were shifted off by one bit.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c | 8 +++-
drivers/staging/fsl-dpaa2
FLE case)
- FLC[5:0] not used for stashing
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/staging/fsl-mc/include/dpaa2-fd.h | 243 ++
1 file changed, 243 insertions(+)
diff --git a/drivers/staging/fsl-mc/include/dpaa2-fd.h
b/drivers/staging/fsl-m
. It will be built only if dependency
on DPIO (CONFIG_FSL_MC_DPIO) is satisfied.
Thanks,
Horia
Horia Geantă (9):
staging: fsl-mc: dpio: add frame list format support
staging: fsl-mc: dpio: add congestion notification support
staging: fsl-dpaa2/eth: move generic FD defines to DPIO
crypto: caam
Add support to submit the following ablkcipher algorithms
via the DPSECI backend:
cbc({aes,des,des3_ede})
ctr(aes), rfc3686(ctr(aes))
xts(aes)
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/Kconfig | 1 +
drivers/crypto/caam/caamalg_qi2.c
Add support to translate error codes returned by QI v2, i.e.
Queue Interface present on DataPath Acceleration Architecture
v2 (DPAA2).
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/error.c | 75 +++--
drivers/crypt
Enable CAAM (Cryptographic Accelerator and Assurance Module) driver
for QorIQ Data Path Acceleration Architecture (DPAA) v2.
It handles DPSECI (Data Path SEC Interface) DPAA2 objects that sit
on the Management Complex (MC) fsl-mc bus.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
Add the low-level API that allows to manage DPSECI DPAA2 objects
that sit on the Management Complex (MC) fsl-mc bus.
The API is compatible with MC firmware 10.2.0+.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/dpseci.c
(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/Makefile |
Update gcm(aes) descriptors (generic, rfc4106 and rfc4543) such that
they would also work when submitted via the QI interface.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg.c | 19 +++--
drivers/crypto/caam/caamalg_desc.c
.@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/staging/fsl-mc/include/dpaa2-io.h | 43 +++
1 file changed, 43 insertions(+)
diff --git a/drivers/staging/fsl-mc/include/dpaa2-io.h
b/drivers/staging/fsl-mc/include/dpaa2-io.h
On 7/25/2017 4:50 PM, Shawn Guo wrote:
> On Tue, Jul 25, 2017 at 01:31:52PM +0000, Horia Geantă wrote:
>> On 7/25/2017 4:22 PM, Shawn Guo wrote:
>>> On Tue, Jul 18, 2017 at 06:30:46PM +0300, Horia Geantă wrote:
>>>> This patch set adds support for CAAM's legac
On 8/3/2017 6:17 AM, Herbert Xu wrote:
> On Wed, Aug 02, 2017 at 02:03:14PM +0000, Horia Geantă wrote:
>>
>> Take CAAM's engine HWRNG: it can work both as a TRNG and as a
>> TRNG-seeded DRBG (that's how it's currently configured).
>> IIUC, both setups are fit as
On 7/20/2017 4:08 PM, Harald Freudenberger wrote:
> On 07/19/2017 08:13 PM, Oleksij Rempel wrote:
>> On Wed, Jul 19, 2017 at 04:53:21PM +0000, Horia Geantă wrote:
>>> On 7/19/2017 7:32 PM, Oleksij Rempel wrote:
>>>> On Wed, Jul 19, 2017 at 12:49:47PM +, Horia Ge
m <feste...@gmail.com>
Acked-by: Horia Geantă <horia.gea...@nxp.com>
Thanks,
Horia
On 7/31/2017 3:22 PM, Fabio Estevam wrote:
> Most of the dentry members from structure caam_drv_private
> are never used at all, so it is safe to remove them.
>
> Since debugfs_remove_recursive() is called, we don't need the
> file entries.
>
> Signed-off-by: Fabio Estevam
>
On 7/27/2017 2:19 AM, Logan Gunthorpe wrote:
> Changes since v4:
> - Add functions so the powerpc implementation of iomap.c compiles. (As
> noticed by Horia)
Tested-by: Horia Geantă <horia.gea...@nxp.com>
more exactly: crypto self-tests pass on CAAM crypto engine
on NXP platforms
On 7/30/2017 1:55 AM, Fabio Estevam wrote:
> From: Fabio Estevam
>
> 'qi_congested' member from structure caam_drv_private
> is never used at all, so it is safe to remove it.
Agree, though I would remove all the other dentry members not currently
used - since
On 9/1/2016 1:13 PM, Herbert Xu wrote:
> On Mon, Aug 29, 2016 at 05:11:24PM +0300, Horia Geantă wrote:
>> (a)blkcipher is being deprecated in favcur of skcipher.
>> The main difference is that IV generation is moved out
>> of crypto algorithms.
>>
>> Signe
On 7/25/2017 4:22 PM, Shawn Guo wrote:
> On Tue, Jul 18, 2017 at 06:30:46PM +0300, Horia Geantă wrote:
>> This patch set adds support for CAAM's legacy Job Ring backend / interface
>> on platforms having DPAA2 (Datapath Acceleration Architecture v2), like
>> LS1088A or LS2088
On 7/20/2017 1:27 PM, Horia Geantă wrote:
> On 7/19/2017 7:04 PM, Logan Gunthorpe wrote:
>>
>>
>> On 18/07/17 11:57 PM, Michael Ellerman wrote:
>>> Seems fair enough, have you tested it at all?
>>
>> It's only been compile tested and the kbuild robo
On 7/19/2017 7:04 PM, Logan Gunthorpe wrote:
>
>
> On 18/07/17 11:57 PM, Michael Ellerman wrote:
>> Seems fair enough, have you tested it at all?
>
> It's only been compile tested and the kbuild robot has beat up on it a bit.
>
Looks like the patch set does not compile on PPC (.config
On 7/19/2017 7:32 PM, Oleksij Rempel wrote:
> On Wed, Jul 19, 2017 at 12:49:47PM +0000, Horia Geantă wrote:
>> On 7/19/2017 10:45 AM, Oleksij Rempel wrote:
>>> According documentation, it is NIST certified TRNG.
>>> So, set high quality to let the HWRNG
tcrypt: setkey() failed flags=20
[...]
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
crypto/tcrypt.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c
index 0dd6a432d6ca..0022a18d36ee 100644
--- a/crypto/tcrypt.c
+++ b/
On 7/19/2017 10:45 AM, Oleksij Rempel wrote:
> According documentation, it is NIST certified TRNG.
> So, set high quality to let the HWRNG framework automatically use it.
>
> Signed-off-by: Oleksij Rempel
> ---
> drivers/crypto/caam/caamrng.c | 6 ++
> 1 file
Hi,
AFAICS, IEEE 1619-2007 standard mentions only XTS-AES-128 and
XTS-AES-256, meaning that the keys should be either 256 or 512 bits.
Further, NIST SP800-38E mentions that an implementation may restrict
support to only one of XTS-AES-{128,256}, but does not explicitly allow
other cipher suites.
aliases node is identical for all boards, thus move it
to the common file ls208xa.dtsi.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 5 -
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 5 -
arch/arm64/boot/dts/fre
LS208xA has a SEC v5.1 security engine.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 41 ++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
b/arch/arm64/bo
Add support for using the caam/jr backend on DPAA2-based SoCs.
These have some particularities we have to account for:
-HW S/G format is different
-Management Complex (MC) firmware initializes / manages (partially)
the CAAM block: MCFGR, QI enablement in QICTL, RNG
Signed-off-by: Horia Geantă
,
Horia
Horia Geantă (4):
crypto: caam/jr - add support for DPAA2 parts
arm64: dts: freescale: ls208xa: share aliases node
arm64: dts: freescale: ls208xa: add crypto node
arm64: dts: freescale: ls1088a: add crypto node
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 43
LS1088A has a SEC v5.3 security engine.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 43 ++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/bo
14c/0x308
> [] cryptomgr_test+0x50/0x58
> [] kthread+0xdc/0xf0
> [] ret_from_fork+0x10/0x50
>
> And check where the function kill_fq() is called to remove
> the additional kfree to qman_fq and avoid re-calling the released qman_fq.
>
> Signed-off-by: Xulin Sun <xulin@windriver.com>
Acked-by: Horia Geantă <horia.gea...@nxp.com>
Thanks,
Horia
On 7/11/2017 9:21 AM, Xulin Sun wrote:
> kill_fq removes a complete frame queue, it needs to free the qman_fq
> in the last. Else kmemleak will report the below warning:
>
> unreferenced object 0x800073085c80 (size 128):
> comm "cryptomgr_test", pid 199, jiffies 4294937850 (age 67.840s)
>
sg_to_sec4_sg_len() is no longer used since
commit 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Its functionality has been superseded by the usage of sg_nents_for_len()
returning the number of S/G entries corresponding to the provided length.
Signed-off-by: Ho
From: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/ctrl.c | 1 -
drivers/crypto/caam/intern.h | 3 ---
2 files changed, 4 deletions(-)
diff --gi
From: Tudor Ambarus <tudor-dan.amba...@nxp.com>
SELF condition has no meaning for the SERIAL sharing since the jobs
are executed in the same DECO.
Signed-off-by: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/c
rt")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/qi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c
index 01284faeee69..1c1f3faf6394 100644
--- a/drivers/crypto/caam/qi.c
+++ b/drivers/crypto/caam/qi
s/desi/des for echainiv(authenc(hmac(sha256),cbc(des))) alg.
Cc: <sta...@vger.kernel.org>
Fixes: b189817cf7894 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg_qi.c | 2 +-
1 fil
2.y.
Patches 8-13 contain code clean-up.
Thanks,
Horia
Horia Geantă (11):
crypto: caam/qi - fix typo in authenc alg driver name
crypto: caam/qi - fix compilation with DEBUG enabled
crypto: caam/qi - fix compilation with
CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
crypto: caam/qi - properly set IV af
sg_sw_sec4.h header is not used by caam/qi, thus remove its inclusion.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg_qi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypto/caam/caamalg_qi.c
index 82e9f9
Change log level for some prints from dev_info() to dev_dbg(), low-level
details are needed only when debugging.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/qi.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/caam/
Clean up the code, as indicated by Coccinelle.
Cc: Julia Lawall <julia.law...@lip6.fr>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
v2: fix author - replace my Freescale address with
corresponding NXP one
drivers/crypto/caam/caamrng.c | 6 +-
1 file changed, 1 ins
Associated data (AD) length is read by CAAM from an S/G entry
that is initially filled by the GPP.
Accordingly, AD length has to be stored in CAAM endianness.
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.g
robot <fengguang...@intel.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/qi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c
index 1990ed460c46..53aed5816416 100644
--- a/drivers/crypto/caam/qi
lgorithms")
Suggested-by: David Gstir <da...@sigma-star.at>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg_qi.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypt
consistent in terms of
exported symbols namespace (caam_*)
Cc: <sta...@vger.kernel.org>
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg.c| 66 +-
fc
==
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
v2: add missing check in ablkcipher_giv_edesc_alloc(),
to make sure number of reserved S/G entries is not overflown
drivers/crypt
On 7/7/2017 4:06 PM, Horia Geantă wrote:
> For more than 16 S/G entries, driver currently corrupts memory
> on ARMv8, see below KASAN log.
> Note: this does not reproduce on PowerPC due to different (smaller)
> cache line size - 64 bytes on PPC vs. 128 bytes on ARMv8.
>
> One su
- would be to flush the job
ring (aborting *all* in-progress jobs).
Cc: <sta...@vger.kernel.org>
Fixes: 045e36780f115 ("crypto: caam - ahash hmac support")
Fixes: 4c1ec1f930154 ("crypto: caam - refactor key_gen, sg")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
On 7/7/2017 4:06 PM, Horia Geantă wrote:
> From: Horia Geantă <horia.gea...@freescale.com>
>
> Clean up the code, as indicated by Coccinelle.
>
> Cc: Julia Lawall <julia.law...@lip6.fr>
> Signed-off-by: Horia Geantă <horia.gea...@freescale.com>
> Signed-off
sg_sw_sec4.h header is not used by caam/qi, thus remove its inclusion.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg_qi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypto/caam/caamalg_qi.c
index e84c19
From: Tudor Ambarus <tudor-dan.amba...@nxp.com>
SELF condition has no meaning for the SERIAL sharing since the jobs
are executed in the same DECO.
Signed-off-by: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/c
From: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/ctrl.c | 1 -
drivers/crypto/caam/intern.h | 3 ---
2 files changed, 4 deletions(-)
diff --gi
s/desi/des for echainiv(authenc(hmac(sha256),cbc(des))) alg.
Cc: <sta...@vger.kernel.org>
Fixes: b189817cf7894 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg_qi.c | 2 +-
1 fil
From: Horia Geantă <horia.gea...@freescale.com>
Clean up the code, as indicated by Coccinelle.
Cc: Julia Lawall <julia.law...@lip6.fr>
Signed-off-by: Horia Geantă <horia.gea...@freescale.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caam
Change log level for some prints from dev_info() to dev_dbg(), low-level
details are needed only when debugging.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/qi.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/caam/
sg_to_sec4_sg_len() is no longer used since
commit 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Its functionality has been superseded by the usage of sg_nents_for_len()
returning the number of S/G entries corresponding to the provided length.
Signed-off-by: Ho
rt")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/qi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c
index 01284faeee69..1c1f3faf6394 100644
--- a/drivers/crypto/caam/qi.c
+++ b/drivers/crypto/caam/qi
fc
==
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg_qi.c | 24 +++-
drivers/crypto/caam/qi.c | 3 ---
drivers/crypto/caam/qi.h
Associated data (AD) length is read by CAAM from an S/G entry
that is initially filled by the GPP.
Accordingly, AD length has to be stored in CAAM endianness.
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.g
lgorithms")
Suggested-by: David Gstir <da...@sigma-star.at>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg_qi.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypt
robot <fengguang...@intel.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/qi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c
index 1990ed460c46..53aed5816416 100644
--- a/drivers/crypto/caam/qi
consistent in terms of
exported symbols namespace (caam_*)
Cc: <sta...@vger.kernel.org>
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg.c| 66 +-
- Queue Manager), there's no need
to be applied on v4.12.y.
Patches 8-13 contain code clean-up.
Thanks,
Horia
Horia Geantă (11):
crypto: caam/qi - fix typo in authenc alg driver name
crypto: caam/qi - fix compilation with DEBUG enabled
crypto: caam/qi - fix compilation
On 6/29/2017 7:10 PM, Logan Gunthorpe wrote:
> From: Horia Geantă <horia.gea...@nxp.com>
>
> We can now make use of the io-64-nonatomic-hi-lo header to always
Typo: we are using io-64-nonatomic-lo-hi, not hi-lo.
Thanks,
Horia
On 6/28/2017 4:42 PM, Horia Geantă wrote:
> On 6/28/2017 4:27 PM, David Gstir wrote:
>> Certain cipher modes like CTS expect the IV (req->info) of
>> ablkcipher_request (or equivalently req->iv of skcipher_request) to
>> contain the last ciphertext block when the {en
On 6/28/2017 7:51 PM, Logan Gunthorpe wrote:
>
>
> On 28/06/17 04:20 AM, Arnd Bergmann wrote:
>> On Wed, Jun 28, 2017 at 1:02 AM, Logan Gunthorpe wrote:
>>> #include
>>> #include
>>> -#include
>>> +#include
>>
>> Here you include the hi-lo variant unconditionally.
>>
e in commit
> 0605c41cc53ca ("crypto: cts - Convert to skcipher")
>
> Cc: <sta...@vger.kernel.org> # 4.8+
> Signed-off-by: David Gstir <da...@sigma-star.at>
Reviewed-by: Horia Geantă <horia.gea...@nxp.com>
Thanks,
Horia
On 6/19/2017 1:31 PM, Horia Geantă wrote:
> On 6/2/2017 3:25 PM, David Gstir wrote:
>> Certain cipher modes like CTS expect the IV (req->info) of
>> ablkcipher_request (or equivalently req->iv of skcipher_request) to
>> contain the last ciphertext block when the {en
Now that ioread64 and iowrite64 are always available we don't
need the ugly ifdefs to change their implementation when they
are not.
Signed-off-by: Logan Gunthorpe <log...@deltatee.com>
Cc: Horia Geantă <horia.gea...@nxp.com>
Cc: Dan Douglass <dan.dougl...@nxp.com>
Cc
return ((u64)rd_reg32((u32 __iomem *)(reg)) << 32 |
- (u64)rd_reg32((u32 __iomem *)(reg) + 1));
+ return ioread64be(reg);
}
-#endif /* CONFIG_64BIT */
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
#ifdef CONFIG_SOC_IMX7D
> Signed-off-by: Logan Gunth
On 6/2/2017 3:25 PM, David Gstir wrote:
> Certain cipher modes like CTS expect the IV (req->info) of
> ablkcipher_request (or equivalently req->iv of skcipher_request) to
> contain the last ciphertext block when the {en,de}crypt operation is done.
> This is currently not the case for the CAAM
.
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg.c| 7 +++
drivers/crypto/caam/caamalg_qi.c | 10 --
drivers/crypto/caam/caamhash.c | 32
drivers/crypto/caam/caampkc.c| 4 ++--
4 files changed, 25 inse
Link: http://lkml.kernel.org/g/20170602122446.2427-1-da...@sigma-star.at
Cc: <sta...@vger.kernel.org> # 4.8+
Reported-by: David Gstir <da...@sigma-star.at>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caamalg.c | 3 +--
1 file changed, 1 insertion(+), 2 deleti
On 6/16/2017 11:00 AM, Herbert Xu wrote:
> On Fri, Jun 16, 2017 at 07:57:00AM +0000, Horia Geantă wrote:
>>
>> Commit 0605c41cc53ca ("crypto: cts - Convert to skcipher") appends
>> CRYPTO_TFM_REQ_MAY_BACKLOG to the original crypto request flags for the
>> last
On 6/15/2017 5:57 PM, Horia Geantă wrote:
> On 6/2/2017 3:25 PM, David Gstir wrote:
>> Hi!
>>
>> While testing fscrypt's filename encryption, I noticed that the
>> implementation
>> of cts(cbc(aes)) is broken when the CAAM hardware crypto driver i
On 6/2/2017 3:25 PM, David Gstir wrote:
> Hi!
>
> While testing fscrypt's filename encryption, I noticed that the implementation
> of cts(cbc(aes)) is broken when the CAAM hardware crypto driver is enabled.
> Some digging showed that the refactoring of crypto/cts.c in v4.8
> (commit
On 5/25/2017 10:18 AM, Tudor Ambarus wrote:
> Rename ecdh_make_pub_key() to ecc_make_pub_key().
> This function might as well be used by ecdsa.
Where exactly is ecdsa used in the kernel?
https://www.mail-archive.com/linux-crypto@vger.kernel.org/msg23235.html
Thanks,
Horia
or the
> AEAD size for AES256 + HMAC(SHA512).
>
> Cc: <sta...@vger.kernel.org> # 3.6+
> Fixes: 357fb60502ede ("crypto: talitos - add sha224, sha384 and sha512 to
> existing AEAD algorithms")
> Signed-off-by: Martin Hicks <m...@bork.org>
Acked-by: Horia Geantă <horia.gea...@nxp.com>
Thanks,
Horia
On 4/27/2017 6:46 PM, Martin Hicks wrote:
>
> The max keysize for both of these is 128, not 96. Before, with keysizes
> over 96, the memcpy in ahash_setkey() would overwrite memory beyond the
> key field.
>
While here, what about aead_setkey()?
AFAICT, TALITOS_MAX_KEY_SIZE value has been
t; speed tests do.
>
> Signed-off-by: Gilad Ben-Yossef <gi...@benyossef.com>
> Reported-by: Ofir Drang <ofir.dr...@arm.com>
Reviewed-by: Horia Geantă <horia.gea...@nxp.com>
I've also noticed this in CAAM accelerator - spin_unlock_bh() called
from caam_jr_enqueue() co
From: Radu Alexe <radu.al...@nxp.com>
This function will be used into further patches.
Signed-off-by: Radu Alexe <radu.al...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caampkc.c | 13 +
1 file changed, 9 insertions(+), 4
This patch set adds support for the second and third RSA private key
representations and extends caampkc to use the fastest key when all related
components are present in the private key.
Additionally a rsa tcrypt test has been added.
Radu Alexe (4):
crypto: tcrypt - include rsa test
crypto:
From: Tudor Ambarus <tudor-dan.amba...@nxp.com>
The function returns NULL if buf is composed only of zeros.
Signed-off-by: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caampkc.c | 2 ++
1 file changed, 2 i
elated components are present in the private key.
Signed-off-by: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Radu Alexe <radu.al...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caampkc.c | 219 ++
;
Signed-off-by: Radu Alexe <radu.al...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
drivers/crypto/caam/caampkc.c | 231 ++---
drivers/crypto/caam/caampkc.h | 38 +++
drivers/crypto/caam/pdb.h | 29 ++
drivers/cryp
From: Radu Alexe <radu.al...@nxp.com>
Signed-off-by: Radu Alexe <radu.al...@nxp.com>
Signed-off-by: Tudor Ambarus <tudor-dan.amba...@nxp.com>
Signed-off-by: Horia Geantă <horia.gea...@nxp.com>
---
crypto/tcrypt.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion
("crypto: caam - add Queue Interface (QI) backend
> support")
> Signed-off-by: Wei Yongjun <weiyongj...@huawei.com>
Acked-by: Horia Geantă <horia.gea...@nxp.com>
Thanks,
Horia
On 4/5/2017 5:14 PM, Herbert Xu wrote:
> On Mon, Apr 03, 2017 at 06:12:04PM +0300, Horia Geantă wrote:
>> The way Job Ring platform devices are created and released does not
>> allow for multiple create-release cycles.
>>
>> JR0 Platform device creation error
>> J
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