-Original Message-
From: Jarod Wilson [mailto:ja...@redhat.com]
Sent: Tuesday, January 13, 2015 1:17 PM
On Sun, Jan 11, 2015 at 11:48:08PM -0500, Timothy McCaffrey wrote:
These patches fix the RFC4106 implementation in the aesni-intel module so
it
supports 192 256 bit keys.
On Monday, January 12, 2015 1:07 AM, Herbert Xu wrote:
On Sun, Jan 11, 2015 at 11:48:08PM -0500, Timothy McCaffrey wrote:
This patch has been tested with Sandy Bridge and Haswell processors. With
128
bit keys and input buffers 512 bytes a slight performance degradation was
noticed (~1%).
Thanks.
I'll get the revision for glue.c done ( and the e-mail problem fixed, probably
from a different address) soon.
- Tim
-Original Message-
From: Tim Chen [mailto:tim.c.c...@linux.intel.com]
Sent: Monday, March 10, 2014 7:11 PM
To: McCaffrey, Timothy M
Cc: herb
Is there any possibility of a register dump at the time of the panic?
- Tim
-Original Message-
From: Tim Chen [mailto:tim.c.c...@linux.intel.com]
Sent: Friday, March 07, 2014 7:42 PM
To: McCaffrey, Timothy M
Cc: herb...@gondor.apana.org.au; linux-crypto@vger.kernel.org; James
). Perhaps the glue code needs to double check the
keysize before calling the asm code?
- Tim
-Original Message-
From: Tim Chen [mailto:tim.c.c...@linux.intel.com]
Sent: Friday, March 07, 2014 7:42 PM
To: McCaffrey, Timothy M
Cc: herb...@gondor.apana.org.au; linux-crypto
]
Sent: Friday, March 07, 2014 8:53 PM
To: McCaffrey, Timothy M
Cc: herb...@gondor.apana.org.au; linux-crypto@vger.kernel.org; James Guilford;
Vinodh Gopal
Subject: RE: [PATCH 2/2] Crypto: Add support for 192 256 bit keys to AESNI
RFC4106 - fixed whitespace
On Fri, 2014-03-07 at 19:40 -0600
I think this should work.
diff --git a/arch/x86/crypto/aesni-intel_asm.S
b/arch/x86/crypto/aesni-intel_asm.S
index 477e9d7..5855172 100644
--- a/arch/x86/crypto/aesni-intel_asm.S
+++ b/arch/x86/crypto/aesni-intel_asm.S
@@ -32,12 +32,23 @@
#include linux/linkage.h
#include asm/inst.h
+/*
+*
...@linux.intel.com]
Sent: Monday, March 03, 2014 5:23 PM
To: McCaffrey, Timothy M
Cc: herb...@gondor.apana.org.au; linux-crypto@vger.kernel.org; James Guilford;
Vinodh Gopal
Subject: Re: [PATCH 1/2] Crypto: Add support for 192 256 bit keys to AESNI
RFC4106
On Fri, 2014-02-28 at 17:00 -0600, McCaffrey
These patches fix the RFC4106 implementation in the aesni-intel module so it
supports 192 256 bit keys.
Since AVX was recently added to this module, and this patch only affects the
SSE implementation, changes
were also made to use the SSE version if key sizes other than 128 are specified.
See comments in part 1.
Signed off by: timothy.mccaff...@unisys.com
diff --git a/arch/x86/crypto/aesni-intel_asm.S
b/arch/x86/crypto/aesni-intel_asm.S
index 477e9d7..5855172 100644
--- a/arch/x86/crypto/aesni-intel_asm.S
+++ b/arch/x86/crypto/aesni-intel_asm.S
@@ -32,12 +32,23 @@
#include
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