nt in case of error).
- Then all other cases are automatically replaced by using coccinelle.
This series covers manual replacements.
[1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy
Romain Perier (20):
cgroup: Manual replacement of the deprecated strlcpy() with r
replaces all calls to strlcpy that handle the return values
by the corresponding strscpy calls with new handling of the return
values (as it is quite different between the two functions).
[1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy
Signed-off-by: Romain Perier
omap - move clock related code to omap_rng_probe()
>
> drivers/char/hw_random/omap-rng.c | 36 +---
> 1 file changed, 25 insertions(+), 11 deletions(-)
For the whole series,
Reviewed-by: Romain Perier
computed is not updated into the hash engine. It leads to
non-deterministic corrupted digest results.
Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O operations to step
functions")
Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
Cc:
---
Changes in v2:
- Moved the
Hi,
Le 14/12/2016 à 14:39, Boris Brezillon a écrit :
Nit: can you move the above code in a function called
mv_cesa_ahash_dma_step()?
Sure
+ }
else
mv_cesa_ahash_std_step(ahashreq);
I'm pretty sure checkpatch complains here ;-).
Probably :P
I will fix t
computed is not updated into the hash engine. It leads to
non-deterministic corrupted digest results.
Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O operat...")
Signed-off-by: Romain Perier
Cc:
---
drivers/crypto/marvell/cesa.h | 3 ++-
drivers/crypto/marvell/h
sts, even if this one is a fragment of the initial req and is
re-launched. This might corrupt the context of the request in some cases.
Romain Perier (2):
crypto: marvell - Don't copy hash operation twice into the SRAM
crypto: marvell - Don't corrupt state of an STD req for re-step
the function to copy the state only on the first
step.
Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O op...")
Signed-off-by: Romain Perier
Cc:
---
drivers/crypto/marvell/hash.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/mar
No need to copy the template of an hash operation twice into the SRAM
from the step function.
Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...")
Signed-off-by: Romain Perier
Cc:
---
drivers/crypto/marvell/hash.c | 3 ---
1 file changed, 3 deletions(-)
di
No need to copy the template of an hash operation twice into the SRAM
from the step function.
Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...")
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/hash.c | 3 ---
1 file changed, 3 deletions(-)
diff --git
the request is launched for the first time.
Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O op...")
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/hash.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/marvell/hash.c b/d
sts , even if this one is re-launched. This might corrupt
the context of the request in some cases.
Romain Perier (2):
crypto: marvell - Don't copy hash operation twice into the SRAM
crypto: marvell - Don't corrupt state of an STD req for re-stepped
ahash
drivers/crypto/marvel
Hello,
Le 02/12/2016 à 09:58, Romain Perier a écrit :
Hi,
Le 01/12/2016 à 17:27, Gregory CLEMENT a écrit :
Hi Romain,
On jeu., déc. 01 2016, Romain Perier
wrote:
No need to copy the template of an hash operation twice into the SRAM
from the step function.
Does this patch fix a bug ot
Hi,
Le 01/12/2016 à 17:27, Gregory CLEMENT a écrit :
Hi Romain,
On jeu., déc. 01 2016, Romain Perier wrote:
No need to copy the template of an hash operation twice into the SRAM
from the step function.
Does this patch fix a bug ot it is jsute a cleanup/improvement?
If it is a bug you
No need to copy the template of an hash operation twice into the SRAM
from the step function.
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/hash.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
index 2a92605..fbbcbf8
Hello,
Le 26/09/2016 à 12:01, Romain Perier a écrit :
Le 16/09/2016 14:52, Romain Perier a écrit :
Hello,
Le 16/09/2016 12:08, Romain Perier a écrit :
The driver omap-rng has a lot of similarity with the IP block SafeXcel
IP-76. A lot of registers are the same and the way that the driver
its/s 492 Mbits/s
After 422 Mbits/s 577 Mbits/s
Improvement +23%+17%
Romain Perier (2):
crypto: marvell - Use an unique pool to copy results of requests
crypto: marvell - Don't break chain for computable last ahash requests
drivers/cryp
HMAC requests
processed via IPSec.
This commits adds a TDMA descriptor to copy context for these of requests
into the "op" dma pool, then it allow to chain these requests at the DMA level.
The 'complete' operation is also updated to retrieve the MAC digest from the
right locatio
ration, is copied later. In this way, any type of result can be
retrieved by DMA for cipher or ahash requests.
Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
---
Changes in v4:
- Added a comment that explains why we retrieve the first op ctx
of the chain.
- Added the tag 'Acked-
ration, is copied later. In this way, any type of result can be
retrieved by DMA for cipher or ahash requests.
Signed-off-by: Romain Perier
---
Changes in v3:
- Don't allocate a new op ctx for the last tdma descriptor. Instead
we point to the last op ctx in the tdma chain, and copy the con
HMAC requests
processed via IPSec.
This commits adds a TDMA descriptor to copy context for these of requests
into the "op" dma pool, then it allow to chain these requests at the DMA level.
The 'complete' operation is also updated to retrieve the MAC digest from the
right locatio
its/s 492 Mbits/s
After 422 Mbits/s 577 Mbits/s
Improvement +23%+17%
Romain Perier (2):
crypto: marvell - Use an unique pool to copy results of requests
crypto: marvell - Don't break chain for computable last ahash requests
drivers/cryp
Hello,
Le 03/10/2016 17:17, Romain Perier a écrit :
This series contain performance improvement regarding ahash requests.
So far, ahash requests were systematically not chained at the DMA level.
However, in some case, like this is the case by using IPSec, some ahash
requests can be processed
ration, is copied later. In this way, any type of result can be
retrieved by DMA for cipher or ahash requests.
Signed-off-by: Romain Perier
---
Changes in v2:
- Use the dma pool "op" to retrieve outer data intead of introducing
a new one.
drivers/crypto/marvell/cesa.c | 4
location.
Signed-off-by: Romain Perier
---
Changes in v2:
- Replaced BUG_ON by an error
- Add a variable "break_chain", with "type" to break the chain
with ahash requests. It improves code readability.
drivers/crypto/marvell/cipher.c | 10
its/s 492 Mbits/s
After 392 Mbits/s 557 Mbits/s
Improvement +14%+13%
Romain Perier (2):
crypto: marvell - Use an unique pool to copy results of requests
crypto: marvell - Don't break chain for computable last ahash requests
drivers/cryp
Le 16/09/2016 14:52, Romain Perier a écrit :
Hello,
Le 16/09/2016 12:08, Romain Perier a écrit :
The driver omap-rng has a lot of similarity with the IP block SafeXcel
IP-76. A lot of registers are the same and the way that the driver works
is very closed the description of the TRNG EIP76 in
Hello,
Le 16/09/2016 12:08, Romain Perier a écrit :
The driver omap-rng has a lot of similarity with the IP block SafeXcel
IP-76. A lot of registers are the same and the way that the driver works
is very closed the description of the TRNG EIP76 in its datasheet.
This series refactorize the
This commits add missing fields in the documentation that are used
by the new device variant. It also includes DT example to show how
the variant should be used.
Signed-off-by: Romain Perier
---
Documentation/devicetree/bindings/rng/omap_rng.txt | 14 --
1 file changed, 12
ch to a dynamically allocated struct hwrng, each using a
different name. Then, we define the name of this hwrng to "dev_name(dev)",
so the name of the data structure is unique per device.
Signed-off-by: Romain Perier
---
Changes in v2:
- Fix the goto label used when there is an error f
This commits adds a device variant for Safexcel,EIP76 found in Marvell
Armada 8k. It defines registers mapping with the good offset and add a
specific initialization function.
Signed-off-by: Romain Perier
---
Changes in v2:
- Call pm_runtime_put_sync from the label err_register. When there is
this step by only
checking the status of the engine, if there is data, we copy the data to
the output buffer and the amout of copied data is returned to the caller,
otherwise zero is returned. The hwrng core will re-call the read operation
as many times as required until enough data has been copied.
cide to
only display "Random Number Generator". As dev_info is already
pre-pending the message with the name of the device, we have enough
informations.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver
This commits adds the devicetree description of the SafeXcel IP-76 TRNG
found in the two Armada CP110.
Signed-off-by: Romain Perier
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 8
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 8
2 files changed, 16
two new values to the enumeration of existing
registers: OUTPUT_2_REG and OUTPUT_3_REG.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/char/hw_random/omap-rng.c
b/drivers/char/hw_random
This commits adds a vendor for the company INSIDE Secure.
See https://www.insidesecure.com, for more details.
Signed-off-by: Romain Perier
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor
data and add a device variant for SafeXcel IP-76, found
in Armada 8K.
Romain Perier (8):
dt-bindings: Add vendor prefix for INSIDE Secure
dt-bindings: omap-rng: Document SafeXcel IP-76 device variant
hwrng: omap - Switch to non-obsolete read API implementation
hwrng: omap - Remove global
Hi,
Le 13/09/2016 11:48, Herbert Xu a écrit :
On Wed, Sep 07, 2016 at 05:57:38PM +0200, Romain Perier wrote:
+
+static int omap_rng_do_read(struct hwrng *rng, void *data, size_t max,
+ bool wait)
{
struct omap_rng_dev *priv;
- int data, i
Le 07/09/2016 16:45, PrasannaKumar Muralidharan a écrit :
On 7 September 2016 at 19:53, Romain Perier
wrote:
Hello,
Le 06/09/2016 18:31, PrasannaKumar Muralidharan a écrit :
Use devm_hwrng_register instead of hwrng_register. It avoids the need
to handle unregistration explicitly from the
cide to
only display "Random Number Generator". As dev_info is already
pre-pending the message with the name of the device, we have enough
informations.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver
two new values to the enumeration of existing
registers: OUTPUT_2_REG and OUTPUT_3_REG.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/char/hw_random/omap-rng.c
b/drivers/char/hw_random
This commits adds a device variant for Safexcel,EIP76 found in Marvell
Armada 8k. It defines registers mapping with the good offset and add a
specific initialization function.
Signed-off-by: Romain Perier
---
Changes in v2:
- Call pm_runtime_put_sync from the label err_register. When there is
This commits add missing fields in the documentation that are used
by the new device variant. It also includes DT example to show how
the variant should be used.
Signed-off-by: Romain Perier
---
Documentation/devicetree/bindings/rng/omap_rng.txt | 14 --
1 file changed, 12
This commits adds a vendor for the company INSIDE Secure.
See https://www.insidesecure.com, for more details.
Signed-off-by: Romain Perier
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor
This commits adds the devicetree description of the SafeXcel IP-76 TRNG
found in the two Armada CP110.
Signed-off-by: Romain Perier
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 8
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 8
2 files changed, 16
this step by
only checking the status of the engine, if there is data, we copy the
data to the output buffer and the amout of copied data is returned to the
caller, otherwise zero is returned. The hwrng core will re-call the read
operation as many times as required until enough data has been copied.
ch to a dynamically allocated struct hwrng, each using a
different name. Then, we define the name of this hwrng to "dev_name(dev)",
so the name of the data structure is unique per device.
Signed-off-by: Romain Perier
---
Changes in v2:
- Fix the goto label used when there is an error f
data and add a device variant for SafeXcel IP-76, found
in Armada 8K.
Romain Perier (8):
dt-bindings: Add vendor prefix for INSIDE Secure
dt-bindings: omap-rng: Document SafeXcel IP-76 device variant
hwrng: omap - Switch to non-obsolete read API implementation
hwrng: omap - Remove global
Le 07/09/2016 16:45, PrasannaKumar Muralidharan a écrit :
On 7 September 2016 at 19:53, Romain Perier
wrote:
Hello,
Le 06/09/2016 18:31, PrasannaKumar Muralidharan a écrit :
Use devm_hwrng_register instead of hwrng_register. It avoids the need
to handle unregistration explicitly from the
Hello,
Le 06/09/2016 18:31, PrasannaKumar Muralidharan a écrit :
Use devm_hwrng_register instead of hwrng_register. It avoids the need
to handle unregistration explicitly from the remove function.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 4 +---
1 file changed
cide to
only display "Random Number Generator". As dev_info is already
pre-pending the message with the name of the device, we have enough
informations.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver
two new values to the enumeration of existing
registers: OUTPUT_2_REG and OUTPUT_3_REG.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/char/hw_random/omap-rng.c
b/drivers/char/hw_random
This commits adds a device variant for Safexcel,EIP76 found in Marvell
Armada 8k. It defines registers mapping with the good offset and add a
specific initialization function.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/Kconfig| 2 +-
drivers/char/hw_random/omap-rng.c | 85
This commits adds the devicetree description of the SafeXcel IP-76 TRNG
found in the two Armada CP110.
Signed-off-by: Romain Perier
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 8
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 8
2 files changed, 16
this step by
only checking the status of the engine, if there is data, we copy the
data to the output buffer and the amout of copied data is returned to the
caller, otherwise zero is returned. The hwrng core will re-call the read
operation as many times as required until enough data has been copied.
This commits add missing fields in the documentation that are used
by the new device variant. It also includes DT example to show how
the variant should be used.
Signed-off-by: Romain Perier
---
Documentation/devicetree/bindings/rng/omap_rng.txt | 14 --
1 file changed, 12
data and add a device variant for SafeXcel IP-76, found
in Armada 8K.
Romain Perier (9):
dt-bindings: Add vendor prefix for INSIDE Secure
dt-bindings: omap-rng: Document SafeXcel IP-76 device variant
hwrng: omap - Switch to non-obsolete read API implementation
hwrng: omap - Use the managed
Use devm_hwrng_register instead of hwrng_register. It avoids the need
to handle unregistration explicitly from the remove function.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random
ch to a dynamically allocated struct hwrng, each using a
different name. Then, we define the name of this hwrng to "dev_name(dev)",
so the name of the data structure is unique per device.
Signed-off-by: Romain Perier
---
drivers/char/hw_random/omap-rng.c | 21 +
1 f
This commits adds a vendor for the company INSIDE Secure.
See https://www.insidesecure.com, for more details.
Signed-off-by: Romain Perier
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor
result can be retrieved by DMA for cipher or ahash requests.
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/cesa.c | 4 ++--
drivers/crypto/marvell/cesa.h | 6 +++---
drivers/crypto/marvell/cipher.c | 2 +-
drivers/crypto/marvell/tdma.c | 16
4 files changed, 14
e right location.
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/hash.c | 69 +--
1 file changed, 54 insertions(+), 15 deletions(-)
diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
index 9f28468..1a91662 100644
--- a/driv
its/s 530 Mbits/s
After 413 Mbits/s 578 Mbits/s
Improvement +11%+9%
Romain Perier (2):
crypto: marvell - Use an unique pool to copy results of requests
crypto: marvell - Don't break chain for computable last ahash requests
drivers/cryp
transformation context for
each dequeued cesa request.
Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...")
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/cesa.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/c
Don't use 64 'as is', as max block size in mv_cesa_ahash_cache_req. Use
CESA_MAX_HASH_BLOCK_SIZE instead, this is better for readability.
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/hash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
From: Thomas Petazzoni
The mv_cesa_ahash_cache_req() function always returns 0, which makes
its return value pretty much useless. However, in addition to
returning a useless value, it also returns a boolean in a variable
passed by reference to indicate if the request was already cached.
So, this
ializing creq->state just after the call to mv_cesa_ahash_init.
Fixes: commit b0ef51067cb4 ("crypto: marvell/cesa - initialize hash...")
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/hash.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --gi
This patches series contains various fixes for ahash requests, dma
operations and an important fixe in the core of the driver (cesa.c). It
also includes some code cleanups.
Romain Perier (3):
crypto: marvell - Update transformation context for each dequeued req
crypto: marvell - Don&#
From: Thomas Petazzoni
The dma_iter parameter of mv_cesa_ahash_dma_add_cache() is never used,
so get rid of it.
Signed-off-by: Thomas Petazzoni
---
drivers/crypto/marvell/hash.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto
From: Thomas Petazzoni
The mv_cesa_ahash_init() function always returns 0, and the return
value is anyway never checked. Turn it into a function returning void.
Signed-off-by: Thomas Petazzoni
---
drivers/crypto/marvell/hash.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --gi
From: Thomas Petazzoni
The mv_cesa_dma_add_op() function builds a mv_cesa_tdma_desc structure
to copy the operation description to the SRAM, but doesn't explicitly
initialize the destination of the copy. It works fine because the
operatin description must be copied at the beginning of the SRAM, a
duplicated code in the _process op.
Fixes: 3610d6cd5231 ("crypto: marvell - Add a complete...")
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/cipher.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/crypto/marvell/cipher.c b/drivers/cryp
the
issue by moving this cache update from mv_cesa_ahash_complete to
mv_cesa_ahash_req_cleanup, so the copy is done once the sglist is
unmapped.
Fixes: 1bf6682cb31d ("crypto: marvell - Add a complete operation for..")
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/hash.c | 12 +
queued or added to the backlog.
Fixes: 85030c5168f1 ("crypto: marvell - Add support for chaining...")
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/cesa.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marv
("crypto: marvell/cesa - add TDMA support")
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/cipher.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/marvell/cipher.c b/drivers/crypto/marvell/cipher.c
index 48df03a..8391aba 100644
---
Use the parameter 'gfp_flags' instead of 'flag' as second argument of
dma_pool_alloc(). The parameter 'flag' is for the TDMA descriptor, its
content has no sense for the allocator.
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/tdma.c | 2 +-
1 file chang
Hello,
Le 22/06/2016 12:33, Herbert Xu a écrit :
Romain Perier wrote:
Add a BUG_ON() call when the driver tries to launch a crypto request
while the engine is still processing the previous one. This replaces
a silent system hang by a verbose kernel panic with the associated
backtrace to let
f mv_cesa_ahash_req, so move it into the
upper structure.
Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
---
Changes in v2:
- Reworded the commit log
- In mv_cesa_ablkcipher_req moved 'base' and 'std' into the upper
structure. Also removed the union
- Rem
engines.
Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
index bb91156..5147073 100644
--- a/drivers/crypto/marvell/cesa.c
chaining crypto requests at the DMA level. By using
a crypto queue per engine, we make sure that we keep the state of the
tdma chain synchronized with the crypto queue. We also reduce contention
on 'cesa_dev->lock' and improve parallelism.
Signed-off-by: Romain Perier
---
Changes in v3:
Currently the crypto requests were sent to engines sequentially.
This commit moves the SRAM I/O operations from the prepare to the step
functions. It provides flexibility for future works and allow to prepare
a request while the engine is running.
Signed-off-by: Romain Perier
Acked-by: Boris
type of the request (different cleanup logic).
Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
---
Changes in v3:
- Fixed comment for the "complete" field in mv_cesa_req_ops.
Changes in v2:
- Removed useless cosmetic change added for checkpatch (which
had nothing
required data structures to chain cryptographic requests
together before sending them to an engine (stopped or possibly already
running).
Signed-off-by: Romain Perier
---
Changes in v3:
- Cosmetic changes: Extra blank lines and coding style issues
on prototypes.
Changes in v2
Adding a macro constant to be used for the size of the crypto queue,
instead of using a numeric value directly. It will be easier to
maintain in case we add more than one crypto queue of the same size.
Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 5
: Romain Perier
Acked-by: Boris Brezillon
---
Changes in v3:
- Fixed incorrectly aligned parameter for BUG_ON in
mv_cesa_ablkcipher_std_step
Changes in v2:
- Reworded the commit message
- Fixed cosmetic changes
drivers/crypto/marvell/cipher.c | 2 ++
drivers/crypto/marvell/hash.c
content of the IV vector would be
overwritten by the last processed request.
Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
---
Changes in v3:
- Fixed coding style issues
Changes in v2:
- Reworded the commit message, the term 'asynchronously' was
ambigous
- Changed th
So far, the way that the type of a TDMA operation was checked was wrong.
We have to use the type mask in order to get the right part of the flag
containing the type of the operation.
Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
---
drivers/crypto/marvell/tdma.c | 5 +++--
1 file
MB/s
After 129 MB/s 39.8 MB/s
Improvement +57.8 % +25.5 %
Romain Perier (10):
crypto: marvell: Add a macro constant for the size of the crypto queue
crypto: marvell: Check engine is not already running when enabling a
req
crypto: marvell: Fix wrong type
type of the request (different cleanup logic).
Signed-off-by: Romain Perier
---
Changes in v2:
- Removed useless cosmetic change added for checkpatch (which
had nothing to do with the patch itself)
- Removed duplicated initialization of 'ivsize'
mv_cesa_ablkcipher_complete
: Romain Perier
---
Changes in v2:
- Reworded the commit message
- Fixed cosmetic changes
drivers/crypto/marvell/cipher.c | 2 ++
drivers/crypto/marvell/hash.c | 2 ++
drivers/crypto/marvell/tdma.c | 2 ++
3 files changed, 6 insertions(+)
diff --git a/drivers/crypto/marvell/cipher.c b
f mv_cesa_ahash_req, so move it into the
upper structure.
Signed-off-by: Romain Perier
---
Changes in v2:
- Reworded the commit log
- In mv_cesa_ablkcipher_req moved 'base' and 'std' into the upper
structure. Also removed the union
- Removed 'base' from mv_
content of the IV vector would be
overwritten by the last processed request.
Signed-off-by: Romain Perier
---
Changes in v2:
- Reworded the commit message, the term 'asynchronously' was ambigous
- Changed the value of CESA_TDMA_IV from 4 to 3
- Adding missing blank lines
- R
engines.
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/cesa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
index bb91156..5147073 100644
--- a/drivers/crypto/marvell/cesa.c
+++ b/drivers/crypto/marvell
Currently the crypto requests were sent to engines sequentially.
This commit moves the SRAM I/O operations from the prepare to the step
functions. It provides flexibility for future works and allow to prepare
a request while the engine is running.
Signed-off-by: Romain Perier
---
drivers/crypto
So far, the way that the type of a TDMA operation was checked was wrong.
We have to use the type mask in order to get the right part of the flag
containing the type of the operation.
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/tdma.c | 5 +++--
1 file changed, 3 insertions(+), 2
Adding a macro constant to be used for the size of the crypto queue,
instead of using a numeric value directly. It will be easier to
maintain in case we add more than one crypto queue of the same size.
Signed-off-by: Romain Perier
---
drivers/crypto/marvell/cesa.c | 5 -
1 file changed, 4
required data structures to chain cryptographic requests
together before sending them to an engine (stopped or possibly already
running).
Signed-off-by: Romain Perier
---
Changes in v2:
- Reworded the commit message
- Fixed cosmetic changes: coding styles issues, missing blank lines
chaining crypto requests at the DMA level. By using
a crypto queue per engine, we make sure that we keep the state of the
tdma chain synchronized with the crypto queue. We also reduce contention
on 'cesa_dev->lock' and improve parallelism.
Signed-off-by: Romain Perier
---
Changes in v2:
MB/s
After 129 MB/s 39.8 MB/s
Improvement +57.8 % +25.5 %
Romain Perier (10):
crypto: marvell: Add a macro constant for the size of the crypto queue
crypto: marvell: Check engine is not already running when enabling a
req
crypto: marvell: Fix wrong type
Hello,
Le 15/06/2016 23:43, Boris Brezillon a écrit :
On Wed, 15 Jun 2016 21:15:34 +0200
Romain Perier wrote:
The Cryptographic Engines and Security Accelerators (CESA) supports the
Multi-Packet Chain Mode. With this mode enabled, multiple tdma requests
can be chained and processed by the
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