RE: [PATCH] crypto: arm64/aes-gcm-ce - fix scatterwalk API violation

> -Original Message- > From: Ard Biesheuvel > Sent: Monday, August 20, 2018 8:29 PM > To: linux-crypto@vger.kernel.org > Cc: herb...@gondor.apana.org.au; Vakul Garg ; > davejwat...@fb.com; Peter Doliwa ; Ard > Biesheuvel > Subject: [PATCH] crypto: arm64/aes-

Regression in tls selftest on cortex a-53

Hi Ard Kernel tls selftest ' msg_more' is broken with the latest gcm changes for optimizing it on cortex a-53. (I am using David Miller's net-next branch.) Reverting following commits fixes the problem. 1. crypto: arm64/ghash-ce - implement 4-way aggregation 2. crypto: arm64/ghash-ce - replace

RE: [PATCH 1/4] crypto/arm64: ghash - reduce performance impact of NEON yield checks

> -Original Message- > From: bige...@linutronix.de [mailto:bige...@linutronix.de] > Sent: Wednesday, July 25, 2018 12:33 PM > To: Vakul Garg > Cc: Ard Biesheuvel ; linux- > cry...@vger.kernel.org; herb...@gondor.apana.org.au; > will.dea...@arm.com; dave.mar...@

RE: [PATCH 1/4] crypto/arm64: ghash - reduce performance impact of NEON yield checks

> -Original Message- > From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org] > Sent: Tuesday, July 24, 2018 10:42 PM > To: linux-crypto@vger.kernel.org > Cc: herb...@gondor.apana.org.au; will.dea...@arm.com; > dave.mar...@arm.com; Vakul Garg ; > bige...@linutron

RE: [PATCH v5 00/23] crypto: arm64 - play nice with CONFIG_PREEMPT

Hi How does this patchset affect the throughput performance of crypto? Is it expected to increase? Regards Vakul > -Original Message- > From: linux-crypto-ow...@vger.kernel.org [mailto:linux-crypto- > ow...@vger.kernel.org] On Behalf Of Ard Biesheuvel > Sent: Saturday, March 10, 2018

RE: [PATCH v9 crypto 00/12] Chelsio Inline TLS

> -Original Message- > From: linux-crypto-ow...@vger.kernel.org [mailto:linux-crypto- > ow...@vger.kernel.org] On Behalf Of Atul Gupta > Sent: Tuesday, March 6, 2018 9:05 PM > To: davejwat...@fb.com; da...@davemloft.net; > herb...@gondor.apana.org.au > Cc: linux-crypto@vger.kernel.org;

RE: [RFC crypto v3 8/9] chtls: Register the ULP

> -Original Message- > From: linux-crypto-ow...@vger.kernel.org [mailto:linux-crypto- > ow...@vger.kernel.org] On Behalf Of Atul Gupta > Sent: Thursday, February 8, 2018 3:56 PM > To: Dave Watson > Cc: s...@queasysnail.net; herb...@gondor.apana.org.au; linux- >

RE: [PATCHv2] tls: Add support for encryption using async offload accelerator

> -Original Message- > From: Dave Watson [mailto:davejwat...@fb.com] > Sent: Wednesday, January 31, 2018 11:05 PM > To: Vakul Garg <vakul.g...@nxp.com> > Cc: linux-crypto@vger.kernel.org; il...@mellanox.com; > avia...@mellanox.com; da...@davemloft.net; net...@vger

RE: [PATCHv2] tls: Add support for encryption using async offload accelerator

> -Original Message- > From: Dave Watson [mailto:davejwat...@fb.com] > Sent: Wednesday, January 31, 2018 8:52 PM > To: Vakul Garg <vakul.g...@nxp.com> > Cc: linux-crypto@vger.kernel.org; il...@mellanox.com; > avia...@mellanox.com; da...@davemloft.net; net...@vger

[PATCHv2] tls: Add support for encryption using async offload accelerator

. Signed-off-by: Vakul Garg <vakul.g...@nxp.com> --- v1-v2: - Used crypto_wait_req() to wait for async operation completion - Passed CRYPTO_TFM_REQ_MAY_BACKLOG to crypto_aead_encrypt include/net/tls.h | 2 ++ net/tls/tls_sw.c | 8 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff

RE: [PATCH] tls: Add support for encryption using async offload accelerator

Forgot to add 'v2' in subject line. I will be resending. -Original Message- From: Vakul Garg Sent: Wednesday, January 31, 2018 9:29 PM To: linux-crypto@vger.kernel.org Cc: il...@mellanox.com; avia...@mellanox.com; davejwat...@fb.com; da...@davemloft.net; net...@vger.kernel.org; Vakul

[PATCH] tls: Add support for encryption using async offload accelerator

. Signed-off-by: Vakul Garg <vakul.g...@nxp.com> --- v1-v2: - Used crypto_wait_req() to wait for async operation completion - Passed CRYPTO_TFM_REQ_MAY_BACKLOG to crypto_aead_encrypt include/net/tls.h | 2 ++ net/tls/tls_sw.c | 8 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff

[PATCH] tls: Add support for encryption using async offload accelerator

. Signed-off-by: Vakul Garg <vakul.g...@nxp.com> --- net/tls/tls_sw.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/net/tls/tls_sw.c b/net/tls/tls_sw.c index 73d19210dd49..390e6dc7b135 100644 --- a/net/tls/tls_sw.c +++ b/net/tls/tls_sw.c @@ -39,6 +39,11 @@ #i

[PATCH] tls: Add support for encryption using async offload accelerator

. Signed-off-by: Vakul Garg <vakul.g...@nxp.com> --- net/tls/tls_sw.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/net/tls/tls_sw.c b/net/tls/tls_sw.c index 73d19210dd49..390e6dc7b135 100644 --- a/net/tls/tls_sw.c +++ b/net/tls/tls_sw.c @@ -39,6 +39,11 @@ #i

RE: [PATCH] crypto: caam - fix memleak in caam_jr module

This patch fixes a memory leak that appears when caam_jr module is unloaded. Cc: sta...@vger.kernel.org # 3.13+ Signed-off-by: Cristian Stoica cristian.sto...@freescale.com --- drivers/crypto/caam/jr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/crypto/caam/jr.c

[PATCH] crypto: caam - Fix key inlining in AEAD shared descriptors

The variable 'keys_fit_inline' is initialised correctly to avoid using its stale value while creating shared descriptor for decryption and given-iv-encryption. Signed-off-by: Vakul Garg va...@freescale.com --- drivers/crypto/caam/caamalg.c | 15 +-- 1 file changed, 13 insertions

[PATCH][RESEND] crypto: caam - Fixed the memory out of bound overwrite issue

-32: Restoring 0xdec5dec0-0xdec5dec3=0xcc Change-Id: I0c7a1048053e811025d1c3b487940f87345c8f5d Signed-off-by: Vakul Garg va...@freescale.com CC: sta...@vger.kernel.org #3.9 Reviewed-by: Geanta Neag Horia Ioan-B05471 horia.gea...@freescale.com Reviewed-by: Fleming Andrew-AFLEMING aflem

[PATCH][RESEND] crypto: caam - Moved macro DESC_JOB_IO_LEN to desc_constr.h

: Ic8900990d465e9079827b0c7fcacc61766d7efb6 Signed-off-by: Vakul Garg va...@freescale.com Reviewed-by: Geanta Neag Horia Ioan-B05471 horia.gea...@freescale.com Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com --- drivers/crypto/caam

[PATCH] crypto: caam - Fixed the memory out of bound overwrite issue

-32: Restoring 0xdec5dec0-0xdec5dec3=0xcc Change-Id: I0c7a1048053e811025d1c3b487940f87345c8f5d Signed-off-by: Vakul Garg va...@freescale.com CC: sta...@vger.kernel.org #3.9 Reviewed-by: Geanta Neag Horia Ioan-B05471 horia.gea...@freescale.com Reviewed-by: Fleming Andrew-AFLEMING aflem

[PATCH] crypto: caam - Moved macro DESC_JOB_IO_LEN to desc_constr.h

: Ic8900990d465e9079827b0c7fcacc61766d7efb6 Signed-off-by: Vakul Garg va...@freescale.com Reviewed-by: Geanta Neag Horia Ioan-B05471 horia.gea...@freescale.com Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com --- drivers/crypto/caam

Re: Fwd: crypto accelerator driver problems

Herbert Xu herbert at gondor.apana.org.au writes: On Wed, Jan 26, 2011 at 10:26:33AM +0330, Hamid Nassiby wrote: As you know, I posted my problem again to crypto list and no one answered. Now I emphasize one aspect of the problem as a concept related to IPSec protocol, free of my

[PATCHv1] crypto: caam - fix job ring cleanup code

] [c029fb38] __device_release_driver+0x68/0x120 [eac47e90] [c02a05c8] driver_detach+0xd8/0xe0 [eac47eb0] [c029f8e0] bus_remove_driver+0xa0/0x110 [eac47ed0] [c00768e4] sys_delete_module+0x144/0x270 [eac47f40] [c000e2f0] ret_from_syscall+0x0/0x3c Signed-off-by: Vakul Garg va...@freescale.com Signed-off

[PATCHv1] crypto: caam - set RDB bit in security configuration register

Data Buffer is not enabled, then each IV causes a separate request, and RNG4 hardware cannot keep up resulting in lower IPSEC throughput if random IVs are used. Signed-off-by: Vakul Garg va...@freescale.com --- Sorry for repeated sending. Resending as suggested by Herbert. Changes in v1: Addressed

[PATCH][REPOST] crypto: caam - Fix missing init of '.type' in AEAD algos.

)) (f) authenc(hmac(sha384),cbc(des)) Signed-off-by: Vakul Garg va...@freescale.com Reviewed-by: Kim Phillips kim.phill...@freescale.com Signed-off-by: Andy Fleming aflem...@freescale.com --- drivers/crypto/caam/caamalg.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff

[PATCHv1] crypto: caam - set RDB bit in security configuration register

Data Buffer is not enabled, then each IV causes a separate request, and RNG4 hardware cannot keep up resulting in lower IPSEC throughput if random IVs are used. Signed-off-by: Vakul Garg va...@freescale.com --- Changes in v1: Addressed Kim Philip's comments. (a) Limit commit message to 75

[PATCHv1] crypto: caam - set RDB bit in security configuration register

Data Buffer is not enabled, then each IV causes a separate request, and RNG4 hardware cannot keep up resulting in lower IPSEC throughput if random IVs are used. Signed-off-by: Vakul Garg va...@freescale.com --- Changes in v1: Addressed Kim Philip's comments. (a) Limit commit message to 75

[PATCHv2] crypto: caam - Added property fsl,sec-era in SEC4.0 device tree binding.

This new property defines the era of the particular SEC version. The compatible property in device tree crypto node has been updated not to contain SEC era numbers. Signed-off-by: Vakul Garg va...@freescale.com --- Changes in v1: 1. Marked fsl,sec-era as 'optional'. Changes in v2

[PATCH] crypto: tcrypt - removed unused variable.

() already sets output buffer in the ahash transform using ahash_request_set_crypt(). Signed-off-by: Vakul Garg va...@freescale.com --- crypto/tcrypt.c | 17 - 1 files changed, 8 insertions(+), 9 deletions(-) diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c index 7ae2130..1414b9f 100644

[PATCH 1/2] crypto: caam - Fix DMA size in descriptor in ahash_digest()

From: Steve Cornelius steve.cornel...@freescale.com Save of DMA size in extended descriptor was missing. Thus crashes could occur during post-request unmapping. Signed-off-by: Steve Cornelius steve.cornel...@freescale.com --- drivers/crypto/caam/caamhash.c |1 + 1 files changed, 1

[PATCH 0/2] crypto: caam - Fix bugs in hashing module

These patches have been authored by Steve Cornelius. These patches fix uninitialised variables left in the hashing module. steve.cornel...@freescale.com. Steve Cornelius (2): crypto: caam - Fix DMA size in descriptor in ahash_digest() crypto: caam - improve init for context state saves

[PATCH] crypto: tcrypt - Ahash tests changed to run in parallel.

This allows to test run multiple parallel crypto ahash contexts. Each of the test vector under the ahash speed test template is started under a separate kthread. Signed-off-by: Vakul Garg va...@freescale.com --- crypto/tcrypt.c | 164 +++ 1

[PATCH] crypto: testmgr - add aead cbc des, des3_ede tests.

)) (j) authenc(hmac(sha512),cbc(des3_ede)) Signed-off-by: Vakul Garg va...@freescale.com --- crypto/testmgr.c | 120 ++ crypto/testmgr.h | 647 ++ 2 files changed, 767 insertions(+), 0 deletions(-) diff --git a/crypto/testmgr.c b/crypto

[PATCHv2] crypto: caam - Updated SEC-4.0 device tree binding for ERA information.

The compatible property in device tree crypto node has been enhanced to provide SEC ERA information to the applications. Signed-off-by: Vakul Garg va...@freescale.com --- .../devicetree/bindings/crypto/fsl-sec4.txt|5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git

[PATCH] crypto:caam - Improved support of CAAM era retrieval.

in the mapping table. For ERA-6 and later devices, it returns ERA directly by reading CCBVID. Signed-off-by: Vakul Garg va...@freescale.com --- drivers/crypto/caam/ctrl.c | 33 +++-- drivers/crypto/caam/ctrl.h |2 +- drivers/crypto/caam/regs.h |7 +++ 3

[PATCHv2] crypto:caam - Improved support of CAAM era retrieval.

. For ERA-6 and later devices, it returns ERA directly by reading CCBVID. Signed-off-by: Vakul Garg va...@freescale.com --- drivers/crypto/caam/ctrl.c | 29 + drivers/crypto/caam/ctrl.h |2 +- drivers/crypto/caam/regs.h |7 +++ 3 files changed, 29 insertions

[PATCHv1] crypto-caam: added entry for P5040 in SEC-VID to SEC-ERA mapping table.

On P5040, SEC-ERA does not print correctly. This is because SEC-VID to SEC-ERA mapping table does not contain information for P5040. This patch adds this information. Signed-off-by: Vakul Garg va...@freescale.com --- Please ignore my previous patch which contained internal release prefixes