Hi Ard,
On 1/16/2021 8:52 AM, Ard Biesheuvel wrote:
On Mon, 28 Dec 2020 at 20:11, Dey, Megha wrote:
Hi Eric,
On 12/21/2020 3:20 PM, Eric Biggers wrote:
On Fri, Dec 18, 2020 at 01:10:57PM -0800, Megha Dey wrote:
Optimize crypto algorithms using VPCLMULQDQ and VAES AVX512 instructions
(first
On Mon, 28 Dec 2020 at 20:11, Dey, Megha wrote:
>
> Hi Eric,
>
> On 12/21/2020 3:20 PM, Eric Biggers wrote:
> > On Fri, Dec 18, 2020 at 01:10:57PM -0800, Megha Dey wrote:
> >> Optimize crypto algorithms using VPCLMULQDQ and VAES AVX512 instructions
> >> (first implemented on Intel's Icelake client
Hi Eric,
On 12/21/2020 3:20 PM, Eric Biggers wrote:
On Fri, Dec 18, 2020 at 01:10:57PM -0800, Megha Dey wrote:
Optimize crypto algorithms using VPCLMULQDQ and VAES AVX512 instructions
(first implemented on Intel's Icelake client and Xeon CPUs).
These algorithms take advantage of the AVX512 reg
On Fri, Dec 18, 2020 at 01:10:57PM -0800, Megha Dey wrote:
> Optimize crypto algorithms using VPCLMULQDQ and VAES AVX512 instructions
> (first implemented on Intel's Icelake client and Xeon CPUs).
>
> These algorithms take advantage of the AVX512 registers to keep the CPU
> busy and increase memor
Optimize crypto algorithms using VPCLMULQDQ and VAES AVX512 instructions
(first implemented on Intel's Icelake client and Xeon CPUs).
These algorithms take advantage of the AVX512 registers to keep the CPU
busy and increase memory bandwidth utilization. They provide substantial
(2-10x) improvement
