Re: [PATCHv2 4/7] Documentation: dt: socfpga: Add Arria10 Ethernet binding

On Mon, Apr 25, 2016 at 12:52:45PM -0500, ttha...@opensource.altera.com wrote: > From: Thor Thayer > > Add the device tree bindings needed to support the Altera Ethernet > FIFO buffers on the Arria10 chip. > > Signed-off-by: Thor Thayer

Re: [RFC6 PATCH v6 00/21] ILP32 for ARM64 - LTP results

On Wed, Apr 27, 2016 at 12:30 AM, Andrew Pinski wrote: > On Fri, Apr 22, 2016 at 8:37 PM, Zhangjian (Bamvor) > wrote: >> Hi, Yury >> >> >> On 2016/4/6 6:44, Yury Norov wrote: >>> >>> There are about 20 failing tests of 782 in lite scenario. >>>

Re: [RFC PATCH v1 00/18] x86: Secure Memory Encryption (AMD)

On 04/27/2016 09:39 AM, Andy Lutomirski wrote: > On Tue, Apr 26, 2016 at 3:55 PM, Tom Lendacky wrote: >> This RFC patch series provides support for AMD's new Secure Memory >> Encryption (SME) feature. >> >> SME can be used to mark individual pages of memory as encrypted

Re: [RFC PATCH v1 02/18] x86: Secure Memory Encryption (SME) build enablement

On Wed 2016-04-27 17:41:40, Borislav Petkov wrote: > On Wed, Apr 27, 2016 at 05:30:10PM +0200, Pavel Machek wrote: > > Doing it early will break bisect, right? > > How exactly? Please do tell. Hey look, SME slowed down 30% since being initially merged into kernel!

Re: [RFC PATCH v1 03/18] x86: Secure Memory Encryption (SME) support

On 03/22/2016 08:03 AM, Pavel Machek wrote: > On Tue 2016-04-26 17:56:26, Tom Lendacky wrote: >> Provide support for Secure Memory Encryption (SME). This initial support >> defines the memory encryption mask as a variable for quick access and an >> accessor for retrieving the number of physical

Re: [PATCH] scripts/spelling.txt: add "fimware" misspelling

On Tue, Apr 26, 2016 at 9:06 PM, Zhao Lei wrote: > Hi, Kees Cook > > * From: Kees Cook [mailto:keesc...@chromium.org] >> Sent: Wednesday, April 27, 2016 7:48 AM >> To: Andrew Morton >> Cc: Randy Dunlap ; Andy Whitcroft >>

Re: [RFC PATCH v1 02/18] x86: Secure Memory Encryption (SME) build enablement

On Wed, Apr 27, 2016 at 05:30:10PM +0200, Pavel Machek wrote: > Doing it early will break bisect, right? How exactly? Please do tell. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body

Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors

On Wed, Apr 27, 2016 at 08:12:56AM -0700, Andy Lutomirski wrote: > I think there are some errata Isn't that addressed by the first branch of the if-test in pat_init(): if ((c->x86_vendor == X86_VENDOR_INTEL) && (((c->x86 == 0x6) && (c->x86_model <= 0xd)) ||

Re: [RFC PATCH v1 02/18] x86: Secure Memory Encryption (SME) build enablement

On 03/22/2016 08:01 AM, Pavel Machek wrote: > On Tue 2016-04-26 17:56:14, Tom Lendacky wrote: >> Provide the Kconfig support to build the SME support in the kernel. > > > Probably should go last in the series? Yeah, I've seen arguments both ways for this. Doing it early allows compiling and

Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors

On Wed, Apr 27, 2016 at 8:05 AM, Tom Lendacky wrote: > On 04/27/2016 09:47 AM, Andy Lutomirski wrote: >> On Wed, Apr 27, 2016 at 7:44 AM, Tom Lendacky >> wrote: >>> On 04/27/2016 09:33 AM, Andy Lutomirski wrote: On Tue, Apr 26, 2016 at 3:56

Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors

On 04/27/2016 09:47 AM, Andy Lutomirski wrote: > On Wed, Apr 27, 2016 at 7:44 AM, Tom Lendacky wrote: >> On 04/27/2016 09:33 AM, Andy Lutomirski wrote: >>> On Tue, Apr 26, 2016 at 3:56 PM, Tom Lendacky >>> wrote: For AMD processors that

Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors

On Wed, Apr 27, 2016 at 7:44 AM, Tom Lendacky wrote: > On 04/27/2016 09:33 AM, Andy Lutomirski wrote: >> On Tue, Apr 26, 2016 at 3:56 PM, Tom Lendacky >> wrote: >>> For AMD processors that support PAT, set the write-protect cache mode >>>

Re: [RFC PATCH v1 00/18] x86: Secure Memory Encryption (AMD)

On Wed 2016-04-27 16:05:20, Borislav Petkov wrote: > On Tue, Mar 22, 2016 at 02:00:58PM +0100, Pavel Machek wrote: > > Why would I want SME on my system? My system seems to work without it. > > Your system doesn't have it and SME is default off. That does not answer the question. "Why would I

Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors

On 04/27/2016 09:33 AM, Andy Lutomirski wrote: > On Tue, Apr 26, 2016 at 3:56 PM, Tom Lendacky wrote: >> For AMD processors that support PAT, set the write-protect cache mode >> (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05). > > What's the purpose

Re: Kernel docs: muddying the waters a bit

On Tue, Apr 12, 2016 at 4:46 PM, Jonathan Corbet wrote: > On Fri, 8 Apr 2016 17:12:27 +0200 > Markus Heiser wrote: > >> motivated by this MT, I implemented a toolchain to migrate the kernel’s >> DocBook XML documentation to reST markup. >> >> It

Re: [RFC PATCH v1 00/18] x86: Secure Memory Encryption (AMD)

On 03/22/2016 08:00 AM, Pavel Machek wrote: > Hi! > >> This RFC patch series provides support for AMD's new Secure Memory >> Encryption (SME) feature. >> >> SME can be used to mark individual pages of memory as encrypted through the >> page tables. A page of memory that is marked encrypted will

Re: [PATCH 0/6] Intel Secure Guard Extensions

On Apr 27, 2016 1:18 AM, "Ingo Molnar" wrote: > > > * Andy Lutomirski wrote: > > > > What new syscalls would be needed for ssh to get all this support? > > > > This patchset or similar, plus some user code and an enclave to use. > > > > Sadly, on current

Re: [RFC PATCH v1 00/18] x86: Secure Memory Encryption (AMD)

On Tue, Mar 22, 2016 at 02:00:58PM +0100, Pavel Machek wrote: > Why would I want SME on my system? My system seems to work without it. Your system doesn't have it and SME is default off. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. -- To unsubscribe from this

Re: [RFC PATCH v1 03/18] x86: Secure Memory Encryption (SME) support

On Tue 2016-04-26 17:56:26, Tom Lendacky wrote: > Provide support for Secure Memory Encryption (SME). This initial support > defines the memory encryption mask as a variable for quick access and an > accessor for retrieving the number of physical addressing bits lost if > SME is enabled. > >

Re: [RFC PATCH v1 02/18] x86: Secure Memory Encryption (SME) build enablement

On Tue 2016-04-26 17:56:14, Tom Lendacky wrote: > Provide the Kconfig support to build the SME support in the kernel. Probably should go last in the series? > Signed-off-by: Tom Lendacky > --- > arch/x86/Kconfig |9 + > 1 file changed, 9 insertions(+) > >

Re: [RFC PATCH v1 00/18] x86: Secure Memory Encryption (AMD)

Hi! > This RFC patch series provides support for AMD's new Secure Memory > Encryption (SME) feature. > > SME can be used to mark individual pages of memory as encrypted through the > page tables. A page of memory that is marked encrypted will be automatically > decrypted when read from DRAM and

[PATCH] vfio-pci: Allow to mmap sub-page MMIO BARs if the mmio page is exclusive

Current vfio-pci implementation disallows to mmap sub-page(size < PAGE_SIZE) MMIO BARs because these BARs' mmio page may be shared with other BARs. This will cause some performance issues when we passthrough a PCI device with this kind of BARs. Guest will be not able to handle the mmio accesses to

Re: [PATCH 0/6] Intel Secure Guard Extensions

* Andy Lutomirski wrote: > > What new syscalls would be needed for ssh to get all this support? > > This patchset or similar, plus some user code and an enclave to use. > > Sadly, on current CPUs, you also need Intel to bless the enclave. It looks > like > new CPUs

Re: [PATCH 0/6] Intel Secure Guard Extensions

Hi! > > > Preventing cold boot attacks is really just icing on the cake. The > > > real point of this is to allow you to run an "enclave". An SGX > > > enclave has unencrypted code but gets access to a key that only it can > > > access. It could use that key to unwrap your ssh private key and

Re: [RFC6 PATCH v6 00/21] ILP32 for ARM64 - LTP results

On Fri, Apr 22, 2016 at 8:37 PM, Zhangjian (Bamvor) wrote: > Hi, Yury > > > On 2016/4/6 6:44, Yury Norov wrote: >> >> There are about 20 failing tests of 782 in lite scenario. >> float_bessel >> float_exp_log >> float_iperb >> float_power >> float_trigo >> pipeio_1 >>

Re: [PATCH] fs: fix over-zealous use of "const"

On Thu, 21 Apr 2016, Kees Cook wrote: > When I was fixing up const recommendations from checkpatch.pl, I went > overboard. This fixes the warning (during a W=1 build): > > include/linux/fs.h:2627:74: warning: type qualifiers ignored on function > return type [-Wignored-qualifiers] > static