On 02/12/2017 05:35 PM, Jonathan Corbet wrote:
> On Fri, 20 Jan 2017 09:06:41 +1100
> Steve Kowalik wrote:
>
>> The following patch converts the SuperH interfaces DocBook into RST,
>> however, I've not added it to the toctree, since I'm not 100% clear
>> where it best fits.
>
> So I have to ap
From: Rafael J. Wysocki
The user/admin documentation of cpufreq is badly outdated. It
conains stale and/or inaccurate information along with things
that are not particularly useful. Also, some of the important
pieces are missing from it.
For this reason, add a new user/admin document for cpufr
rc6]
>> [if your patch is applied to the wrong git tree, please drop us a note to
>> help improve the system]
>>
>> url:
>> https://github.com/0day-ci/linux/commits/Thomas-Garnier/x86-mm-Adapt-MODULES_END-based-on-Fixmap-section-size/20170217-072759
>> config: x86_64
Hi Bjorn,
Can you give us an idea of when you might be able to comment on our
patchset? We've addressed all the outstanding issues and have a couple
of reviewed and tested tags. So we'd like to see this move forward as
soon as possible.
I can do a respin with the tags collected or address any con
On Thu, Feb 16, 2017 at 05:08:20PM -0800, Kees Cook wrote:
> On Thu, Feb 16, 2017 at 2:25 PM, Pavel Machek wrote:
> > Hi!
> >
> >>
> >> -config DEBUG_RODATA
> >> +config STRICT_KERNEL_RWX
> >> bool "Make kernel text and rodata read-only" if
> >> ARCH_OPTIONAL_KERNEL_RWX
> >> depends o
On Wed, Feb 15, 2017 at 04:54:07PM -0500, Christopher Covington wrote:
> The Qualcomm Datacenter Technologies QDF2400 family of SoCs contains a
> custom (non-PrimeCell) implementation of the SBSA UART. Occasionally the
> BUSY bit in the Flag Register gets stuck as 1, erratum 44 for both 2432v1
> an
Às 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
> Add endpoint mode support to designware driver. This uses the
> EP Core layer introduced recently to add endpoint mode support.
> *Any* function driver can now use this designware device
> in order to achieve the EP functionality.
>
> Sig
I'm commenting on the configfs layout here instead of the patch with the
code as the issues are easier to explain that way. I think the layout
is a bit confusing and could be cleaner by making use of pre-created
entries and symlinks. Here is my suggestion:
/sys/kernel/config/pci_ep/functions/
On Fri, Feb 17, 2017 at 03:20:23PM +0530, Kishon Vijay Abraham I wrote:
> Introduce a new configfs entry to configure the EP function (like
> configuring the standard configuration header entries) and to
> bind the EP function with EP controller.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
>
On 2/17/2017 9:59 AM, Konrad Rzeszutek Wilk wrote:
On Thu, Feb 16, 2017 at 09:46:19AM -0600, Tom Lendacky wrote:
Add warnings to let the user know when bounce buffers are being used for
DMA when SME is active. Since the bounce buffers are not in encrypted
memory, these notifications are to allo
On 2/17/2017 9:57 AM, Konrad Rzeszutek Wilk wrote:
On Thu, Feb 16, 2017 at 09:47:55AM -0600, Tom Lendacky wrote:
Provide support so that kexec can be used to boot a kernel when SME is
enabled.
Is the point of kexec and kdump to ehh, dump memory ? But if the
rest of the memory is encrypted you
On Thu, Feb 16, 2017 at 09:46:19AM -0600, Tom Lendacky wrote:
> Add warnings to let the user know when bounce buffers are being used for
> DMA when SME is active. Since the bounce buffers are not in encrypted
> memory, these notifications are to allow the user to determine some
> appropriate actio
On Thu, Feb 16, 2017 at 09:47:55AM -0600, Tom Lendacky wrote:
> Provide support so that kexec can be used to boot a kernel when SME is
> enabled.
Is the point of kexec and kdump to ehh, dump memory ? But if the
rest of the memory is encrypted you won't get much, will you?
Would it make sense to i
On 2/17/2017 5:07 AM, Borislav Petkov wrote:
On Thu, Feb 16, 2017 at 09:42:25AM -0600, Tom Lendacky wrote:
For processors that support PAT, set the write-protect cache mode
(_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05).
Acked-by: Borislav Petkov
Signed-off-by: Tom Lendack
Hi,
On Friday 17 February 2017 03:20 PM, Kishon Vijay Abraham I wrote:
> Add endpoint mode support to designware driver. This uses the
> EP Core layer introduced recently to add endpoint mode support.
> *Any* function driver can now use this designware device
> in order to achieve the EP functiona
Às 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
> Add Documentation to help users use pci endpoint to configure
> pci endpoint function and to bind the endpoint function
> with endpoint controller.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
> Documentation/PCI/00-INDEX
Hi,
On Friday 17 February 2017 03:20 PM, Kishon Vijay Abraham I wrote:
> Introduce a new configfs entry to configure the EP function (like
> configuring the standard configuration header entries) and to
> bind the EP function with EP controller.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
>
On Thu, Feb 16, 2017 at 09:43:07AM -0600, Tom Lendacky wrote:
> Add support for Secure Memory Encryption (SME). This initial support
> provides a Kconfig entry to build the SME support into the kernel and
> defines the memory encryption mask that will be used in subsequent
> patches to mark pages a
Às 11:37 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
> Hi Joao,
>
> On Friday 17 February 2017 04:56 PM, Joao Pinto wrote:
>>
>> Hi Kishon,
>>
>> Às 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
>>> Introduce a new EP core layer in order to support endpoint functions
>>> in linux ke
Às 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
> Add Documentation to help users use endpoint library to enable endpoint
> mode in the PCI controller and add new PCI endpoint functions.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
> Documentation/PCI/00-INDEX |
Hi Joao,
On Friday 17 February 2017 04:56 PM, Joao Pinto wrote:
>
> Hi Kishon,
>
> Às 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
>> Introduce a new EP core layer in order to support endpoint functions
>> in linux kernel. This comprises of EPC library
>> (Endpoint Controller Library)
Hi Kishon,
Às 9:50 AM de 2/17/2017, Kishon Vijay Abraham I escreveu:
> Introduce a new EP core layer in order to support endpoint functions
> in linux kernel. This comprises of EPC library
> (Endpoint Controller Library) and EPF library (Endpoint
> Function Library). EPC library implements functi
On Thu, Feb 16, 2017 at 09:42:25AM -0600, Tom Lendacky wrote:
> For processors that support PAT, set the write-protect cache mode
> (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05).
>
> Acked-by: Borislav Petkov
> Signed-off-by: Tom Lendacky
Just a nit:
Subject should have "
On Thu, Feb 16, 2017 at 09:42:54AM -0600, Tom Lendacky wrote:
> When System Memory Encryption (SME) is enabled, the physical address
> space is reduced. Adjust the x86_phys_bits value to reflect this
> reduction.
>
> Signed-off-by: Tom Lendacky
> ---
> arch/x86/kernel/cpu/common.c | 10 +++
This patch series
*) add PCI endpoint core layer
*) modify designware/dra7xx driver to be configured in EP mode
*) add a PCI endpoint *test* function driver and corresponding host
driver
Changes from v1:
*) The preparation patches for adding EP support is removed and is sent
separately
*
Add Documentation to help users use endpoint library to enable endpoint
mode in the PCI controller and add new PCI endpoint functions.
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/PCI/00-INDEX |2 +
Documentation/PCI/endpoint/pci-endpoint.txt | 190 ++
Add binding documentation for pci-test endpoint function that helps in
adding and configuring pci-test endpoint function.
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/PCI/00-INDEX |2 ++
.../PCI/endpoint/function/binding/pci-test.txt | 17
Add specification for the *pci test* virtual function device. The endpoint
function driver and the host pci driver should be created based on this
specification.
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/PCI/00-INDEX |2 +
Documentation/PCI/endpoint/pci-te
Introduce a new configfs entry to configure the EP function (like
configuring the standard configuration header entries) and to
bind the EP function with EP controller.
Signed-off-by: Kishon Vijay Abraham I
---
drivers/pci/endpoint/Kconfig | 14 +-
drivers/pci/endpoint/Makefile |1
Add device tree binding documentation for pci designware EP mode.
Acked-by: Rob Herring
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/pci/designware-pcie.txt| 26 ++--
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetr
No functional change. Split dra7xx_pcie_enable_interrupts into
dra7xx_pcie_enable_wrapper_interrupts and dra7xx_pcie_enable_msi_interrupts
so that wrapper interrupts and msi interrupts can be enabled independently.
This is in preparation for adding EP mode support to dra7xx driver since
EP mode doe
Update device tree binding documentation of TI's dra7xx PCI
controller to include property for enabling legacy mode.
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/devicetree/bindings/pci/ti-pci.txt |4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bind
The PCIe controller integrated in dra7xx SoCs is capable of operating
in endpoint mode. Add endpoint mode support to dra7xx driver.
Signed-off-by: Kishon Vijay Abraham I
---
drivers/pci/dwc/Kconfig | 31 +-
drivers/pci/dwc/Makefile |4 +-
drivers/pci/dwc/pci-dra7xx.c
Add device tree binding documentation for pci dra7xx EP mode.
Acked-by: Rob Herring
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/devicetree/bindings/pci/ti-pci.txt | 37 ++
1 file changed, 30 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/b
According to errata i870, access to the PCIe slave port
that are not 32-bit aligned will result in incorrect mapping
to TLP Address and Byte enable fields.
Accessing non 32-bit aligned data causes incorrect data in the target
buffer if memcpy is used. Implement the workaround for this
errata here.
Add device IDs for DRA74x and DRA72x devices. These devices have
configurable PCI endpoint.
Signed-off-by: Kishon Vijay Abraham I
---
include/linux/pci_ids.h |2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 73dda0e..e8bbc4b 100644
-
Add Documentation for pci-endpoint-test driver.
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/misc-devices/pci-endpoint-test.txt | 35 ++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/misc-devices/pci-endpoint-test.txt
diff --git a/Documentat
Add Documentation to help users use pci endpoint to configure
pci endpoint function and to bind the endpoint function
with endpoint controller.
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/PCI/00-INDEX |2 +
Documentation/PCI/endpoint/pci-endpoint-cfs.txt |
Introduce a new EP core layer in order to support endpoint functions
in linux kernel. This comprises of EPC library
(Endpoint Controller Library) and EPF library (Endpoint
Function Library). EPC library implements functions that is specific
to an endpoint controller and EPF library implements funct
Add PCI endpoint test driver that can verify base address
register, legacy interrupt/MSI interrupt and read/write/copy
buffers between host and device. The corresponding pci-epf-test
function driver should be used on the EP side.
Signed-off-by: Kishon Vijay Abraham I
---
drivers/misc/Kconfig
Add a simple test script that invokes the pcitest userspace tool
to perform all the PCI endpoint tests (BAR tests, interrupt tests,
read tests, write tests and copy tests).
Signed-off-by: Kishon Vijay Abraham I
---
tools/pci/pcitest.sh | 56 ++
1
Add documentation to help users use pci-epf-test function driver
and pci_endpoint_test host driver for testing PCI.
Signed-off-by: Kishon Vijay Abraham I
---
Documentation/PCI/endpoint/pci-test-howto.txt | 167 +
1 file changed, 167 insertions(+)
create mode 100644 Docu
Add a userspace tool to invoke the ioctls exposed by the
PCI endpoint test driver to perform various PCI tests.
Signed-off-by: Kishon Vijay Abraham I
---
tools/pci/pcitest.c | 186 +++
1 file changed, 186 insertions(+)
create mode 100644 tools/pc
Add endpoint mode support to designware driver. This uses the
EP Core layer introduced recently to add endpoint mode support.
*Any* function driver can now use this designware device
in order to achieve the EP functionality.
Signed-off-by: Kishon Vijay Abraham I
---
drivers/pci/dwc/Kconfig
Add maintainer for the newly introduced PCI EP framework.
Signed-off-by: Kishon Vijay Abraham I
---
MAINTAINERS |9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8672f18..62b86af 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9407,6 +9407,15 @@ F:
The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should
be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO
in RC mode. However in EP mode, the host system is not able to access the
MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.
Acked-by: Tony Lindgren
Adds a new endpoint function driver (to program the virtual
test device) making use of the EP-core library.
Signed-off-by: Kishon Vijay Abraham I
---
drivers/pci/endpoint/Kconfig |2 +
drivers/pci/endpoint/Makefile |2 +-
drivers/pci/endpoint/functions/Kc
On 17.02.2017 02:08, Kees Cook wrote:
> On Thu, Feb 16, 2017 at 2:25 PM, Pavel Machek wrote:
>> Hi!
>>
>>>
>>> -config DEBUG_RODATA
>>> +config STRICT_KERNEL_RWX
>>> bool "Make kernel text and rodata read-only" if
>>> ARCH_OPTIONAL_KERNEL_RWX
>>> depends on ARCH_HAS_STRICT_KERNEL_RWX
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