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2017-06-23 12:08 GMT+08:00 Yang Zhang :
> On 2017/6/22 19:50, Wanpeng Li wrote:
>>
>> 2017-06-22 19:22 GMT+08:00 root :
>>>
>>> From: Yang Zhang
>>>
>>> Some latency-intensive workload will see obviously performance
>>>
On 2017/6/22 19:50, Wanpeng Li wrote:
2017-06-22 19:22 GMT+08:00 root :
From: Yang Zhang
Some latency-intensive workload will see obviously performance
drop when running inside VM. The main reason is that the overhead
is amplified when running
On 2017/6/22 22:23, Thomas Gleixner wrote:
On Thu, 22 Jun 2017, root wrote:
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -39,6 +39,10 @@
#include
#include
+#ifdef CONFIG_HYPERVISOR_GUEST
+unsigned long poll_threshold_ns;
+#endif
+
/*
* per-CPU TSS segments. Threads
On 2017/6/22 22:32, Thomas Gleixner wrote:
On Thu, 22 Jun 2017, root wrote:
@@ -962,6 +962,7 @@ __visible void __irq_entry smp_apic_timer_interrupt(struct
pt_regs *regs)
* interrupt lock, which is the WrongThing (tm) to do.
*/
entering_ack_irq();
+ check_poll();
On 2017/6/22 19:51, Paolo Bonzini wrote:
On 22/06/2017 13:22, root wrote:
==
+poll_grow: (X86 only)
+
+This parameter is multiplied in the grow_poll_ns() to increase the poll time.
+By default, the values is 2.
+
Hi Yang,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.12-rc6]
[cannot apply to tip/x86/core next-20170622]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/root/x86
Tetsuo Handa wrote:
> Roman Gushchin wrote:
> > On Thu, Jun 22, 2017 at 09:40:28AM +0900, Tetsuo Handa wrote:
> > > Roman Gushchin wrote:
> > > > --- a/mm/oom_kill.c
> > > > +++ b/mm/oom_kill.c
> > > > @@ -992,6 +992,13 @@ bool out_of_memory(struct oom_control *oc)
> > > > if
Roman Gushchin wrote:
> On Thu, Jun 22, 2017 at 09:40:28AM +0900, Tetsuo Handa wrote:
> > Roman Gushchin wrote:
> > > --- a/mm/oom_kill.c
> > > +++ b/mm/oom_kill.c
> > > @@ -992,6 +992,13 @@ bool out_of_memory(struct oom_control *oc)
> > > if (oom_killer_disabled)
> > > return false;
>
On Thu, Jun 22, 2017 at 07:21:03PM +1000, Balbir Singh wrote:
> On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote:
> > Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6,
> > in the 4K backed HPTE pages. These bits continue to be used
> > for 64K backed HPTE pages in this patch, but will be
On Thu, Jun 22, 2017 at 11:17 AM, Mark Rutland wrote:
> On Thu, Jun 22, 2017 at 11:13:08AM -0700, Hoan Tran wrote:
>> On Thu, Jun 22, 2017 at 10:52 AM, Mark Rutland wrote:
>> > On Tue, Jun 06, 2017 at 11:02:26AM -0700, Hoan Tran wrote:
>> > > static
Hi Mark,
On Thu, Jun 22, 2017 at 11:18 AM, Mark Rutland wrote:
> On Thu, Jun 22, 2017 at 06:52:56PM +0100, Mark Rutland wrote:
>> Hi Hoan,
>>
>> This largely looks good; I have one minor comment.
>>
>> On Tue, Jun 06, 2017 at 11:02:26AM -0700, Hoan Tran wrote:
>> > static
On Thu, Jun 22, 2017 at 06:52:56PM +0100, Mark Rutland wrote:
> Hi Hoan,
>
> This largely looks good; I have one minor comment.
>
> On Tue, Jun 06, 2017 at 11:02:26AM -0700, Hoan Tran wrote:
> > static inline void
> > +xgene_pmu_write_counter64(struct xgene_pmu_dev *pmu_dev, int idx, u64 val)
>
On Thu, Jun 22, 2017 at 11:13:08AM -0700, Hoan Tran wrote:
> On Thu, Jun 22, 2017 at 10:52 AM, Mark Rutland wrote:
> > On Tue, Jun 06, 2017 at 11:02:26AM -0700, Hoan Tran wrote:
> > > static inline void
> > > +xgene_pmu_write_counter64(struct xgene_pmu_dev *pmu_dev, int
Hi Mark,
On Thu, Jun 22, 2017 at 10:52 AM, Mark Rutland wrote:
>
> Hi Hoan,
>
> This largely looks good; I have one minor comment.
>
> On Tue, Jun 06, 2017 at 11:02:26AM -0700, Hoan Tran wrote:
> > static inline void
> > +xgene_pmu_write_counter64(struct xgene_pmu_dev
On Tue, Jun 06, 2017 at 11:02:25AM -0700, Hoan Tran wrote:
> This patch moves PMU leaf functions into a function pointer structure.
> It helps code maintain and expasion easier.
>
> Signed-off-by: Hoan Tran
> ---
> drivers/perf/xgene_pmu.c | 85
>
Hi Hoan,
This largely looks good; I have one minor comment.
On Tue, Jun 06, 2017 at 11:02:26AM -0700, Hoan Tran wrote:
> static inline void
> +xgene_pmu_write_counter64(struct xgene_pmu_dev *pmu_dev, int idx, u64 val)
> +{
> + u32 cnt_lo, cnt_hi;
> +
> + cnt_hi = upper_32_bits(val);
> +
On Thu, Jun 22, 2017 at 09:40:28AM +0900, Tetsuo Handa wrote:
> Roman Gushchin wrote:
> > --- a/mm/oom_kill.c
> > +++ b/mm/oom_kill.c
> > @@ -992,6 +992,13 @@ bool out_of_memory(struct oom_control *oc)
> > if (oom_killer_disabled)
> > return false;
> >
> > + /*
> > +* If
On 6/22/2017 5:56 AM, Borislav Petkov wrote:
On Fri, Jun 16, 2017 at 01:54:59PM -0500, Tom Lendacky wrote:
The IOMMU is programmed with physical addresses for the various tables
and buffers that are used to communicate between the device and the
driver. When the driver allocates this memory it
On Tue, Jun 06, 2017 at 11:02:24AM -0700, Hoan Tran wrote:
> This patch parses PMU Subnode from a match table.
>
> Signed-off-by: Hoan Tran
> ---
> drivers/perf/xgene_pmu.c | 40 ++--
> 1 file changed, 30 insertions(+), 10 deletions(-)
>
>
On Fri, 16 Jun 2017 20:34:32 +0900
SeongJae Park wrote:
> This commit applies commit 388f9b20f98d ("Documentation/process/howto:
> Only send regression fixes after -rc1") to Korean translation.
Applied to the docs tree, thanks.
jon
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On Wed, 14 Jun 2017 12:24:12 +0200
Steffen Maier wrote:
> Another place in lib/Kconfig.debug was already fixed in commit f8998c226587
> ("lib/Kconfig.debug: correct documentation paths").
Applied to the docs tree, thanks.
jon
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On Mon, 19 Jun 2017 15:31:22 +1000
Stewart Smith wrote:
> IBM Verse is a web UI around Lotus Domino mail servers (much like
> the Lotus Notes client talks to Domino servers).
>
> For various reasons, it is not at all suitable for kernel development,
> all of which
On Thu, Jun 22, 2017 at 09:15:39AM -0700, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> The Devicetree Specification has superseded the ePAPR as the
> base specification for bindings. Update files in Documentation
> to reference the new document.
>
> First
On Fri 2017-05-26 14:12:28, Luis R. Rodriguez wrote:
> If we reach the limit of modprobe_limit threads running the next
> request_module() call will fail. The original reason for adding
> a kill was to do away with possible issues with in old circumstances
> which would create a recursive series
On Thu, 22 Jun 2017, root wrote:
> @@ -962,6 +962,7 @@ __visible void __irq_entry
> smp_apic_timer_interrupt(struct pt_regs *regs)
>* interrupt lock, which is the WrongThing (tm) to do.
>*/
> entering_ack_irq();
> + check_poll();
No way, that we sprinkle this function
On Thu, 22 Jun 2017, root wrote:
> --- a/arch/x86/kernel/process.c
> +++ b/arch/x86/kernel/process.c
> @@ -39,6 +39,10 @@
> #include
> #include
>
> +#ifdef CONFIG_HYPERVISOR_GUEST
> +unsigned long poll_threshold_ns;
> +#endif
> +
> /*
> * per-CPU TSS segments. Threads are completely
On 22/06/2017 13:22, root wrote:
> ==
>
> +poll_grow: (X86 only)
> +
> +This parameter is multiplied in the grow_poll_ns() to increase the poll time.
> +By default, the values is 2.
> +
>
2017-06-22 19:22 GMT+08:00 root :
> From: Yang Zhang
>
> Some latency-intensive workload will see obviously performance
> drop when running inside VM. The main reason is that the overhead
> is amplified when running inside VM. The most cost i have
On Wed, Jun 21, 2017 at 02:10:03AM +0300, Yury Norov wrote:
> On Mon, Jun 19, 2017 at 04:58:16PM +0100, James Morse wrote:
> > Hi Yury,
[...]
> > This is confusing as 'is_compat_task()' matches one of aarch32 or ilp32, but
> > compat_user_mode(regs) only matches aarch32 as it checks the saved
On 2017/6/22 19:22, root wrote:
From: Yang Zhang
Sorry to use wrong username to send patch because i am using a new
machine which don't setup the git config well.
Some latency-intensive workload will see obviously performance
drop when running inside VM. The main
From: Yang Zhang
This patch introduce a new mechanism to poll for a while before
entering idle state.
David has a topic in KVM forum to describe the problem on current KVM VM
when running some message passing workload in KVM forum. Also, there
are some work to improve
From: Yang Zhang
use dynamic poll to reduce the cost when the event is not occurred during
poll. The idea is similar to current dynamic halt poll inside KVM:
Before entering idle, we will record the time. After wakeup from idle
(nomally, this is in interrupt handler), we
From: Yang Zhang
Some latency-intensive workload will see obviously performance
drop when running inside VM. The main reason is that the overhead
is amplified when running inside VM. The most cost i have seen is
inside idle path.
This patch introduces a new mechanism to
On Fri, 16 Jun, at 01:53:26PM, Tom Lendacky wrote:
> Boot data (such as EFI related data) is not encrypted when the system is
> booted because UEFI/BIOS does not run with SME active. In order to access
> this data properly it needs to be mapped decrypted.
>
> Update early_memremap() to provide an
On Fri, 16 Jun, at 01:53:17PM, Tom Lendacky wrote:
> When SME is active, pagetable entries created for EFI need to have the
> encryption mask set as necessary.
>
> When the new pagetable pages are allocated they are mapped encrypted. So,
> update the efi_pgt value that will be used in cr3 to
On Fri, 16 Jun, at 01:52:53PM, Tom Lendacky wrote:
> Add a function that will determine if a supplied physical address matches
> the address of an EFI table.
>
> Reviewed-by: Borislav Petkov
> Signed-off-by: Tom Lendacky
> ---
> drivers/firmware/efi/efi.c
On Fri, Jun 16, 2017 at 01:54:59PM -0500, Tom Lendacky wrote:
> The IOMMU is programmed with physical addresses for the various tables
> and buffers that are used to communicate between the device and the
> driver. When the driver allocates this memory it is encrypted. In order
> for the IOMMU to
On Fri, 16 Jun, at 01:53:06PM, Tom Lendacky wrote:
> The efi_mem_type() function currently returns a 0, which maps to
> EFI_RESERVED_TYPE, if the function is unable to find a memmap entry for
> the supplied physical address. Returning EFI_RESERVED_TYPE implies that
> a memmap entry exists, when it
On Fri, Jun 16, 2017 at 01:54:47PM -0500, Tom Lendacky wrote:
> Move the setting of the cpuinfo_x86.microcode field from amd_init() to
> early_amd_init() so that it is available earlier in the boot process. This
> avoids having to read MSR_AMD64_PATCH_LEVEL directly during early boot.
>
>
On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote:
> Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6,
> in the 4K backed HPTE pages. These bits continue to be used
> for 64K backed HPTE pages in this patch, but will be freed
> up in the next patch. The bit numbers are big-endian as
>
* Masahiro Yamada wrote:
> Documentation/kbuild/makefiles.txt says the change for align options
> occurred at GCC 3.0, and Documentation/process/changes.rst says the
> minimal supported GCC version is 3.2, so it should be safe to hard-code
> -falign* options.
>
>
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