>> Icelake and newer use CMCI with a UCNA signature.
>>
>
> I have a question, does Intel use #MC to report UCNA errors?
No. They are reported with CMCI[1] (assuming it is enabled by IA32_MCi_CTL2 bit
30).
-Tony
[1] Usage evolved and naming did not keep up. An "Uncorrected" error is being
> > Which types exactly do you mean when you're looking at the severities[]
> > array in severity.c?
> >
> > And what scenario are you talking about?
> >
> > To get an #MC exception and detect only UCNA/SRAO errors? Can that even
> > happen on any hardware?
> >
>
> Yes, I mean an #MC exception
> I have been using this on two different test machines, as well as a
> chromebook, and it appears to work on all ofthem. As well as for VMs. I
> plan on adding this to my workstation and server too (they use EFI).
I think that BIOS on Intel servers with ECC memory will stomp on all
memory (to
> Do ECC servers wipe their RAM by default? I know that if you build with
> CONFIG_RESET_ATTACK_MITIGATION=y on an EFI system that supports the
> MemoryOverwriteRequestControl EFI variable you'll get a RAM wipe...
I know that after I've been running RAS tests that inject ECC errors into
>> I forgot to mention that this makes it trivial for any machine that doesn't
>> clear memory on soft-reboot, to enable console ramoops (to have access to
>> the last boot dmesg without needing serial).
>>
>> I tested this on a couple of my test boxes and on QEMU, and it works rather
>> well.
>
> Slow devices such as flash may not meet the default 1ms timeout value,
> so use the ERST max execution time value as the timeout if it is larger
> and if the ERST has the "slow" attribute set.
>
> Example:
> A NOR flash spec lists "Page program time (256 bytes)" as 120us typical,
> and 1800us
