On 07/04/2018 09:53 AM, Shilpasri G Bhat wrote:
Hi Guenter,
Thanks for reviewing the patch.
On 07/04/2018 08:16 PM, Guenter Roeck wrote:
+/* Disable if last sensor in the group */
+send_command = true;
+for (i = 0; i < sg->nr_sensor; i++) {
+struct sensor_dat
Hi Guenter,
Thanks for reviewing the patch.
On 07/04/2018 08:16 PM, Guenter Roeck wrote:
>> +/* Disable if last sensor in the group */
>> +send_command = true;
>> +for (i = 0; i < sg->nr_sensor; i++) {
>> +struct sensor_data *sd = sg->sensors[i];
>> +
>> +
On 07/04/2018 02:16 AM, Shilpasri G Bhat wrote:
On-Chip-Controller(OCC) is an embedded micro-processor in POWER9 chip
which measures various system and chip level sensors. These sensors
comprises of environmental sensors (like power, temperature, current
and voltage) and performance sensors (like
Adds support to enable/disable a sensor group at runtime. This
can be used to select the sensor groups that needs to be copied to
main memory by OCC. Sensor groups like power, temperature, current,
voltage, frequency, utilization can be enabled/disabled at runtime.
Signed-off-by: Shilpasri G Bhat
This patch series adds new attribute to enable or disable a sensor in
runtime.
v1 : https://lkml.org/lkml/2018/3/22/214
Shilpasri G Bhat (2):
powernv:opal-sensor-groups: Add support to enable sensor groups
hwmon: ibmpowernv: Add attributes to enable/disable sensor groups
Documentation/hwmon
On-Chip-Controller(OCC) is an embedded micro-processor in POWER9 chip
which measures various system and chip level sensors. These sensors
comprises of environmental sensors (like power, temperature, current
and voltage) and performance sensors (like utilization, frequency).
All these sensors are co
This patch set adds BIOS Post code (BPC) support for the
Nuvoton NPCM7xx Baseboard Management Controller (BMC).
Nuvoton BMC NPCM7xx BIOS Post Code (BPC) monitoring two
configurable I/O addresses written by the host on the
Low Pin Count (LPC) bus, the capure data stored in 128-word FIFO.
NPCM7xx B
Added device tree binding documentation for Nuvoton BMC
NPCM7xx BIOS Post Code (BPC).
The NPCM7xx BPC monitoring two configurable I/O addresses
written by the host on Low Pin Count (LPC) bus.
Signed-off-by: Tomer Maimon
---
.../devicetree/bindings/bmc/npcm7xx-lpc-bpc.txt| 26
Add Nuvoton BMC NPCM7xx BIOS post code (BPC) driver.
The NPCM7xx BPC monitoring two I/O address written by
the host on the Low Pin Count (LPC) bus, the capure
data stored in 128-word FIFO.
Signed-off-by: Tomer Maimon
---
drivers/misc/Kconfig | 8 +
drivers/misc/Makefile |
