On Fri, Jul 19, 2019 at 08:01:21PM +0200, Björn Gerhart wrote:
> Hi Guenter,
>
> I reworked the code after studying the details of the spec.
>
> Changes:
> - patch created against the tree of the kernel sources base dir
> - only define the different registers in contrast to nct6106
> - fixed deta
Hi Guenter,
I reworked the code after studying the details of the spec.
Changes:
- patch created against the tree of the kernel sources base dir
- only define the different registers in contrast to nct6106
- fixed details of the fan configuration
Signed-off-by: Bjoern Gerhart
---
diff -Naur a/d
On Fri, Jul 19, 2019 at 06:30:56PM +0300, Marcel Bocu wrote:
> On 19/07/2019 16:27, Guenter Roeck wrote:
> > Hi Marcel,
> >
> > On 7/19/19 12:40 AM, Marcel Bocu wrote:
> >> On 18/07/2019 22:33, Guenter Roeck wrote:
> >>> On Thu, Jul 18, 2019 at 09:26:16PM +0300, Marcel Bocu wrote:
> The AMD R
On 19/07/2019 16:27, Guenter Roeck wrote:
> Hi Marcel,
>
> On 7/19/19 12:40 AM, Marcel Bocu wrote:
>> On 18/07/2019 22:33, Guenter Roeck wrote:
>>> On Thu, Jul 18, 2019 at 09:26:16PM +0300, Marcel Bocu wrote:
The AMD Ryzen gen 3 processors came with a different PCI IDs for the
function 3
Hi Marcel,
On 7/19/19 12:40 AM, Marcel Bocu wrote:
On 18/07/2019 22:33, Guenter Roeck wrote:
On Thu, Jul 18, 2019 at 09:26:16PM +0300, Marcel Bocu wrote:
The AMD Ryzen gen 3 processors came with a different PCI IDs for the
function 3 & 4 which are used to access the SMN interface. The root
PCI
On 18/07/2019 22:33, Guenter Roeck wrote:
> On Thu, Jul 18, 2019 at 09:26:16PM +0300, Marcel Bocu wrote:
>> The AMD Ryzen gen 3 processors came with a different PCI IDs for the
>> function 3 & 4 which are used to access the SMN interface. The root
>> PCI address however remained at the same address
