When setting up to transmit, a race exists between the ISR and
i2c_davinci_xfer_msg() trying to load the first byte and adjust counters.
This is mostly visible for transmits > 1 byte long.
The hardware starts sending immediately that MDR is loaded. IMR trickery
doesn't work because if we start sen
When setting up to transmit, a race exists between the ISR and
i2c_davinci_xfer_msg() trying to load the first byte and adjust counters.
This is mostly visible for transmits > 1 byte long.
The hardware starts sending immediately that MDR is loaded. IMR trickery
doesn't work because if we start sen
* Felipe Balbi [100826 00:34]:
> Hi,
>
> On Thu, Aug 26, 2010 at 09:36:44AM +0200, Nyman Mathias (Nokia-MS/Helsinki)
> wrote:
> >If the i2c bus receives an interrupt with both BB (bus busy) and
> >ARDY (register access ready) statuses set during the tranfer of the last
> >message
> >the bus was
On 9/16/2010 10:37 AM, Kevin Hilman wrote:
> Jon Povey writes:
>
>> When setting up to transmit, a race exists between the ISR and
>> i2c_davinci_xfer_msg() trying to load the first byte and adjust counters.
>> This is mostly visible for transmits > 1 byte long.
>>
>> The ISR may run at any time
Jon Povey writes:
> When setting up to transmit, a race exists between the ISR and
> i2c_davinci_xfer_msg() trying to load the first byte and adjust counters.
> This is mostly visible for transmits > 1 byte long.
>
> The ISR may run at any time after the mode register has been set.
> While we are
When setting up to transmit, a race exists between the ISR and
i2c_davinci_xfer_msg() trying to load the first byte and adjust counters.
This is mostly visible for transmits > 1 byte long.
The ISR may run at any time after the mode register has been set.
While we are setting up and loading the fir
On 09/15/10 07:32, Donggeun Kim wrote:
> Changes from V1 to V2:
> - I2C read and write wrapping functions are removed.
> - The error handling routines are inserted.
> - The similar functions are created by macro invocation.
> - Some attribute names are changed.
> - Some event attribute names are ch
Provide configuration and compilation support for LP5521 and LP5523
Signed-off-by: Samu Onkalo
---
drivers/leds/Kconfig | 18 ++
drivers/leds/Makefile |2 ++
2 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index e
Create sub directory Documentation/leds and
add short documentation for LP5521 and LP5523 drivers.
Signed-off-by: Samu Onkalo
---
Documentation/leds/leds-lp5521.txt | 85
Documentation/leds/leds-lp5523.txt | 81 ++
2 files
Patch set provides support for LP5521 and LP5523 LED driver chips
from National Semicondutor. Both drivers supports programmable engines
and naturally LED class features.
Documentation is provided as a part of the patch set.
I created "leds" sub directory to Documentation.
Perhaps rest of the leds
LP5523 chip is nine channel led driver with programmable engines.
Driver provides support for that chip for direct access via led class or
via programmable engines.
Signed-off-by: Samu Onkalo
---
drivers/leds/leds-lp5523.c | 1063 +++
include/linux/leds-l
LP5521 chip is three channel led driver with programmable engines.
Driver provides support for that chip for direct access via led class or
via programmable engines.
Signed-off-by: Samu Onkalo
---
drivers/leds/leds-lp5521.c | 820 +++
include/linux/leds-
I2C driver of Topcliff PCH
Topcliff PCH is the platform controller hub that is going to be used in
Intel's upcoming general embedded platform. All IO peripherals in
Topcliff PCH are actually devices sitting on AMBA bus.
Topcliff PCH has I2C I/F. Using this I/F, it is able to access system
devices
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