On Fri, Jan 6, 2012 at 8:47 AM, Stephen Warren wrote:
> Ben Dooks wrote at Friday, January 06, 2012 9:26 AM:
>> On Tue, Dec 20, 2011 at 01:47:29PM -0800, Stephen Warren wrote:
>> > Shubhrajyoti Datta wrote at Monday, December 19, 2011 11:15 PM:
>> > ...
>> > > Hi Stephen ,
>> > > could you check t
Ben Dooks wrote at Friday, January 06, 2012 9:26 AM:
> On Tue, Dec 20, 2011 at 01:47:29PM -0800, Stephen Warren wrote:
> > Shubhrajyoti Datta wrote at Monday, December 19, 2011 11:15 PM:
> > ...
> > > Hi Stephen ,
> > > could you check this one also
> > > thanks.
> > >
> > > From: Shubhrajyoti D
>
On Thu, Jan 05, 2012 at 04:13:51PM -0800, Kevin Hilman wrote:
> Hi Ben,
>
> Here's a few OMAP I2C updates for the v3.3 merge window.
ok, added these to my i2c-next and for-33/i2c/omap.
> Thanks,
>
> Kevin
>
> The following changes since commit 3f6b2a8bd6e4ff43269d89066a9fe06a0e5ba961:
>
>
On Mon, Dec 26, 2011 at 04:44:41PM +0530, Alok Chauhan wrote:
> From: Alok Chauhan
>
> In NACK error condition, I2C controller violates
> clock-to-data setup time before stop. In Software,
> because of this reset of controller is happening
> before I2C controller could complete STOP condition.
>
On Tue, Dec 20, 2011 at 12:55:59PM +0530, Shubhrajyoti D wrote:
> The omap_i2c_remove function may not be needed after
> device exit so the memory could be freed.
>
> Signed-off-by: Shubhrajyoti D
Will add this later.
> ---
> drivers/i2c/busses/i2c-omap.c |5 ++---
> 1 files changed, 2 ins
On Tue, Dec 20, 2011 at 01:47:29PM -0800, Stephen Warren wrote:
> Shubhrajyoti Datta wrote at Monday, December 19, 2011 11:15 PM:
> ...
> > Hi Stephen ,
> > could you check this one also
> > thanks.
> >
> > From: Shubhrajyoti D
> > Date: Tue, 20 Dec 2011 11:40:51 +0530
> > Subject: [PATCH] I2C :
On Sat, Dec 17, 2011 at 11:29:29PM -0700, Stephen Warren wrote:
> This fixes some section mismatch build warnings.
>
> Signed-off-by: Stephen Warren
> ---
> v2: New patch.
>
> drivers/i2c/busses/i2c-tegra.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/driver
Hi Daniel,
On Fri, 6 Jan 2012 18:58:19 +0800, Daniel Kurtz wrote:
> This is a second version of a set of patches enables the Intel PCH SMBus
> controller interrupt. It refactors the second two patches a little bit by
> relying on DEV_ERR interrupt for timeouts, instead of using an explicit
> wai
1) As a slight optimization, pull some logic out of the byte loop during
byte-by-byte transactions by just setting the I801_LAST_BYTE bit, as
defined in the i801 (PCH) datasheet, when reading the last byte of a
byte-by-byte I2C_SMBUS_READ.
2) Clear INTR after clearing BYTE_DONE per ICH10 datasheet
Add a new 'feature' to i2c-i801 to enable using i801 interrupts.
When the feature is enabled, then an isr is installed for the device's
pci irq.
An i2c/smbus transaction is always terminated by one of the following
interrupt sources: FAILED, BUS_ERR, DEV_ERR, or on success: INTR
When the isr fire
Byte-by-byte transactions are used primarily for accessing i2c devices
with an smbus controller. For these transactions, for each byte that is
read or written, the SMBus controller generates a BYTE_DONE irq. The isr
reads/writes the next byte, and clears the irq flag to start the next byte.
On th
This is a second version of a set of patches enables the Intel PCH SMBus
controller interrupt. It refactors the second two patches a little bit by
relying on DEV_ERR interrupt for timeouts, instead of using an explicit
wait_event_timeout.
The first attempt received absolutely no response. Maybe t
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