It does.
The bug appears with fairly-sized read transactions (in the order of kB)
returning corrupted data.
Josef
> Josef.
>
> This fixes a real bug for us does it not, some failure case with a
> sustained amount of traffic ?
>
>
> Bryan
>
>
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From a969728248c3b439dc97a69e7dac133b5efa34e7 Mon Sep 17 00:00:00 2001
From: Josef Ahmad
Date: Fri, 19 Apr 2013 17:28:10 +0100
Subject: [PATCH] i2c-designware: fix RX FIFO overrun
i2c_dw_xfer_msg() pushes a number of bytes to transmit/receive
to/from the bus into the TX FIFO.
For master-rx tran
On Fri, Apr 19, 2013 at 05:26:23PM +0530, Yuvaraj Kumar C D wrote:
> This patch configure the High speed mode timing register using the
> clock speed mentioned in the dts file.Also it configure the MASTER_ID
> for High speed i2c transfer.
> For i2c high speed transaction, tarnsaction initially star
On Fri, Apr 19, 2013 at 09:13:54AM +, EUNBONG SONG wrote:
>
>
> On Fri, Apr 19, 2013 at 12:01:04AM +, EUNBONG SONG wrote:
> >>
> >> I think HZ/50 is better than 2 for adapter timeout.
>
> > Basically OK. But why HZ/50? Most drivers use HZ.
>
> Actually, I just translated 2 jiffies bec
On Thu, Apr 18, 2013 at 07:40:16AM +, 송은봉 wrote:
>
> I rewrite my patch because the patch before i sent have many white space.
> Thanks!
This should have been below the "---" after the sigend-off.
> ---
> I've been debugging the abnormal operation of i2c on octeon.
> If a process is terminat
Hi Lucas,
On 19/04/2013 13:53, Lucas Stach wrote:
> Hi Alexandre,
>
> Am Freitag, den 19.04.2013, 13:37 +0200 schrieb Alexandre Belloni:
>> Hi,
>>
>> I'm having some issues with the i2c-mxs driver in 3.9. Marek already
>> pointed me to the patches from Lucas and that greatly improved the
>> situat
On 19/04/2013 13:49, Marek Vasut wrote:
> Looks like there's a fixes 7-second delay. Like a timeout maybe?
Yeah, probably, I'm reading 6 times 3 registers of the ADC
BTW, the code is there:
https://github.com/crystalfontz/cfa_10036_kernel/blob/cfa-3.9-12-10049-i2c-adc/drivers/iio/adc/nau7802.c
-
This patch configure the High speed mode timing register using the
clock speed mentioned in the dts file.Also it configure the MASTER_ID
for High speed i2c transfer.
For i2c high speed transaction, tarnsaction initially starts with the
fast mode i,e 400Kbits/sec and then switches to high speed mode
Hi Alexandre,
Am Freitag, den 19.04.2013, 13:37 +0200 schrieb Alexandre Belloni:
> Hi,
>
> I'm having some issues with the i2c-mxs driver in 3.9. Marek already
> pointed me to the patches from Lucas and that greatly improved the
> situation.
>
> For the context, my board has three nau7802 adcs,
Dear Alexandre Belloni,
> Hi,
>
> I'm having some issues with the i2c-mxs driver in 3.9. Marek already
> pointed me to the patches from Lucas and that greatly improved the
> situation.
>
> For the context, my board has three nau7802 adcs, connected to a gpio
> i2c-muxer, connected to i2c1.
>
>
On 4/18/2013 10:43 PM, Wolfram Sang wrote:
> Driver core already takes care of refcounting, no need to do this on
> driver level again.
>
> Signed-off-by: Wolfram Sang
Tested I2C probe on DA850 EVM.
Tested-by: Sekhar Nori
Thanks,
Sekhar
> ---
> drivers/i2c/busses/i2c-davinci.c | 19 ++
Hi,
I'm having some issues with the i2c-mxs driver in 3.9. Marek already
pointed me to the patches from Lucas and that greatly improved the
situation.
For the context, my board has three nau7802 adcs, connected to a gpio
i2c-muxer, connected to i2c1.
Here is what I observe:
On 3.9:
# time cat
On 04/19/2013 11:11 AM, ludovic.desroc...@atmel.com :
> From: Ludovic Desroches
>
> Add DMA resources to i2c nodes.
>
> Signed-off-by: Ludovic Desroches
I have made little corrections, but do not bother, it is already in my tree:
[nicolas.fe...@atmel.com: correct 9n12 dma phandle name]
Acke
On 04/19/2013 11:11 AM, ludovic.desroc...@atmel.com :
> From: Ludovic Desroches
>
> Add DMA resources to MCI nodes.
>
> Signed-off-by: Ludovic Desroches
I have made little corrections, but do not bother, it is already in my tree:
[nicolas.fe...@atmel.com: correct 9g45, 9n12 dma phandle name]
On Thu, Apr 18, 2013 at 07:13:38PM +0200, Wolfram Sang wrote:
> Driver core already takes care of refcounting, no need to do this on
> driver level again.
>
> Signed-off-by: Wolfram Sang
Tested-by: Mika Westerberg
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On Thu, Apr 18, 2013 at 07:13:37PM +0200, Wolfram Sang wrote:
> Driver core already takes care of refcounting, no need to do this on
> driver level again.
>
> Signed-off-by: Wolfram Sang
Tested-by: Mika Westerberg
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On 04/19/2013 11:11 AM, ludovic.desroc...@atmel.com :
> From: Ludovic Desroches
>
> Moving to generic DMA DT binding involves to set #dma-cells to 2.
>
> Signed-off-by: Ludovic Desroches
Acked-by: Nicolas Ferre
And stacked in at91-3.10-soc.
thanks,
> ---
> arch/arm/boot/dts/at91sam9g45.dt
On Fri, Apr 19, 2013 at 12:01:04AM +, EUNBONG SONG wrote:
>>
>> I think HZ/50 is better than 2 for adapter timeout.
> Basically OK. But why HZ/50? Most drivers use HZ.
Actually, I just translated 2 jiffies because HZ is 100 in default cavium
config.
You can find that in "arch/mips/confi
From: Ludovic Desroches
Add DMA resources to MCI nodes.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/at91sam9g45.dtsi | 4
arch/arm/boot/dts/at91sam9n12.dtsi | 2 ++
arch/arm/boot/dts/at91sam9x5.dtsi | 4
arch/arm/boot/dts/sama5d3.dtsi | 6 ++
4 files changed, 16 i
From: Ludovic Desroches
Use generic DMA DT helper. Platforms booting with or without DT populated are
both supported.
Signed-off-by: Ludovic Desroches
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Nicolas Ferre
---
drivers/mmc/host/atmel-mci.c | 25 -
1 file ch
From: Ludovic Desroches
Add DMA resources to i2c nodes.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/at91sam9n12.dtsi | 6 ++
arch/arm/boot/dts/at91sam9x5.dtsi | 9 +
arch/arm/boot/dts/sama5d3.dtsi | 9 +
3 files changed, 24 insertions(+)
diff --git a/arch/a
From: Ludovic Desroches
Use generic DMA DT helper. Platforms booting with or without DT populated are
both supported.
Signed-off-by: Ludovic Desroches
Acked-by: Nicolas Ferre
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
---
drivers/i2c/busses/i2c-at91.c | 49 ++-
From: Ludovic Desroches
Moving to generic DMA DT binding involves to set #dma-cells to 2.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/at91sam9g45.dtsi | 1 +
arch/arm/boot/dts/at91sam9n12.dtsi | 1 +
arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
arch/arm/boot/dts/sama5d3.dtsi | 4 +
From: Ludovic Desroches
Update at_hdmac driver to support generic DMA device tree binding. Devices
can still request channel with dma_request_channel() then it doesn't break
DMA for non DT boards.
Signed-off-by: Ludovic Desroches
Acked-by: Nicolas Ferre
Acked-by: Jean-Christophe PLAGNIOL-VILLA
From: Ludovic Desroches
Hi,
I resend the set of patches due to minor fixes. I think patches will go through
different subsytems.
Patch 1/6: dma subsystem
Patch 2/6, 4/6, 6/6: arm-soc
Patch 3/6: i2c subsystem, already taken by Wolfram, thx.
Patch 5/6: mmc subsystem
v3 changes:
- compile at_dma_
On Fri, Apr 19, 2013 at 12:01:04AM +, EUNBONG SONG wrote:
>
> I think HZ/50 is better than 2 for adapter timeout.
Basically OK. But why HZ/50? Most drivers use HZ.
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