On 6/19/2013 3:13 AM, Wolfram Sang wrote:
Even you prefer to extend v4l2, you still need this helper.
The idea is just to move the unregister/register from a specific ISP driver
to v4l2.
I think you misunderstood my pionts somehow. Let me clarfiy a little bit:
Current solution:
1. Platform co
On Fri, Jun 21, 2013 at 04:15:29PM +0200, Sebastian Hesselbarth wrote:
> from a quick check of the patch set (which you forgot to send to LKML)
> I am wondering why you didn't update the of matches struct with the new
> compatible for "marvell,mv78230-i2c"? This will save you from still
> having "
On Fri, Jun 21, 2013 at 05:03:23PM +0200, Wolfram Sang wrote:
>
> > > from a quick check of the patch set (which you forgot to send to LKML)
> > > I am wondering why you didn't update the of matches struct with the new
> > > compatible for "marvell,mv78230-i2c"? This will save you from still
> > >
> > from a quick check of the patch set (which you forgot to send to LKML)
> > I am wondering why you didn't update the of matches struct with the new
> > compatible for "marvell,mv78230-i2c"? This will save you from still
> > having "marvell,mv64xxx-i2c" as additional compatible to match device
>
On Fri, Jun 21, 2013 at 04:15:29PM +0200, Sebastian Hesselbarth wrote:
> On 06/21/13 16:07, Jason Cooper wrote:
> >On Fri, Jun 21, 2013 at 03:32:09PM +0200, Gregory CLEMENT wrote:
> >>The mv64xxx-i2c embedded in the Armada XP have a new feature to
> >>offload i2c transaction. This new version of th
On 06/21/2013 04:15 PM, Sebastian Hesselbarth wrote:
> On 06/21/13 16:07, Jason Cooper wrote:
>> On Fri, Jun 21, 2013 at 03:32:09PM +0200, Gregory CLEMENT wrote:
>>> The mv64xxx-i2c embedded in the Armada XP have a new feature to
>>> offload i2c transaction. This new version of the IP come also wit
On 06/21/13 16:07, Jason Cooper wrote:
On Fri, Jun 21, 2013 at 03:32:09PM +0200, Gregory CLEMENT wrote:
The mv64xxx-i2c embedded in the Armada XP have a new feature to
offload i2c transaction. This new version of the IP come also with
some errata. This lead to the introduction to a another compa
On Fri, Jun 21, 2013 at 03:32:09PM +0200, Gregory CLEMENT wrote:
> The mv64xxx-i2c embedded in the Armada XP have a new feature to
> offload i2c transaction. This new version of the IP come also with
> some errata. This lead to the introduction to a another compatible
> string.
>
> This commit spl
The mv64xxx-i2c embedded in the Armada XP have a new feature to
offload i2c transaction. This new version of the IP come also with
some errata. This lead to the introduction to a another compatible
string.
This commit split the i2c information into armada-370.dtsi and
armada-xp.dtsi. Most of the d
Hello,
this patch set adds support for the I2C Transaction Generator which
offloads CPU from managing I2C transfer step by step. This feature is
currently only available on the I2C controller IP embedded in the
Armada XP SoC.
This series also contains a real fix for the I2C controller of the
Arma
This commit adds checking whether clock-frequency property acquisition
has succeeded. If not, the frequency is set to 100kHz by default.
The Device Tree binding documentation is updated accordingly.
Based on the intials patches from Zbigniew Bodek
Signed-off-by: Gregory CLEMENT
Signed-off-by: Z
The I2C Transaction Generator offloads CPU from managing I2C
transfer step by step.
This feature is currently only available on Armada XP, so usage of
this mechanism is activated through device tree.
Based on the work of Piotr Ziecik and rewrote to use the new way of
handling multiples i2c messag
All the Armada XP (mv78230, mv78260 and mv78460) have a silicon issue
in the I2C controller which violate the i2c repeated start
timing. The I2C standard requires a minimum of 4.7us for the repeated
start condition whereas the I2C controller of the Armada XP this time
is 2.9us.
So this patch adds
This patch makes the SDA hold time configurable through device tree.
Signed-off-by: Christian Ruppert
Signed-off-by: Pierrick Hascoet
---
.../devicetree/bindings/i2c/i2c-designware.txt | 14 ++
arch/arc/boot/dts/abilis_tb100_dvk.dts | 10 +-
arch/arc/boot
From: Chew, Chiau Ee
If both IC_EMPTYFIFO_HOLD_MASTER_EN and IC_RESTART_EN are set to 1, the
Designware I2C controller doesn't generate RESTART unless user specifically
requests it by setting RESTART bit in IC_DATA_CMD register.
Since IC_EMPTYFIFO_HOLD_MASTER_EN setting can't be detected from ha
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