On 04/07/2014 08:56 AM, Wolfram Sang wrote:
>
>> I would suggest to add relaxed IO helper function to asm-generic/io.h
>> to be available for all archs. Then we can avoid this type of errors.
>
> I favour this, too. For the cadence driver, I needed a quick solution
> before linux-next breaks, tho
Mon, 7 Apr 2014 08:56:57 +0200 от Uwe Kleine-König
:
> Hello,
...
> > > On Sun, Apr 06, 2014 at 09:07:07PM +0200, Wolfram Sang wrote:
> > > > During development, the driver first really needed to depend on
> > > > COMMON_CLK only. Later, it was switched to writel_relaxed, but it was
> > > > forgot
Hi,
On 06/04/2014 19:18, Hans de Goede wrote:
> Hi,
>
> On 04/06/2014 05:37 PM, Wolfram Sang wrote:
>> On Sun, Apr 06, 2014 at 04:01:52PM +0200, Hans de Goede wrote:
>>> Hi,
>>>
>>> On 04/04/2014 02:26 PM, Wolfram Sang wrote:
> So what we really have is a single slave i2c host sort of. At leas
On Sun, Apr 06, 2014 at 05:37:29PM +0200, Wolfram Sang wrote:
> On Sun, Apr 06, 2014 at 04:01:52PM +0200, Hans de Goede wrote:
> > Hi,
> >
> > On 04/04/2014 02:26 PM, Wolfram Sang wrote:
> > >
> > >> So what we really have is a single slave i2c host sort of. At least
> > >> we could model it like
On Sun, Apr 06, 2014 at 07:18:25PM +0200, Hans de Goede wrote:
> Hi,
>
> On 04/06/2014 05:37 PM, Wolfram Sang wrote:
> > On Sun, Apr 06, 2014 at 04:01:52PM +0200, Hans de Goede wrote:
> >> Hi,
> >>
> >> On 04/04/2014 02:26 PM, Wolfram Sang wrote:
> >>>
> So what we really have is a single sla
On Sun, Apr 06, 2014 at 06:58:18PM +0100, One Thousand Gnomes wrote:
> On Sat, 5 Apr 2014 09:13:16 +0300
> "Westerberg, Mika" wrote:
>
> > On Sat, Apr 05, 2014 at 12:54:33AM +0300, Du, Wenkai wrote:
> > > >Interrupt masking is done already after each transaction.
> > >
> > > At end of transfer,
On Sun, Apr 06, 2014 at 05:31:04PM +0200, Wolfram Sang wrote:
> On Sun, Apr 06, 2014 at 04:54:24PM +0300, Kirill A. Shutemov wrote:
> > On Mon, Oct 21, 2013 at 07:14:28PM +0300, Mika Westerberg wrote:
> > > On Mon, Oct 21, 2013 at 08:05:42AM -0700, Benson Leung wrote:
> > > > Fixed 25Mhz clock inst
Hi,
On Thu, Jan 23, 2014 at 11:16:01AM -0800, Curt Brune wrote:
> Create a new hardware class under /sys/class/eeprom_dev
>
> EEPROM drivers can register their devices with the eeprom_dev class
> during instantiation.
>
> The registered devices show up as:
>
> /sys/class/eeprom_dev/eeprom0
>
Hi,
On 04/07/2014 09:49 AM, Boris BREZILLON wrote:
> Hi,
>
> On 06/04/2014 19:18, Hans de Goede wrote:
>> Hi,
>>
>> On 04/06/2014 05:37 PM, Wolfram Sang wrote:
>>> On Sun, Apr 06, 2014 at 04:01:52PM +0200, Hans de Goede wrote:
Hi,
On 04/04/2014 02:26 PM, Wolfram Sang wrote:
>>
Hi,
On 04/07/2014 10:15 AM, Maxime Ripard wrote:
> On Sun, Apr 06, 2014 at 07:18:25PM +0200, Hans de Goede wrote:
>> Hi,
>>
>> On 04/06/2014 05:37 PM, Wolfram Sang wrote:
>>> On Sun, Apr 06, 2014 at 04:01:52PM +0200, Hans de Goede wrote:
Hi,
On 04/04/2014 02:26 PM, Wolfram Sang wrot
> I had to check BYT specs about that and I couldn't find if it does
> posted-writes.
Then I would assume it does unless you can find a hardware engineer to
sign a statement in blood to that effect 8)
> Actually the following patch should fix the problem as well. Just move the
> HW enable to hap
On Mon, Apr 07, 2014 at 03:42:52PM +0100, One Thousand Gnomes wrote:
> > I had to check BYT specs about that and I couldn't find if it does
> > posted-writes.
>
> Then I would assume it does unless you can find a hardware engineer to
> sign a statement in blood to that effect 8)
Fair enough.
>
On Mon, 2014-04-07 at 10:37AM +0400, Alexander Shiyan wrote:
> Mon, 7 Apr 2014 08:31:00 +0200 от Uwe Kleine-König
> :
> > Hello,
> >
> > On Sun, Apr 06, 2014 at 09:07:07PM +0200, Wolfram Sang wrote:
> > > During development, the driver first really needed to depend on
> > > COMMON_CLK only. Later
On Mon, 2014-04-07 at 08:39AM +0200, Michal Simek wrote:
> On 04/07/2014 08:31 AM, Uwe Kleine-König wrote:
> > Hello,
> >
> > On Sun, Apr 06, 2014 at 09:07:07PM +0200, Wolfram Sang wrote:
> >> During development, the driver first really needed to depend on
> >> COMMON_CLK only. Later, it was switc
On Mon, 2014-04-07 at 08:31AM +0200, Uwe Kleine-König wrote:
> Hello,
>
> On Sun, Apr 06, 2014 at 09:07:07PM +0200, Wolfram Sang wrote:
> > During development, the driver first really needed to depend on
> > COMMON_CLK only. Later, it was switched to writel_relaxed, but it was
> > forgotten to upd
On Mon, 2014-04-07 at 11:02AM +0400, Alexander Shiyan wrote:
> Mon, 7 Apr 2014 08:56:57 +0200 от Uwe Kleine-König
> :
> > Hello,
> ...
> > > > On Sun, Apr 06, 2014 at 09:07:07PM +0200, Wolfram Sang wrote:
> > > > > During development, the driver first really needed to depend on
> > > > > COMMON_CL
Hello Sören,
On Mon, Apr 07, 2014 at 08:36:29AM -0700, Sören Brinkmann wrote:
> On Mon, 2014-04-07 at 10:37AM +0400, Alexander Shiyan wrote:
> > ARCH_ZYNC || (ARM && COMPILE_TEST)
>
> Why would you add Zynq to the dependencies? This driver should work on
> all ARM platforms (more or less, given t
When loading the i801 i2c bus driver on an i5-46xx CPU, and this chipset
http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/8-series-chipset-pch-datasheet.pdf
I see the following warning:
i801_smbus :00:1f.3: PCI INT C -> GSI 18 (level, low) -> IRQ 18
ACPI: resource :0
> -Original Message-
> From: Westerberg, Mika
> Sent: Monday, April 07, 2014 8:11 AM
> To: One Thousand Gnomes
> Cc: Du, Wenkai; linux-i2c@vger.kernel.org; Wolfram Sang;
> linux-ker...@vger.kernel.org
> Subject: Re: [PATCH] i2c-designware: Mask interrupts during i2c controller
> enable
>
[+cc Rafael, Matthew, linux-acpi]
Hi Prarit,
On Mon, Apr 7, 2014 at 12:00 PM, Prarit Bhargava wrote:
> When loading the i801 i2c bus driver on an i5-46xx CPU, and this chipset
> http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/8-series-chipset-pch-datasheet.pdf
>
> I see th
Hi Prarit,
> When loading the i801 i2c bus driver on an i5-46xx CPU, and this chipset
> http://www.intel.com/content/dam/www/public/us/en/documents/datash
> eets/8-series-chipset-pch-datasheet.pdf
>
> I see the following warning:
>
> i801_smbus :00:1f.3: PCI INT C -> GSI 18 (level, low) -> I
> If this is on a shipping BIOS, we might need to figure out some way to
> handle it. I don't remember anything in the ACPI spec that talks
> about issues like this, but maybe we should add something in PCI that
> notices if there's an ACPI device with the same resources and marks
> the PCI devic
On Mon, 7 Apr 2014 20:30:39 +, Matthew Garrett wrote:
> > If this is on a shipping BIOS, we might need to figure out some way to
> > handle it. I don't remember anything in the ACPI spec that talks
> > about issues like this, but maybe we should add something in PCI that
> > notices if there's
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