Fix for Dell P57G touchpad found, need advice on patch

Hi! I'm using Dell Inspiron 13, model P57G. It has a problem with the touchpad under Linux. Approximately half of the time, the touchpad is not working at all - the mouse cursor is not moving. In this case, there are error messages written to the kernel log every second: [ 53.127339] i2c_design

RE: [Patch v4] i2c: imx: implement bus recovery

From: Uwe Kleine-König Sent: Tuesday, September 08, 2015 5:27 AM > To: Gao Pan-B54642 > Cc: w...@the-dreams.de; linux-i2c@vger.kernel.org; Li Frank-B20596; Duan > Fugang-B38611; ker...@pengutronix.de > Subject: Re: [Patch v4] i2c: imx: implement bus recovery

Re: [PATCH] i2c-dev: Fix typo in ioctl name reference

On Thu, 10 Sep 2015 20:00:12 +0200, Wolfram Sang wrote: > On Tue, Sep 08, 2015 at 11:05:49AM +0200, Jean Delvare wrote: > > The ioctl is named I2C_RDWR for "I2C read/write". But references to it > > were misspelled "rdrw". Fix them. > > > > Signed-off-by: Jean Delvare > > Cc: Wolfram Sang > > W

Re: [PATCH] i2c-dev: Fix typo in ioctl name reference

On Tue, Sep 08, 2015 at 11:05:49AM +0200, Jean Delvare wrote: > The ioctl is named I2C_RDWR for "I2C read/write". But references to it > were misspelled "rdrw". Fix them. > > Signed-off-by: Jean Delvare > Cc: Wolfram Sang Wow! Amazing how long this went unnoticed/unfixed. > -#define I2C_RDRW_

[PATCH v3 1/7] i2c: img-scb: enable fencing for all versions of the ip

The code to read from the master read fifo, and write to the master write fifo, checks a bit in an SCB register before every byte to ensure that the fifo is not full (write fifo) or empty (read fifo). Due to clock domain crossing inside the SCB block the updated value of this bit is only visible af

[PATCH v3 5/7] i2c: img-scb: use line_status instead of i2c->line_status

i2c->line_status accumulates the line status bits that have been seen with each interrupt. As we're only interested in that bit from the current interrupt, refer to line_status (the argument to img_i2c_auto) instead of i2c->line_status. Signed-off-by: Sifan Naeem Reviewed-by: James Hartley ---

[PATCH v3 2/7] i2c: img-scb: do dummy writes before fifo access

Move scb_wr_rd_fence to before reading from fifo and writing to fifo to make sure the the first read/write is done after the required number of cycles. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologies I2C SCB driver") Signed-off-by: Sifan Naeem Acked-by: James Hogan Revie

[PATCH v3 4/7] i2c: img-scb: fix LOW and HIGH period values for the SCL clock

Currently, after determining the minimum value for the High period (TCKH) the remainder of the internal clock pulses is set as the Low period (TCKL). This causes the i2c clock duty cycle to be much less than 50%. Modify the starting position to TCKH and TCKL at 50% of the internal clock, and adjus

[PATCH v3 0/7] i2c: img-scb: fixes to support i2c on pistachio

The following patches are required to fix the existing driver to support i2c on pistachio. Tested on Pistachio bub using an Adafruit I2C Non-Volatile FRAM Breakout (256Kbit / 32KByte) eeprom. Used i2c buildroot tools to test the eeprom and the other i2c blocks. Also used dd commands to copy data

[PATCH v3 6/7] i2c: img-scb: Clear line and interrupt status before starting a transfer

Clear line status and all generated interrupts from the interrupt status register before starting a transfer, as we may have unserviced interrupts from previous transfers that might be handled in the context of the new transfer. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologi

[PATCH v3 3/7] i2c: img-scb: use DIV_ROUND_UP to round divisor values

Using % can be slow depending on the architecture. Using DIV_ROUND_UP is nicer and more efficient way to do it. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologies I2C SCB driver") Signed-off-by: Sifan Naeem Acked-by: James Hogan Reviewed-by: James Hartley --- drivers/i2c

[PATCH v3 7/7] i2c: img-scb: verify support for requested bit rate

The requested bit rate can be outside the range supported by the driver. The maximum bit rate this driver supports at the moment is 400Khz. If the requested bit rate is larger than the maximum supported by the driver, set the bitrate to the maximum supported before bitrate_khz is calculated. Maxi