[PATCH V5 4/6] i2c: qup: Add bam dma capabilities

QUP cores can be attached to a BAM module, which acts as a dma engine for the QUP core. When DMA with BAM is enabled, the BAM consumer pipe transmitted data is written to the output FIFO and the BAM producer pipe received data is read from the input FIFO. With BAM capabilities, qup-i2c core can

[PATCH V5 6/6] dts: msm8974: Add dma channels for blsp2_i2c1 node

Signed-off-by: Sricharan R --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 7786408..bd1be53 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi

[PATCH V5 3/6] i2c: qup: Transfer each i2c_msg in i2c_msgs without a stop bit

The definition of i2c_msg says that "If this is the last message in a group, it is followed by a STOP. Otherwise it is followed by the next @i2c_msg transaction segment, beginning with a (repeated) START" So the expectation is that there is no 'STOP' bit inbetween individual i2c_msg segments

[PATCH V5 2/6] i2c: qup: Add V2 tags support

QUP from version 2.1.1 onwards, supports a new format of i2c command tags. Tag codes instructs the controller to perform a operation like read/write. This new tagging version supports bam dma and transfers of more than 256 bytes without 'stop' in between. Adding the support for the same. For each

[PATCH V5 5/6] dts: msm8974: Add blsp2_bam dma node

Signed-off-by: Sricharan R --- arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 753bdfd..7786408 100644 ---

[PATCH V5 1/6] i2c: qup: Change qup_wait_writeready function to use for all timeouts

qup_wait_writeready waits only on a output fifo empty event. Change the same function to accept the event and data length to wait as parameters. This way the same function can be used for timeouts in other places as well. Signed-off-by: Sricharan R ---

[PATCH V5 0/6] i2c: qup: Add support for v2 tags and bam dma

QUP from version 2.1.1 onwards, supports a new format of i2c command tags. Tag codes instructs the controller to perform a operation like read/write. This new tagging version supports and is required for adding bam dma capabilities. V2 tags supports transfer of more than 256 bytes in a single i2c

Re: [PATCH 1/3] i2c: Revert "i2c: xiic: Do not reset controller before every transfer"

On Tue, Nov 17, 2015 at 1:04 PM, Lars-Peter Clausen wrote: > On 11/17/2015 06:17 AM, Shubhrajyoti Datta wrote: >> On Mon, Nov 16, 2015 at 7:12 PM, Lars-Peter Clausen wrote: >>> Commit d701667bb331 ("i2c: xiic: Do not reset controller before every >>> transfer")

Re: [PATCH v6] at24: Support SMBus read/write of 16-bit devices

On Mon, 16 Nov 2015 18:02:19 -0600 (CST), Aaron Sierra wrote: > Previously, the at24 driver would bail out in the case of a 16-bit > addressable EEPROM attached to an SMBus controller. This is because > SMBus block reads and writes don't map to I2C multi-byte reads and > writes when the offset

Re: [PATCH] i2c: imx: fix build issue for platforms without pinctrl

On Tue, Nov 17, 2015 at 3:11 PM, Li Yang wrote: > With commit 1c4b6c3b (i2c: imx: implement bus recovery) the driver > starts to use pinctrl to do i2c bus recovery. But this breaks build > for platforms that don't implement pinctrl, such as ls1021a and > ls1043a. > > This

[PATCH] i2c: imx: make bus recovery through pinctrl optional

Since commit 1c4b6c3bcf30 ("i2c: imx: implement bus recovery") the driver starts to use gpio/pinctrl to do i2c bus recovery. But pinctrl is not always available for platforms using this driver such as ls1021a and ls1043a, and the device tree binding also mentioned this gpio based recovery

Re: [PATCH v2 05/10] i2c: rcar: refactor setup of a msg

Hi Wolfram, On Tue, Nov 17, 2015 at 4:00 PM, Wolfram Sang wrote: > Hi Laurent, > >> Sorry for bringing bad news, but as with v1, this patch breaks ADV7511 >> detection on my Koelsch board. Reverting it on top of the series fixes the >> problem. > > In v1, patch 5/9 was

[RESEND PATCH v2 1/9] eeprom: at24: platform_data: use BIT() macro

Use BIT() macro to replace the 0xXX constants in platform_data flags definitions. Signed-off-by: Bartosz Golaszewski --- include/linux/platform_data/at24.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/linux/platform_data/at24.h

[RESEND PATCH v2 7/9] eeprom: at24: add the at24cs series to the list of supported devices

The infrastructure for reading of the factory-programmed serial number for at24cs EEPROM series is now in place. Add the chips that are actually equipped with the serial number memory area to the list of supported devices. Signed-off-by: Bartosz Golaszewski ---

[RESEND PATCH v2 8/9] eeprom: at24: remove a reduntant if

It seems as if the second check for I2C_FUNC_I2C functionality had been introduced accidentally during a merge. Tt's reduntant, so remove it. Signed-off-by: Bartosz Golaszewski --- drivers/misc/eeprom/at24.c | 3 --- 1 file changed, 3 deletions(-) diff --git

[RESEND PATCH v2 9/9] eeprom: at24: readability tweaks

Move the macro definitions above the struct definitions and add some tabs for better readability. Signed-off-by: Bartosz Golaszewski --- drivers/misc/eeprom/at24.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git

[RESEND PATCH v2 5/9] eeprom: at24: export the serial number through sysfs

The at24 driver is now capable of reading the serial number from at24cs EEPROM chips. Export the serial number through sysfs. Signed-off-by: Bartosz Golaszewski --- drivers/misc/eeprom/at24.c | 44 1 file changed, 40

[RESEND PATCH v2 3/9] eeprom: at24: tie up an additional address for at24cs series

The at24cs series EEPROM chips have an additional read-only memory area, that is visible on a different i2c slave address. Tie it up with a dummy device. Signed-off-by: Bartosz Golaszewski --- drivers/misc/eeprom/at24.c | 30 ++ 1 file

[PATCHv8 5/5] ARM64: dts: add LS1043a-RDB board support

From: Shaohui Xie Signed-off-by: Shaohui Xie Signed-off-by: Mingkai Hu Signed-off-by: Wenbin Song Signed-off-by: Hou Zhiqiang --- V8 - V7: - Rebased on latest

[PATCHv8 4/5] ARM64: dts: add Freescale LS1043a SoC support

From: Mingkai Hu LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks are similar to LS1021a which also complies to Freescale Chassis 2.1 spec. Created LS1043a SoC DTSI file to be included by board level DTS files. Signed-off-by: Li Yang

[PATCHv8 2/5] watchdog: Add support for Freescale Layerscape platforms

From: Shaohui Xie Modify watchdog/Kconfig file to support Layerscape platforms. Signed-off-by: Shaohui Xie Signed-off-by: Hou Zhiqiang Acked-by: Guenter Roeck --- V8: - No change. V6: - Remove

[PATCHv8 3/5] Documentation: DT: Add entry for Freescale LS1043a-RDB board

From: Mingkai Hu Signed-off-by: Mingkai Hu Signed-off-by: Hou Zhiqiang --- V8 - V2: - No change. Documentation/devicetree/bindings/arm/fsl.txt | 4 1 file changed, 4 insertions(+) diff --git

[RESEND PATCH v2 4/9] eeprom: at24: support reading of the serial number

The at24cs series EEPROM chips have an additional read-only memory area containing a factory pre-programmed serial number. In order to access it, one has to perform a dummy write before reading the serial number bytes. Add a function that allows to access the serial number. Signed-off-by:

[RESEND PATCH v2 6/9] eeprom: at24: improve the device_id table readability

Improve the readability of the device table by separating columns with tabs. Signed-off-by: Bartosz Golaszewski --- drivers/misc/eeprom/at24.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/misc/eeprom/at24.c

[RESEND PATCH v2 0/9] eeprom: at24: at24cs series serial number read

Chips from the at24cs EEPROM series have an additional read-only memory area containing a factory pre-programmed serial number. In order to access it, a dummy write must be executed before reading the serial number bytes. This series adds support for reading the serial number through a sysfs

[RESEND PATCH v2 2/9] eeprom: at24: new flag in platform_data

In preparation for supporting the at24cs EEPROM series add a new flag to platform data. When set, it should tell the driver that the chip has an additional read-only memory area that holds a factory pre-programmed serial number. Signed-off-by: Bartosz Golaszewski ---

[PATCHv8 1/5] i2c: imx: fix a compiling error

From: Hou Zhiqiang drivers/i2c/busses/i2c-imx.c:978:2: error: implicit declaration of function ‘pinctrl_select_state’ [-Werror=implicit-function-declaration] pinctrl_select_state(i2c_imx->pinctrl, i2c_imx->pinctrl_pins_gpio); ^ Signed-off-by: Hou Zhiqiang

Re: [PATCH v2 05/10] i2c: rcar: refactor setup of a msg

> can continue that on Lager. In the meantime I could also capture I2C traces > using a scope and send them to you. Cool, thanks! I think I'll start with sending you another trace-printk patch soon. And can you push the branch you were using somewhere? With the config as an additional commit?

Re: [PATCH] i2c: imx: make bus recovery through pinctrl optional

Hello, On Tue, Nov 17, 2015 at 06:02:59PM -0600, Li Yang wrote: > Since commit 1c4b6c3bcf30 ("i2c: imx: implement bus recovery") the driver > starts to use gpio/pinctrl to do i2c bus recovery. But pinctrl is not > always available for platforms using this driver such as ls1021a and > ls1043a,

[PATCH] i2c: imx: fix build issue for platforms without pinctrl

With commit 1c4b6c3b (i2c: imx: implement bus recovery) the driver starts to use pinctrl to do i2c bus recovery. But this breaks build for platforms that don't implement pinctrl, such as ls1021a and ls1043a. This patch fix the problem by only compiling the bus recovery code when CONFIG_PINCTRL

Re: [PATCH v2 05/10] i2c: rcar: refactor setup of a msg

Hi Magnus, On Wednesday 18 November 2015 11:18:00 Magnus Damm wrote: > On Tue, Nov 17, 2015 at 4:00 PM, Wolfram Sang wrote: > > Hi Laurent, > > > >> Sorry for bringing bad news, but as with v1, this patch breaks ADV7511 > >> detection on my Koelsch board. Reverting it on top