On Mon, Jul 09, 2012 at 06:22:53PM +0200, Marek Vasut wrote:
> This patch configures the I2C bus timing registers according
> to information passed via DT. Currently, 100kHz and 400kHz
> modes are supported.
>
> The TIMING2 register value is wrong in the documentation for
> i.MX28! This was found
This patch configures the I2C bus timing registers according
to information passed via DT. Currently, 100kHz and 400kHz
modes are supported.
The TIMING2 register value is wrong in the documentation for
i.MX28! This was found and fixed by:
Shawn Guo
Signed-off-by: Marek Vasut
Cc: Detlev Zundel
Dear Shawn Guo,
> On Wed, Jun 27, 2012 at 03:30:31AM +0200, Marek Vasut wrote:
> > Ok, I managed to replicate it just now. Scrap my previous email.
> >
> > Still, any idea what can cause this?
>
> I just spent some time on it. It looks like a document issue (dammit).
>
> The HW_I2C_TIMING2 EXA
On Wed, Jun 27, 2012 at 03:30:31AM +0200, Marek Vasut wrote:
> Ok, I managed to replicate it just now. Scrap my previous email.
>
> Still, any idea what can cause this?
>
I just spent some time on it. It looks like a document issue (dammit).
The HW_I2C_TIMING2 EXAMPLE tells the value is 0x00150
Dear Shawn Guo,
> > On Sat, Jun 09, 2012 at 01:45:50PM +0200, Marek Vasut wrote:
> > > This patch configures the I2C bus timing registers according
> > > to information passed via DT. Currently, 100kHz and 400kHz
> > > modes are supported.
> > >
> > > Signed-off-by: Marek Vasut
> >
> > I gave i
Dear Shawn Guo,
> On Sat, Jun 23, 2012 at 08:47:32PM +0200, Marek Vasut wrote:
> > Dear Shawn Guo,
> >
> > > This patch configures the I2C bus timing registers according
> > > to information passed via DT. Currently, 100kHz and 400kHz
> > > modes are supported.
> >
> > [...]
> >
> > Is there an
Dear Shawn Guo,
> On Sat, Jun 23, 2012 at 08:47:32PM +0200, Marek Vasut wrote:
> > Dear Shawn Guo,
> >
> > > This patch configures the I2C bus timing registers according
> > > to information passed via DT. Currently, 100kHz and 400kHz
> > > modes are supported.
> >
> > [...]
> >
> > Is there an
On Sat, Jun 23, 2012 at 08:47:32PM +0200, Marek Vasut wrote:
> Dear Shawn Guo,
>
> > This patch configures the I2C bus timing registers according
> > to information passed via DT. Currently, 100kHz and 400kHz
> > modes are supported.
> [...]
>
> Is there any reason why this can not be merged othe
Dear Shawn Guo,
> This patch configures the I2C bus timing registers according
> to information passed via DT. Currently, 100kHz and 400kHz
> modes are supported.
[...]
Is there any reason why this can not be merged other than the timing registers
goo (which I believe shall stay as in the datash
Dear Shawn Guo,
> On Mon, Jun 11, 2012 at 12:53:17PM +0200, Marek Vasut wrote:
> > Ok, then can you please try asking them how to exactly compute the values
> > in timing0-timing2 registers? So we don't have to hardcode them like
> > it's done now?
>
> It's determined I2C clock waveform you want
On Mon, Jun 11, 2012 at 12:53:17PM +0200, Marek Vasut wrote:
> Ok, then can you please try asking them how to exactly compute the values in
> timing0-timing2 registers? So we don't have to hardcode them like it's done
> now?
>
It's determined I2C clock waveform you want to get. See i.MX28 RM
"F
Dear Shawn Guo,
> On Sat, Jun 09, 2012 at 01:45:50PM +0200, Marek Vasut wrote:
> > This patch configures the I2C bus timing registers according
> > to information passed via DT. Currently, 100kHz and 400kHz
> > modes are supported.
> >
> > Signed-off-by: Marek Vasut
>
> I gave it a test on imx2
Dear Shawn Guo,
> On Sun, Jun 10, 2012 at 01:53:05PM +0200, Marek Vasut wrote:
> > > +struct mxs_i2c_speed_config {
> > > + uint32_ttiming0;
> > > + uint32_ttiming1;
> > > + uint32_ttiming2;
> > > +};
> > > +
> > > +/* Timing values for the default 24MHz clock supplied into
On Sun, Jun 10, 2012 at 01:53:05PM +0200, Marek Vasut wrote:
> > +struct mxs_i2c_speed_config {
> > + uint32_ttiming0;
> > + uint32_ttiming1;
> > + uint32_ttiming2;
> > +};
> > +
> > +/* Timing values for the default 24MHz clock supplied into the i2c block.
>
> Thinki
On Sat, Jun 09, 2012 at 01:45:50PM +0200, Marek Vasut wrote:
> This patch configures the I2C bus timing registers according
> to information passed via DT. Currently, 100kHz and 400kHz
> modes are supported.
>
> Signed-off-by: Marek Vasut
I gave it a test on imx28-evk board with audio playback.
Dear Marek Vasut,
> This patch configures the I2C bus timing registers according
> to information passed via DT. Currently, 100kHz and 400kHz
> modes are supported.
[...]
> +struct mxs_i2c_speed_config {
> + uint32_ttiming0;
> + uint32_ttiming1;
> + uint32_tti
This patch configures the I2C bus timing registers according
to information passed via DT. Currently, 100kHz and 400kHz
modes are supported.
Signed-off-by: Marek Vasut
Cc: Detlev Zundel
CC: Dong Aisheng
CC: Fabio Estevam
Cc: Linux ARM kernel
Cc: linux-i2c@vger.kernel.org
CC: Sascha Hauer
CC:
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