Re: [PATCH 2/8 v3] i2c: i801: optimize waiting for HWPEC to finish

2012-06-27 Thread Jean Delvare
Hi Daniel, On Wed, 27 Jun 2012 21:54:09 +0800, Daniel Kurtz wrote: > When a transaction has finished (including the PEC), the SMBus controller > sets the INTR bit. > Slightly optimize the polling loop by reading status before the first > sleep. > > Signed-off-by: Daniel Kurtz > --- > drivers/i2

[PATCH 2/8 v3] i2c: i801: optimize waiting for HWPEC to finish

2012-06-27 Thread Daniel Kurtz
When a transaction has finished (including the PEC), the SMBus controller sets the INTR bit. Slightly optimize the polling loop by reading status before the first sleep. Signed-off-by: Daniel Kurtz --- drivers/i2c/busses/i2c-i801.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)