Re: Intel ICHx bus driver

Oh, right :) Thanks! On Mon, Mar 15, 2010 at 1:46 PM, Jean Delvare wrote: > On Mon, 15 Mar 2010 13:12:12 +0200, Felix Rubinstein wrote: >> Btw, you mentioned to disable block buffer for I2C block writes in >> 2.6.24 but I don't see any change regarding it. Is it in >> git://git.kernel.org/pub/scm

Re: Intel ICHx bus driver

On Mon, 15 Mar 2010 13:12:12 +0200, Felix Rubinstein wrote: > Btw, you mentioned to disable block buffer for I2C block writes in > 2.6.24 but I don't see any change regarding it. Is it in > git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging.git I guess you really mean 2.6.34 and not 2.

Re: Intel ICHx bus driver

Perfect :) Btw, you mentioned to disable block buffer for I2C block writes in 2.6.24 but I don't see any change regarding it. Is it in git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging.git Thanks, Felix R. On Mon, Mar 15, 2010 at 12:06 PM, Jean Delvare wrote: > On Mon, 15 Mar 2010

Re: Intel ICHx bus driver

On Mon, 15 Mar 2010 11:43:48 +0200, Felix Rubinstein wrote: > Hi Jean, > > On Fri, Mar 12, 2010 at 6:24 PM, Jean Delvare wrote: > > FWIW, testing on my ICH3-M (SMBus block read), I get a delay between > > bytes of 460 us. This is a maximum bus speed of 19.6 kHz. Same test on > > an ICH5 reports a

Re: Intel ICHx bus driver

Hi Jean, On Fri, Mar 12, 2010 at 6:24 PM, Jean Delvare wrote: > On Fri, 12 Mar 2010 14:19:01 +0100, Jean Delvare wrote: >> This is an interesting point. During simple transactions, or block >> transactions under E32B, we don't really care about the delay, because >> the controller takes care of t

Re: Intel ICHx bus driver

On Fri, 12 Mar 2010 14:19:01 +0100, Jean Delvare wrote: > This is an interesting point. During simple transactions, or block > transactions under E32B, we don't really care about the delay, because > the controller takes care of the transaction on its own, and the only > thing the delay affects is

Re: Intel ICHx bus driver

Hi Felix, On Tue, 2 Mar 2010 14:53:41 +0200, Felix Rubinstein wrote: > One more thing which popped up recently. > If I work with E32B disabled, I paid attention that msleep(1) in > i801_block_transaction_byte_by_byte makes the write transaction too > long in the scope, i.e. bytes frequency is too

Re: Intel ICHx bus driver

Hi again Felix, On Tue, 2 Mar 2010 22:22:03 +0100, Jean Delvare wrote: > Obviously, if disabling the block buffer makes the same transaction > work, then it has to be a bug in the driver. And the good news is: I > was able to reproduce the bug using your test program, on an ICH5 > running kernel 2

Re: Intel ICHx bus driver

Hi Jean, On Tue, Mar 2, 2010 at 11:22 PM, Jean Delvare wrote: > > Hi Felix, > > On Wed, 24 Feb 2010 14:01:56 +0200, Felix Rubinstein wrote: > > Here is my code: > > > > > > #include > > #include > > #include > > #include > > #include > > #include > > #include > > > > #include

Re: Intel ICHx bus driver

Hi Felix, On Wed, 24 Feb 2010 14:01:56 +0200, Felix Rubinstein wrote: > Here is my code: > > > #include > #include > #include > #include > #include > #include > #include > > #include "i2c-dev.h" > #include "i2cbusses.h" > #include "util.h" > > /* actually smbus allows up to

Re: Intel ICHx bus driver

Hi Jean, On Sun, Feb 28, 2010 at 10:19 PM, Jean Delvare wrote: > > On Sun, 28 Feb 2010 15:45:38 +0200, Felix Rubinstein wrote: > > On Sun, Feb 28, 2010 at 1:08 PM, Jean Delvare wrote: > > > On Wed, 24 Feb 2010 01:21:51 +0200, Felix Rubinstein wrote: > > > > But hey, I think I've found an issue h

Re: Intel ICHx bus driver

On Sun, 28 Feb 2010 15:45:38 +0200, Felix Rubinstein wrote: > On Sun, Feb 28, 2010 at 1:08 PM, Jean Delvare wrote: > > On Wed, 24 Feb 2010 01:21:51 +0200, Felix Rubinstein wrote: > > > But hey, I think I've found an issue here. > > > Let's delve into the i801 driver code for a moment please. > > >

Re: Intel ICHx bus driver

Hi Jean, On Sun, Feb 28, 2010 at 1:08 PM, Jean Delvare wrote: > > Hi Felix, > > Please keep the linux-i2c list in Cc. > > On Wed, 24 Feb 2010 01:21:51 +0200, Felix Rubinstein wrote: > > On Mon, Feb 22, 2010 at 11:58 PM, Jean Delvare wrote: > > > Unlikely. If a timeout occurred, the error messag

Re: Intel ICHx bus driver

Hi Felix, Please keep the linux-i2c list in Cc. On Wed, 24 Feb 2010 01:21:51 +0200, Felix Rubinstein wrote: > On Mon, Feb 22, 2010 at 11:58 PM, Jean Delvare wrote: > > Unlikely. If a timeout occurred, the error message would say so. > > > > What is the exact error message? Can we see your comple

Re: Intel ICHx bus driver

Here is my code: #include #include #include #include #include #include #include #include "i2c-dev.h" #include "i2cbusses.h" #include "util.h" /* actually smbus allows up to 32 and i2c even more */ #define I2CRWL_MAX_PARAMS 10 #define I2CRWL_PARAMS_SHIFT 3 static int i2c_writ

Re: Intel ICHx bus driver

Hi Felix, On Mon, 22 Feb 2010 18:12:41 +0200, Felix Rubinstein wrote: > Hi Jean/i2c guys, > > I'm having hard time to send straight I2C transaction of arbitrary length. > I use i2c_smbus_write_i2c_block_data(fd, buf[0], datac - 1, &buf[1]); > from user-space to send the aforementioned transaction

Re: Intel ICHx bus driver

Hi Jean/i2c guys, I'm having hard time to send straight I2C transaction of arbitrary length. I use i2c_smbus_write_i2c_block_data(fd, buf[0], datac - 1, &buf[1]); from user-space to send the aforementioned transaction, but I get operation not permitted as a result. I tried to understand what's goi

Re: Intel ICHx bus driver

Hi Felix, On Fri, 19 Feb 2010 09:10:03 +0200, Felix Rubinstein wrote: > Does ICHx support straight I2C read of arbitrary length, i.e. without doing > write first? No, it doesn't. The only straight read lengths supported are 0 byte (SMBus quick command) and 1 byte (SMBus receive byte). -- Jean D

Re: Intel ICHx bus driver

Hi Felix, On Thu, 28 Jan 2010 14:46:23 +0200, Felix Rubinstein wrote: > On Thu, Jan 28, 2010 at 11:53 AM, Jean Delvare wrote: > > No, the above piece of code doesn't imply this. The length is written > > to one register of the SMBus controller. It doesn't imply in any way > > that the controller

Re: Intel ICHx bus driver

Hi Jean, On Thu, Jan 28, 2010 at 11:53 AM, Jean Delvare wrote: > Hi Felix, > > On Thu, 28 Jan 2010 11:32:28 +0200, Felix Rubinstein wrote: >> Please explain to me how do you interpret "I2C Block Write"? >> To my understanding it's I2C, not SMBus, transaction on the bus, >> meaning (from Documenta

Re: Intel ICHx bus driver

Hi Felix, On Thu, 28 Jan 2010 11:32:28 +0200, Felix Rubinstein wrote: > Please explain to me how do you interpret "I2C Block Write"? > To my understanding it's I2C, not SMBus, transaction on the bus, > meaning (from Documentation/i2c/i2c-protocol) > S Addr Wr [A] Data [A] Data [A] ... [A] Data [A]

Re: Intel ICHx bus driver

Hi Jean, Thanks for clarifying things, but I still have got some misunderstandings :) Inlined. On Thu, Jan 28, 2010 at 9:59 AM, Jean Delvare wrote: > Hi Felix, > > On Wed, 27 Jan 2010 19:56:02 +0200, Felix Rubinstein wrote: >> Running i2cdetect on ICH9 says: >> "I2C Block Write                  y

Re: Intel ICHx bus driver

Hi Felix, On Wed, 27 Jan 2010 19:56:02 +0200, Felix Rubinstein wrote: > Running i2cdetect on ICH9 says: > "I2C Block Write                  yes" > > But having a closer look at how the whole thing is implemented proves > that no i2c block write is supported. > > The proof: > 1. i801_probe turns i

Intel ICHx bus driver

Running i2cdetect on ICH9 says: "I2C Block Write                  yes" But having a closer look at how the whole thing is implemented proves that no i2c block write is supported. The proof: 1. i801_probe turns i801_features to FEATURE_I2C_BLOCK_READ 2. as a sequence in i801_block_transaction i801