> But I really don't know why mkreiserfs is creating a filesystem
> with 64k more than allowed by the device... maybe a bug in mkreiserfs?
>
> The strange is that it didn't happen with the OLD IDE
> drivers... could it be a pata_via bug?
pata_via doesn't deal with disk sizes. That is
On Fri, 20 Jul 2007 16:37:09 +0100
Alan Cox <[EMAIL PROTECTED]> wrote:
> Ok try booting with
>
> libata.ignore_hpa=1
I used that option:
[EMAIL PROTECTED] ~$ dmesg|grep hpa
Kernel command line: auto BOOT_IMAGE=linux rw root=902 panic=5
libata.ignore_hpa=1
and tried to ma
This fixes up the usage in libsas (which are easy to miss, since they're
only in the scsi-misc tree) ... and also corrects the documentation on
the point of what these two function pointers actually return.
James
diff --git a/Documentation/DocBook/libata.tmpl
b/Documentation/DocBook/libata.tmpl
Bartlomiej Zolnierkiewicz wrote:
Signed-off-by: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
Acked-by: Sergei Shtylyov <[EMAIL PROTECTED]>
MBR, Sergei
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Bartlomiej Zolnierkiewicz wrote:
Signed-off-by: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
Acked-by: Sergei Shtylyov <[EMAIL PROTECTED]>
Index: b/drivers/ide/pci/it8213.c
===
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/p
Hi Kristen,
Hmmm...
ata-ahci-alpm-enable-link-power-management-for-ata-drivers.patch
drivers/ata/libata-core.c: In function 'ata_dev_configure':
drivers/ata/libata-core.c:2039: error: implicit declaration of function
'ata_device_blacklisted'
make[2]: *** [drivers/ata/libata-core.o] Error 1
make[
On Thu, 19 Jul 2007 21:25:24 -0300
Dâniel Fraga <[EMAIL PROTECTED]> wrote:
> On Fri, 20 Jul 2007 00:17:14 +0100
> Alan Cox <[EMAIL PROTECTED]> wrote:
>
> > Are their host protected areas on the two disks ?
>
> I don't know, but hdparm returns this:
Ok try booting with
libata.igno
Yasha Okshtein wrote:
I need to send soft and/or hard resets from userspace.
Actually, you can do it by requesting manual rescan of the SCSI host.
"echo - - - > /sys/class/scsi_host/hostX/scan"
I've been using this approach to spin up a PATA drive. However, I
have not figured out a way to r
Signed-off-by: Alan Cox <[EMAIL PROTECTED]>
diff -u --new-file --recursive --exclude-from /usr/src/exclude
linux.vanilla-2.6.22-rc6-mm1/include/asm-generic/iomap.h
linux-2.6.22-rc6-mm1/include/asm-generic/iomap.h
--- linux.vanilla-2.6.22-rc6-mm1/include/asm-generic/iomap.h2007-07-02
20:47:3
Signed-off-by: Alan Cox <[EMAIL PROTECTED]>
diff -u --new-file --recursive --exclude-from /usr/src/exclude
linux.vanilla-2.6.22-rc6-mm1/drivers/ata/pata_cs5520.c
linux-2.6.22-rc6-mm1/drivers/ata/pata_cs5520.c
--- linux.vanilla-2.6.22-rc6-mm1/drivers/ata/pata_cs5520.c 2007-07-02
20:48:49.00
Allow for 64bit MMIO ports in the iomap printing buffer
Signed-off-by: Alan Cox <[EMAIL PROTECTED]>
--- linux-2.6.22-rc6-mm1/include/asm-generic/iomap.h~ 2007-07-20
14:08:07.0 +0100
+++ linux-2.6.22-rc6-mm1/include/asm-generic/iomap.h2007-07-20
14:08:07.310897944 +0100
@@ -67,7 +6
On 7/3/07, Albert Lee <[EMAIL PROTECTED]> wrote:
Recently the PLL input clock of Promise 2027x is sometimes detected
higer than expected (e.g. 20.027 MHz compared to 16.714 MHz).
It seems sometimes the mdelay() function is not as precise as it
used to be. Per Alan's advice, HT or power management
Signed-off-by: Alan Cox <[EMAIL PROTECTED]>
Don't assume the BIOS can validate modes or has any sense at all.
Instead use the BIOS timings to deduce the modes.
diff -u --new-file --recursive --exclude-from /usr/src/exclude
linux.vanilla-2.6.22-rc6-mm1/drivers/ata/pata_acpi.c
linux-2.6.22-rc6-mm
Signed-off-by: Alan Cox <[EMAIL PROTECTED]>
diff -u --new-file --recursive --exclude-from /usr/src/exclude
linux.vanilla-2.6.22-rc6-mm1/drivers/ata/pata_ali.c
linux-2.6.22-rc6-mm1/drivers/ata/pata_ali.c
--- linux.vanilla-2.6.22-rc6-mm1/drivers/ata/pata_ali.c 2007-07-02
20:50:11.0 +0100
Hi.
Bartlomiej Zolnierkiewicz wrote:
* Return failure in ->speedproc method for unsupported/invalid transfer
modes passed from user-space (fixes theoretical OOPS in ali_tune_pio()
and/or setting random PIO timings on host controller + disabling UDMA
bit + setting unsupported/invalid trans
Jeff Garzik wrote:
> Tejun Heo wrote:
>> SCSI scan may fail due to memory allocation failure even if EH is not
>> in progress. Due to use of GFP_ATOMIC in SCSI scan path, allocation
>> failure isn't too rare especially while probing multiple devices at
>> once which is the case when a bunch of dev
Tejun Heo wrote:
SCSI scan may fail due to memory allocation failure even if EH is not
in progress. Due to use of GFP_ATOMIC in SCSI scan path, allocation
failure isn't too rare especially while probing multiple devices at
once which is the case when a bunch of devices are connected to PMP.
Thi
Alan Cox wrote:
+/* Convert an iomap to text for this platform */
+extern char *iomap_name(void __iomem *addr, char *buf, size_t len);
+#define IOMAP_NAMELEN 12
this will truncate on 64-bit addresses
Yes I suppose we could have 64bit MMIO mappings. So make it 20 8)
Shall I send Andrew/you an
Tejun Heo wrote:
Jeff Garzik wrote:
Tejun Heo wrote:
Add @is_cmd to ata_tf_to_fis(). This controls bit 7 of the second
byte which tells the device whether this H2D FIS is for a command or
not. This cleans up ahci a bit and will be used by PMP.
Signed-off-by: Tejun Heo <[EMAIL PROTECTED]>
---
Tejun Heo wrote:
sata_down_spd_limit() first reads the current SPD from SStatus and
limit the speed to the lower one of one below the current limit or one
below the current SPD in SStatus. SPD may not be accessible or valid
when SPD down is requested making sata_down_spd_limit() fail when it's
m
Jeff Garzik wrote:
> Tejun Heo wrote:
>> Add @is_cmd to ata_tf_to_fis(). This controls bit 7 of the second
>> byte which tells the device whether this H2D FIS is for a command or
>> not. This cleans up ahci a bit and will be used by PMP.
>>
>> Signed-off-by: Tejun Heo <[EMAIL PROTECTED]>
>> ---
>
Jeff Garzik wrote:
> Where does this stand, now that I dove into PMP patchset 1 of 4?
I can regenerate this one later.
--
tejun
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> > +/* Convert an iomap to text for this platform */
> > +extern char *iomap_name(void __iomem *addr, char *buf, size_t len);
> > +#define IOMAP_NAMELEN 12
>
> this will truncate on 64-bit addresses
Yes I suppose we could have 64bit MMIO mappings. So make it 20 8)
Shall I send Andrew/you a
On Friday 20 July 2007 13:14:43 Alan Cox wrote:
> > /*
> > * SMC timings to match ATAPI-4 PIO timing specs (given in ns)
> > * See Figure 20 and Table 29 on pages 262-263 in T13/1153D revision 18
> > */
> > static const int smc_tot_cycle[5] = {600, 390, 350, 190, 135}; /* >= t0
> > */ static con
[EMAIL PROTECTED] wrote:
From: Alan Cox <[EMAIL PROTECTED]>
Use iomap_name() in the libata layer
Signed-off-by: Alan Cox <[EMAIL PROTECTED]>
Cc: Jeff Garzik <[EMAIL PROTECTED]>
Cc: Tejun Heo <[EMAIL PROTECTED]>
Signed-off-by: Andrew Morton <[EMAIL PROTECTED]>
ACK
will await resend when previ
[EMAIL PROTECTED] wrote:
From: Alan Cox <[EMAIL PROTECTED]>
Add an iomap_name() function which translates an I/O map into a string to
print.
Use it for the Libata layer
For now we use 0x for I/O and 0x for MMIO. I'm assuming that
eventually some other platforms will want to use th
Where does this stand, now that I dove into PMP patchset 1 of 4?
Jeff
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su henry wrote:
From: [EMAIL PROTECTED]
The SATA controller device ID is different according to
the onchip SATA type set in the system BIOS:
Device Device ID
SATA in IDE mode 0x4390
SATA in AHCI mode 0x4391
SATA in non-raid5 driver 0x4392
SAT
Tejun, Jeff
I've noticed that some scsi commands for DVD-drive attached to pata_via
successfully finishes without any delays but reports about TIMEOUT condition. It
happens because of ATA_ERR bit is set in status register. As result for each
command Error Handler thread awakened, requests sense b
Tejun Heo wrote:
Add @is_cmd to ata_tf_to_fis(). This controls bit 7 of the second
byte which tells the device whether this H2D FIS is for a command or
not. This cleans up ahci a bit and will be used by PMP.
Signed-off-by: Tejun Heo <[EMAIL PROTECTED]>
---
drivers/ata/ahci.c| 10 +++
Tejun Heo wrote:
Convert ->scr_read/write callbacks to return error code to better
indicate failure. This will help handling of SCR_NOTIFICATION.
This is a welcome improvement, for reasons beyond PMP.
Thanks,
Jeff
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Tejun Heo wrote:
+extern void ata_tf_to_fis(const struct ata_taskfile *tf,
+ u8 pmp, int is_cmd, u8 *fis);
I'm applying these... but I would like to start seeing 'bool' type used
for arguments like "is_cmd", for situations where the only values we
-ever- care about ar
Alexey Dobriyan wrote:
Commit df69c9c5438b4e396a64d42608b2a6c48a3e7475 moved only prototype of
out of CONFIG_PM. Move function out as well. Box seems to boot fine.
Signed-off-by: Alexey Dobriyan <[EMAIL PROTECTED]>
---
drivers/ata/ahci.c | 16
1 file changed, 8 insertions(+)
Akira Iguchi wrote:
This patch fixes some issues of the previous patch:
- Use mode_filter() hook to limit ATAPI UDMA mode
- "data loss" warning message
- handling of udma_mask
Signed-off-by: Kou Ishizaki <[EMAIL PROTECTED]>
Signed-off-by: Akira Iguchi <[EMAIL PROTECTED]>
applied
-
To unsubsc
Tejun Heo wrote:
Yay, the first one from Seagate. 3.ALC firmware is okay. This was
reported by Sam Freed on bugzilla bug 8759.
Signed-off-by: Tejun Heo <[EMAIL PROTECTED]>
Signed-off-by: Sam Freed <[EMAIL PROTECTED]>
---
drivers/ata/libata-core.c |1 +
1 file changed, 1 insertion(+)
app
Chuck Ebbert wrote:
libata: fix last_ctl caching in ata_tf_read()
last_ctl was not cached properly. (Pointed out
by Tejun Heo.)
Signed-off-by: Chuck Ebbert <[EMAIL PROTECTED]>
---
(Apply after Petr's patch to fix SMART bugs.)
drivers/ata/libata-sff.c |4
1 file changed, 4 insertions
Petr Vandrovec wrote:
On Mon, Jul 16, 2007 at 07:32:57PM +0900, Tejun Heo wrote:
[cc'ing Jeff and Albert]
Petr Vandrovec wrote:
Fix reported task file values in sense data
ata_tf_read was setting HOB bit when lba48 command was submitted, but
was not clearing it before reading "normal" data.
> /*
> * SMC timings to match ATAPI-4 PIO timing specs (given in ns)
> * See Figure 20 and Table 29 on pages 262-263 in T13/1153D revision 18
> */
> static const int smc_tot_cycle[5] = {600, 390, 350, 190, 135}; /* >= t0 */
> static const int smc_nrd_setup[5] = {100, 60, 40, 40, 35}; /* >= t
On Friday 20 July 2007 11:08:19 Kristoffer Nyborg Gregertsen wrote:
> There might be problems with the signals from the AVR32s External Bus
> Interface to the ATA device, although it seems fine when looking with the
> logic analyzer. Can a random signal fault generate this kind of failure? Or
>
Use ->set_pio_mode method to program PIO modes in ide_set_xfer_rate()
(the only place which used ->speedproc to program PIO modes) and remove
handling of PIO modes from all ->speedproc implementations.
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolni
Signed-off-by: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
---
drivers/ide/pci/sis5513.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
Index: b/drivers/ide/pci/sis5513.c
===
--- a/drivers/ide/pci/sis5513.c
++
* Return failure in ->speedproc method for unsupported/invalid transfer
modes passed from user-space (fixes theoretical OOPS in ali_tune_pio()
and/or setting random PIO timings on host controller + disabling UDMA
bit + setting unsupported/invalid transfer mode on the device).
* Don't disabl
Signed-off-by: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
---
drivers/ide/pci/it8213.c | 16 ++--
drivers/ide/pci/piix.c | 17 +++--
drivers/ide/pci/slc90e66.c | 17 +++--
3 files changed, 20 insertions(+), 30 deletions(-)
Index: b/drivers/ide/p
Here is the code, tips and reviews would be appriciated too :)
/*
* AVR32 SMC/CFC PATA Driver
*
* Copyright (C) 2007 Atmel Norway
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the F
Tejun Heo wrote:
> Reimplement port_map handling such that
>
> 1. Non-zero PORTS_IMPL value is always examined and used if consistent
>with cap.n_ports.
>
> 2. When PI and cat.n_ports are inconsistent, honor cap.n_ports and
>force port_map to be ((1 << cap.n_ports) - 1).
>
> 3. There wer
Hello everybody,
I'm developing an PATA driver for the Atmel AVR32 architecture (driver code
will be sent as reply to this thread). I develop on version 2.6.22.atmel.3.
The driver is currently partially working, but there are some issues with data
transfers (PIO 0). Data transfers hang after so
Reimplement port_map handling such that
1. Non-zero PORTS_IMPL value is always examined and used if consistent
with cap.n_ports.
2. When PI and cat.n_ports are inconsistent, honor cap.n_ports and
force port_map to be ((1 << cap.n_ports) - 1).
3. There were two separate places dealing with
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