On Friday 19 October 2007 23:28:21 Bartlomiej Zolnierkiewicz wrote:
> On Saturday 20 October 2007, Nick Warne wrote:
> > On Friday 19 October 2007 22:44:27 Bartlomiej Zolnierkiewicz wrote:
> >
> > hdparm -I
>
> It should have been hdparm --Istdout (sorry, once again).
>
hdparm --Istdout /dev/hdd
Hello All,
I have a Core 2 Duo & Intel 3100 chipset SBC. Of the six ports
supported by the SATA controller ,three have been routed to SST based
512MB NAND flashes which provide ATA/IDE compatible interface.One of
the three NAND flash is on AHCI only port so to access it I need to
enable the AH
Hi all,
SOLVED!
On Saturday 20 October 2007 10:37:31 Nick Warne wrote:
> On Friday 19 October 2007 23:28:21 Bartlomiej Zolnierkiewicz wrote:
> > On Saturday 20 October 2007, Nick Warne wrote:
> > > On Friday 19 October 2007 22:44:27 Bartlomiej Zolnierkiewicz wrote:
> > >
> > > hdparm -I
> >
> > I
Alan Cox a écrit :
This looks like both drives end up trying to be the slave ? Its certainly
very vey confused at this point. Interesting it works with the BIOS doing
the reset, wonder what the difference is.
Not only it works with BIOS, it also works with via82cxxx just fine.
The via82cxxx dr
Hello.
Our company recent purchased a "ADS3GX4R5-E" (SiI 3124) PCI-X port
multiplier E-SATA card (http://www.addonics.com/products/host_controller/ads3gx4r5-e.asp
) along with an external 4xSATA chassi supporting port multiplier as
well.
While Googling I came across your patch and applied
Alan / Tejun,
Another case of MDMA2 not working through a SATA->PATA bridge.
Do we have an easy way yet, for Girish to force non-MDMA2 modes?
???
Girish Shirasat wrote:
Hello All,
I have a Core 2 Duo & Intel 3100 chipset SBC. Of the six ports
supported by the SATA controller ,three have
Hi Tejun et. al.
I'm running a server with Linux 2.6.18.1+Debian's Xen-patches and the
sata+pmp-patches from
http://home-tj.org/files/libata-tj-stable/libata-tj-2.6.18.1-20061020.tar.bz2
Unfortunately I can't upgrade to anything newer than 2.6.18 since there
is no Xen Dom0-patches that I'm awa
Quoting "David G"
> "Here" as in "here at AMD"?! I'm stunned...
> Both AMD and the former ATI should have quite some experience?!
When I used "here", I was just meaning our youthful linux southbridge
drivers team instead of the whole AMD. Sorry for the confusion to you.
Quoting "Linas"
> As so
Hello.
Martin Rogge wrote:
00:04.1 IDE interface: Intel Corporation 82371AB/EB/MB PIIX4 IDE (rev 01)
(prog-if 80 [Master])
Flags: medium devsel
[virtual] Memory at 01f0 (32-bit, non-prefetchable) [disabled]
[size=8]
[virtual] Memory at 03f0 (type 3, non-prefetc
Martin Rogge wrote:
00:04.1 IDE interface: Intel Corporation 82371AB/EB/MB PIIX4 IDE (rev 01)
(prog-if 80 [Master])
Flags: medium devsel
[virtual] Memory at 01f0 (32-bit, non-prefetchable) [disabled]
[size=8]
[virtual] Memory at 03f0 (type 3, non-prefetchable) [
Hello.
Bartlomiej Zolnierkiewicz wrote:
Based on the earlier work by Tejun Heo.
* Add 'tf_flags' field (for taskfile flags) to ide_task_t.
* Add IDE_TFLAG_LBA48 taskfile flag for LBA48 taskfiles.
* Add IDE_TFLAG_NO_SELECT_MASK taskfile flag for __ide_do_rw_disk()
which doesn't use SE
Bartlomiej Zolnierkiewicz wrote:
* Add ide_no_data_taskfile() helper and convert ide_raw_taskfile() w/ NO DATA
protocol users to use it instead.
* Set ->data_phase explicitly in ide_no_data_taskfile()
(TASKFILE_NO_DATA is defined as 0x).
* Unexport task_no_data_intr().
Signed-of
Bartlomiej Zolnierkiewicz wrote:
Merge get_smart_values() and get_smart_thresholds()
into get_smart_data() helper.
Signed-off-by: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]>
Acked-by: Sergei Shtylyov <[EMAIL PROTECTED]>
MBR, Sergei
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On Fri, 2007-10-19 at 16:21 -0400, Jeff Garzik wrote:
> Take a look at tg3.c net driver change
> 2fbe43f6f631dd7ce19fb1499d6164a5bdb34568 which is a similar situation.
>
> However, it may turn out that removing the pci_intx() stuff as a
> general
> rule is easier than quirking these devices, if
Hello.
Tejun Heo wrote:
>
> Does the attached patch help?
>
It does somehow force 1.5GB/s mode, and it does change the pattern of
'configured for UDMAxxx' messages that come along with errors, and it
causes the following error:
ata3: exception Emask 0x10 SAct 0x0 SErr 0x0 action 0xb t4
ata3: h
blah blah blah sata sata sata blah blah blah
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Jeff Garzik wrote:
> blah blah blah sata sata sata blah blah blah
Now why in the world would you write that? Silly person.
Jeff
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From: Matti Linnanvuori <[EMAIL PROTECTED]>
Correct IDEPCI_SHARE_IRQ description to keeping interrupts enabled
when calling the PCI IDE action handler.
Add IDEPCI_SHARE_IRQ and IDEDISK_MULTI_MODE help text from hdparm
manual page.
Signed-off-by: Matti Linnanvuori <[EMAIL PROTECTED]>
---
--- a/dr
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