Hi,
On Mittwoch, 7. November 2007, Andrew Morton wrote:
On Fri, 2 Nov 2007 19:34:20 +0100 Hemmann, Volker Armin
[EMAIL PROTECTED] wrote: Hi,
(cc linux-ide)
for some time (and I can't say for how long, but the board is less than a
month old) I get this error on boot:
[ 42.116273]
Hello.
Bartlomiej Zolnierkiewicz wrote:
[PATCH] ide: DMA reporting and validity checking fixes (take 2)
* ide_xfer_verbose() fixups:
- beautify returned mode names
- fix PIO5 reporting
- make it return 'const char *'
* Change printk() level from KERN_DEBUG to KERN_INFO in
After looking into the HPT370 manual (now that I have it) and re-checking all
the timing tables, here's what I have discovered:
- at 33 MHz clock, PIO mode 0 timings turned to be overclocked, and all other
PIO modes underclocked;
- at 50 MHz clock, PIO modes 0 to 2 turned to be oveclocked;
-
Bartlomiej Zolnierkiewicz wrote:
Host drivers using ide_register_hw() and 'initializing == 1':
* ide-pnp
- depends on ISA
* ide_arm
- ARM arch specific
- initialized before all other host drivers
* ide-cris
- CRIS arch specific = IDE_ARCH_OBSOLETE_INIT is not defined
-
On Dec 7, 2007 9:51 PM, Tejun Heo [EMAIL PROTECTED] wrote:
Matheus Izvekov wrote:
* unstable power supply (this is quite common)
* faulty cable or poorly seated connectors
* faulty drive or controller (seems rare)
Tried everything, short of trying the hd on another controller, but
the
Jeff Garzik wrote:
Tejun Heo wrote:
link-eh_info.serror is used to cache SError for controllers which
need it cleared from interrupt handler to clear IRQ. It also should
be cleared after reset just like SError itself.
Make ata_std_postreset() clear link-eh_info.serror too and update
link-eh_info.serror is used to cache SError for controllers which
need it cleared from interrupt handler to clear IRQ. It also should
be cleared after reset just like SError itself.
Make ata_std_postreset() clear link-eh_info.serror too and update
sata_sil such that it doesn't care about
Hello !
on my old fujitsu-siemens lifebook, booting is at least 20 seconds slower as
before.
on ata_piix init i can see 2 longer delays of ~10 seconds each, which didn`t
happen before.
i`m using SuSE kernel of the day from
http://ftp.suse.com/pub/projects/kernel/kotd/
problem exists with
Interestingly, sata_sil raises spurious interrupts if it's coupled
with Sil SATA_PATA bridge. Currently, sata_sil interrupt handler is
strict about spurious interrupts and freezes the port when it occurs.
This patch makes it more forgiving.
* On SATA PHY event interrupt, serror value is checked
Tejun Heo wrote:
Spurious NCQ completion detection implemented in ahci was incorrect.
On AHCI receving and processing FISes and raising interrupts are not
interlocked and spurious interrupts are expected.
For example, if an interrupt occurs while interrupt handler is running
and the running
On Fri, 07 Dec 2007 23:09:43 +
Zan Lynx [EMAIL PROTECTED] wrote:
On Fri, 2007-12-07 at 15:02 -0800, Andrew Morton wrote:
On Fri, 07 Dec 2007 20:38:24 +
Zan Lynx [EMAIL PROTECTED] wrote:
While I'm reporting problems I'll get this one out there.
I normally use a USB-2
Notable: kill spurious NCQ completion detection
libata disabling command queueing (aka NCQ) based on some hueristics for
detection device brokenness that ultimately turned out to be broken.
Remove the broken hueristic and turn NCQ back on for all the wrongfully
maligned hard drives.
Tejun Heo wrote:
From: Peter Schwenke [EMAIL PROTECTED]
Add Toshiba Tecra M4 to broken suspend list. This is from OSDL
bugzilla bug 7780.
Signed-off-by: Peter Schwenke [EMAIL PROTECTED]
Signed-off-by: Tejun Heo [EMAIL PROTECTED]
---
drivers/ata/ata_piix.c |7 +++
1 files changed, 7
Hello, I wrote:
After looking into the HPT370 manual (now that I have it) and re-checking all
the timing tables, here's what I have discovered:
- at 33 MHz clock, PIO mode 0 timings turned to be overclocked, and all other
PIO modes underclocked;
- at 50 MHz clock, PIO modes 0 to 2
Bartlomiej Zolnierkiewicz wrote:
* Add IDE_TFLAG_DMA_PIO_FALLBACK taskfile flag to indicate the need
to skip loading taskfile registers in do_rw_taskfile().
Hm, wouldn't it be better to call this flag IDE_TFLAG_SKIP_LOADING_TF then?
* Export do_rw_taskfile().
* Convert
Bartlomiej Zolnierkiewicz wrote:
* Rename cris_dma_{on,off}() to cris_dma_host_{on,off}().
* Remove no longer needed -dma_off_quietly
(IDE core has the needed code now).
* Make cris_dma_host_on() void.
Cc: Mikael Starvik [EMAIL PROTECTED]
Signed-off-by: Bartlomiej Zolnierkiewicz
Spurious NCQ completion detection implemented in ahci was incorrect.
On AHCI receving and processing FISes and raising interrupts are not
interlocked and spurious interrupts are expected.
For example, if an interrupt occurs while interrupt handler is running
and the running interrupt handler
On Fri, 2007-12-07 at 15:22 -0800, Andrew Morton wrote:
On Fri, 07 Dec 2007 23:09:43 +
Zan Lynx [EMAIL PROTECTED] wrote:
On Fri, 2007-12-07 at 15:02 -0800, Andrew Morton wrote:
On Fri, 07 Dec 2007 20:38:24 +
Zan Lynx [EMAIL PROTECTED] wrote:
While I'm reporting
Hemmann, Volker Armin wrote:
this is gone with 2.6.22.13 an 2.6.23.9:
Thanks for letting us know. Probably CLO related problem which got
updated recently.
--
tejun
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More majordomo
Jeff Garzik wrote:
libata disabling command queueing (aka NCQ) based on some hueristics for
detection device brokenness that ultimately turned out to be broken.
Remove the broken hueristic and turn NCQ back on for all the wrongfully
maligned hard drives.
Yay!
-
To unsubscribe from this
Hi!
+static int ahci_em_messages = 1;
+module_param(ahci_em_messages, int, 0444);
+/* add other LED protocol types when they become supported */
+MODULE_PARM_DESC(ahci_em_messages,
+ Set AHCI Enclosure Management Message type (0 = disabled, 1 = LED);
Should you add line in Doc*
On Fri, 2007-12-07 at 15:22 -0800, Andrew Morton wrote:
On Fri, 07 Dec 2007 23:09:43 +
Zan Lynx [EMAIL PROTECTED] wrote:
[cut]
Now with MM kernels 2.6.24 rc1-4 the PCMCIA adapter works again, but I
only get read rates of 1.6 MB/s. When it used to work in 2.6.20 I got
at least
Matheus Izvekov wrote:
* unstable power supply (this is quite common)
* faulty cable or poorly seated connectors
* faulty drive or controller (seems rare)
Tried everything, short of trying the hd on another controller, but
the problem persists.
Weird, ICH7 + 7200.7 combination is very
Tejun Heo wrote:
Spurious NCQ completion detection implemented in ahci was incorrect.
On AHCI receving and processing FISes and raising interrupts are not
interlocked and spurious interrupts are expected.
For example, if an interrupt occurs while interrupt handler is running
and the running
Bartlomiej Zolnierkiewicz wrote:
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
Acked-by: Sergei Shtylyov [EMAIL PROTECTED]
MBR, Sergei
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the
Tejun Heo wrote:
ICH6 R/Ms share PCI ID between piix and ahci modes and we've been
allowing ahci to attach regardless of how BIOS configured it.
However, enabling AHCI mode when the controller is in combined mode
can result in unexpected behavior. Don't attach if the controller is
in combined
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