Hi,
On 8/15/05, Bjorn Helgaas [EMAIL PROTECTED] wrote:
On Friday 12 August 2005 2:40 am, Alan Cox wrote:
Assuming all IA-64 boxes are PCI or better then you actually want to
edit include/asm-ia64/ide.h and edit ide_default_io_base where someone
years ago cut and pasted x86-32 values so
On 8/16/05, Bartlomiej Zolnierkiewicz [EMAIL PROTECTED] wrote:
Hi,
On 8/15/05, Bjorn Helgaas [EMAIL PROTECTED] wrote:
On Friday 12 August 2005 2:40 am, Alan Cox wrote:
Assuming all IA-64 boxes are PCI or better then you actually want to
edit include/asm-ia64/ide.h and edit
On Maw, 2005-08-16 at 11:38 +0200, Bartlomiej Zolnierkiewicz wrote:
* removing IDE_ARCH_OBSOLETE_INIT define has some implications,
* non-functional ide-cs driver (but there is no PCMCIA on IA64?)
IA64 systems can support PCI-Cardbus/PCMCIA cards so they do actually
need this support. They
On Tue, Aug 16, 2005 at 01:55:58PM +0100, Alan Cox wrote:
On Maw, 2005-08-16 at 11:38 +0200, Bartlomiej Zolnierkiewicz wrote:
* removing IDE_ARCH_OBSOLETE_INIT define has some implications,
* non-functional ide-cs driver (but there is no PCMCIA on IA64?)
IA64 systems can support
On Maw, 2005-08-16 at 12:02 +0200, Bartlomiej Zolnierkiewicz wrote:
On 8/11/05, Christoph Hellwig [EMAIL PROTECTED] wrote:
On Thu, Aug 11, 2005 at 02:24:43PM -0600, Bjorn Helgaas wrote:
IA64 boxes only have PCI IDE devices, so there's no need to blindly poke
around in I/O port space.
On 8/16/05, Alan Cox [EMAIL PROTECTED] wrote:
* non-functional HDIO_REGISTER_HWIF ioctl (ain't really working either)
HDIO_SCAN_HWIF - I don't know about this one. How are we supposed to
follow the new ports shouldn't define IDE_ARCH_OBSOLETE_INIT injunction
if we lose all this
On Maw, 2005-08-16 at 22:42 +0200, Bartlomiej Zolnierkiewicz wrote:
IMO this is much better solution as:
* you go from working code into small steps (evolution)
If there was working code to go from maybe. The IDE core code is far too
broken for that to be the case. The drivers are different
On Iau, 2005-08-11 at 17:07 -0600, Bjorn Helgaas wrote:
So the scenario in question (correct me if I'm wrong) is that we
have a PCI IDE device that is handed off in compatibility mode (and
may only work in that mode). In that case, the PCI *device* still
exists, so shouldn't the IDE PCI code
On Iau, 2005-08-11 at 14:24 -0600, Bjorn Helgaas wrote:
IA64 boxes only have PCI IDE devices, so there's no need to blindly poke
around in I/O port space. Poking at things that don't exist causes MCAs
on HP ia64 systems.
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Nak-by: Alan Cox
On Thu, 11 Aug 2005, Bjorn Helgaas wrote:
So the scenario in question (correct me if I'm wrong) is that we
have a PCI IDE device that is handed off in compatibility mode (and
may only work in that mode). In that case, the PCI *device* still
exists, so shouldn't the IDE PCI code claim that
Maybe it should instead depend on those systems where it is available.
Anything but X86?
x86_64?
Jan Engelhardt
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IA64 boxes only have PCI IDE devices, so there's no need to blindly poke
around in I/O port space. Poking at things that don't exist causes MCAs
on HP ia64 systems.
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: work-vga/drivers/ide/Kconfig
Bjorn Helgaas wrote:
IA64 boxes only have PCI IDE devices, so there's no need to blindly poke
around in I/O port space. Poking at things that don't exist causes MCAs
on HP ia64 systems.
Signed-off-by: Bjorn Helgaas [EMAIL PROTECTED]
Index: work-vga/drivers/ide/Kconfig
On Thursday 11 August 2005 2:34 pm, Christoph Hellwig wrote:
On Thu, Aug 11, 2005 at 02:24:43PM -0600, Bjorn Helgaas wrote:
IA64 boxes only have PCI IDE devices, so there's no need to blindly poke
around in I/O port space. Poking at things that don't exist causes MCAs
on HP ia64 systems.
On Thursday 11 August 2005 2:36 pm, Jeff Garzik wrote:
Bjorn Helgaas wrote:
IA64 boxes only have PCI IDE devices, so there's no need to blindly poke
around in I/O port space. Poking at things that don't exist causes MCAs
on HP ia64 systems.
Signed-off-by: Bjorn Helgaas [EMAIL
Bjorn Helgaas wrote:
On Thursday 11 August 2005 2:36 pm, Jeff Garzik wrote:
Bjorn Helgaas wrote:
IA64 boxes only have PCI IDE devices, so there's no need to blindly poke
around in I/O port space. Poking at things that don't exist causes MCAs
on HP ia64 systems.
Signed-off-by: Bjorn Helgaas
On Thursday 11 August 2005 2:56 pm, Jeff Garzik wrote:
Bjorn Helgaas wrote:
On Thursday 11 August 2005 2:36 pm, Jeff Garzik wrote:
Bjorn Helgaas wrote:
config IDE_GENERIC
tristate generic/default IDE chipset support
+ depends on !IA64
hm. Are you POSITIVE that the legacy
On Thu, Aug 11, 2005 at 03:42:07PM -0600, Bjorn Helgaas wrote:
Tony, others, does this change give you any heartburn? On
the 460GX and 870 boxes I have, IDE is a PCI device.
(I have been told that the SGI ia64 simulator depends on
IDE_GENERIC. But it really should make the IDE device
Jeff Garzik wrote:
00:1f.1 IDE interface: Intel Corporation 82801EB/ER (ICH5/ICH5R) IDE Controller
(rev 02) (prog-if 8a [Master SecP PriP])
Subsystem: Hewlett-Packard Company d530 CMT (DG746A)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Step
ping- SERR-
Luck, Tony wrote:
Tony, others, does this change give you any heartburn? On
the 460GX and 870 boxes I have, IDE is a PCI device.
No heartburn for me ... as you say IDE is built into one
of the 870 chips.
I don't know whether any non-Intel chipsets provide legacy IDE.
The question is not
On Thursday 11 August 2005 3:56 pm, Jeff Garzik wrote:
Jeff Garzik wrote:
00:1f.1 IDE interface: Intel Corporation 82801EB/ER (ICH5/ICH5R) IDE
Controller
(rev 02) (prog-if 8a [Master SecP PriP])
Subsystem: Hewlett-Packard Company d530 CMT (DG746A)
Control: I/O+ Mem+
Bjorn Helgaas wrote:
You deduce this by the absence of SecO and PriO? I wonder if lspci
should be enhanced to notice this, too. I assume that the IRQ 169
doesn't correspond to anything in /proc/interrupts.
Correct.
So the scenario in question (correct me if I'm wrong) is that we
have a
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