Re: [PATCH 1/1] ide: pdc202xx_new PLL input clock fix

On 7/3/07, Albert Lee [EMAIL PROTECTED] wrote: Recently the PLL input clock of Promise 2027x is sometimes detected higer than expected (e.g. 20.027 MHz compared to 16.714 MHz). It seems sometimes the mdelay() function is not as precise as it used to be. Per Alan's advice, HT or power management

Re: [PATCH 1/1] ide: pdc202xx_new PLL input clock fix

Sergei Shtylyov wrote: Bartlomiej Zolnierkiewicz wrote: typos fixed manually Signed-off-by: Albert Lee [EMAIL PROTECTED] Except for types in description: Said he, while making his own typo. :-) :) -- albert - To unsubscribe from this list: send the line unsubscribe

Re: [PATCH 1/1] ide: pdc202xx_new PLL input clock fix

On Tuesday 03 July 2007, Albert Lee wrote: Recently the PLL input clock of Promise 2027x is sometimes detected higer than expected (e.g. 20.027 MHz compared to 16.714 MHz). It seems sometimes the mdelay() function is not as precise as it used to be. Per Alan's advice, HT or power management

Re: [PATCH 1/1] ide: pdc202xx_new PLL input clock fix

On Tuesday 03 July 2007, Sergei Shtylyov wrote: Hello. Albert Lee wrote: Recently the PLL input clock of Promise 2027x is sometimes detected higer than expected (e.g. 20.027 MHz compared to 16.714 MHz). ^ h It seems sometimes the mdelay() function is not as precise as it used

[PATCH 1/1] ide: pdc202xx_new PLL input clock fix

Recently the PLL input clock of Promise 2027x is sometimes detected higer than expected (e.g. 20.027 MHz compared to 16.714 MHz). It seems sometimes the mdelay() function is not as precise as it used to be. Per Alan's advice, HT or power management might affect the precision of mdelay(). This