On Sun, 14 Oct 2007 13:31:34 -0400, Jeff Garzik wrote:
Mikael Pettersson wrote:
On Thu, 16 Aug 2007 21:19:40 +0100, Alan Cox wrote:
Unfortunately this breaks pata_pdc2027x on my PowerMac G3:
Did this ever get resolved?
All went quiet so I assume its gone away ?
-ENOTIME
The
Mikael Pettersson wrote:
(cc:ing linuxppc-dev)
On Tue, 26 Jun 2007 13:43:15 +0800, Albert Lee wrote:
Recently the PLL input clock of pata_pdc2027x is sometimes detected
higer than expected (e.g. 20.027 MHz compared to 16.714 MHz).
It seems sometimes the mdelay() function is not as precise as
Unfortunately this breaks pata_pdc2027x on my PowerMac G3:
Did this ever get resolved?
All went quiet so I assume its gone away ?
-
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On Tue, 10 Jul 2007 11:52:59 +0800, Albert Lee wrote:
Recently the PLL input clock of pata_pdc2027x is sometimes detected
higer than expected (e.g. 20.027 MHz compared to 16.714 MHz).
It seems sometimes the mdelay() function is not as precise as it
used to be. Per Alan's advice, HT or power
Albert Lee wrote:
Recently the PLL input clock of pata_pdc2027x is sometimes detected
higer than expected (e.g. 20.027 MHz compared to 16.714 MHz).
It seems sometimes the mdelay() function is not as precise as it
used to be. Per Alan's advice, HT or power management might affect
the precision of
Recently the PLL input clock of pata_pdc2027x is sometimes detected
higer than expected (e.g. 20.027 MHz compared to 16.714 MHz).
It seems sometimes the mdelay() function is not as precise as it
used to be. Per Alan's advice, HT or power management might affect
the precision of mdelay().
This
