Ondrej Zary wrote:
Hello,
I think that I've found and fixed the problem. There is a copy/paste bug in
vt6421_set_dma_mode() function which causes wrong values to be written to
PATA_UDMA_TIMING register.
This patch fixes a copy/paste bug that breaks DMA modes on VT6421 PATA port.
Hello,
I think that I've found and fixed the problem. There is a copy/paste bug in
vt6421_set_dma_mode() function which causes wrong values to be written to
PATA_UDMA_TIMING register.
This patch fixes a copy/paste bug that breaks DMA modes on VT6421 PATA port.
Signed-off-by: Ondrej Zary
On Sat, 1 Sep 2007 00:55:21 +0200
Ondrej Zary [EMAIL PROTECTED] wrote:
Hello,
I think that I've found and fixed the problem. There is a copy/paste bug in
vt6421_set_dma_mode() function which causes wrong values to be written to
PATA_UDMA_TIMING register.
This patch fixes a copy/paste
The transfer mode decreases from UDMA/100 to UDMA/66 and then UDMA/33 but it
doesn't help at all. The drive itself is fine, the problems also appear with
Does it settle at UDMA33 or keep going down lower ?
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On Tuesday 21 August 2007 14:27:31 Alan Cox wrote:
The transfer mode decreases from UDMA/100 to UDMA/66 and then UDMA/33 but
it doesn't help at all. The drive itself is fine, the problems also
appear with
Does it settle at UDMA33 or keep going down lower ?
It does not go below UDMA33.
dd