At 10/19/2012 03:06 PM, KOSAKI Motohiro Wrote:
On Fri, Oct 19, 2012 at 2:46 AM, we...@cn.fujitsu.com wrote:
From: Wen Congyang we...@cn.fujitsu.com
When we hotremove a memory device, we will free the memory to store
struct page. If the page is hwpoisoned page, we should decrease
v4:
1) a couple of coding style fixes (lines over 80 characters)
v3:
1) hash calculation simlified to improve perfomance.
v2:
1) Hash table become RCU-friendly. Hash table search now done under RCU lock
protection.
I've tested scalability on KVM with 4 CPU. The testing environment was build
of
Hi Dave.
Test Procedure:
1) Local USB disk WRITE speed on NFS server is ~25 MB/s
2) Run WRITE test(create 1 GB file) on NFS Client with default
writeback settings on NFS Server. By default
bdi-dirty_background_bytes = 0, that means no change in default
writeback behaviour
3) Next we change
On Fri, 2012-10-19 at 11:50 +0400, Stanislav Kinsbursky wrote:
v4:
1) a couple of coding style fixes (lines over 80 characters)
v3:
1) hash calculation simlified to improve perfomance.
v2:
1) Hash table become RCU-friendly. Hash table search now done under RCU lock
protection.
This
Hi Wen,
Some bug fix patches have been merged into linux-next.
So the patches confuse me.
Why did you send same patches again?
Thanks,
Yasuaki Ishimatsu
2012/10/19 15:46, we...@cn.fujitsu.com wrote:
From: Wen Congyang we...@cn.fujitsu.com
Changes from v2 to v3:
Merge the bug fix from
The mutex for accessing lp855x registers is used in case of
the user-space interaction.
When the brightness is changed via the sysfs, the mutex is required.
But the backlight class device already provides it.
Thus, the lp855x mutex is unnecessary.
Signed-off-by: Milo(Woogyom) Kim
The LP855x family devices support the PWM input for the backlight control.
Period of the PWM is configurable in the platform side.
Platform specific functions are unnecessary anymore because
generic PWM functions are used inside the driver.
(PWM input mode)
To set the brightness, new
On Fri, Oct 19, 2012 at 8:18 AM, Richard Yang
weiy...@linux.vnet.ibm.com wrote:
On Fri, Oct 19, 2012 at 07:23:09AM +0200, Stefani Seibold wrote:
Am Freitag, den 19.10.2012, 00:37 +0200 schrieb richard -rw- weinberger:
On Thu, Oct 18, 2012 at 3:59 PM, Wei Yang weiy...@linux.vnet.ibm.com
wrote:
2012/10/19 17:06, Yasuaki Ishimatsu wrote:
Hi Wen,
Some bug fix patches have been merged into linux-next.
So the patches confuse me.
The following patches have been already merged into linux-next
and mm-tree as long as I know.
Wen Congyang (6):
clear the memory to store struct page
On Fri, Oct 19, 2012 at 08:11:50AM +, Kim, Milo wrote:
The LP855x family devices support the PWM input for the backlight control.
Period of the PWM is configurable in the platform side.
Platform specific functions are unnecessary anymore because
generic PWM functions are used inside
On Tue, Oct 16, 2012 at 11:17 AM, Dave Chinner da...@fromorbit.com wrote:
On Wed, Oct 10, 2012 at 06:07:33PM +0800, zwu.ker...@gmail.com wrote:
From: Zhi Yong Wu wu...@linux.vnet.ibm.com
FS_IOC_GET_HEAT_INFO: return a struct containing the various
metrics collected in btrfs_freq_data
On 10/18/2012 06:09 PM, Avi Kivity wrote:
On 10/09/2012 08:51 PM, Raghavendra K T wrote:
Here is the summary:
We do get good benefit by increasing ple window. Though we don't
see good benefit for kernbench and sysbench, for ebizzy, we get huge
improvement for 1x scenario. (almost 2/3rd of ple
Hi Avinash,
This look good to me except the: status = disabled.
The disabled should be reserved for variant that does not contain the IP.
Is it the case here?
Regards,
Benoit
On 09/18/2012 07:30 AM, Philip, Avinash wrote:
Add McSPI data node to AM33XX device tree file. The McSPI module (and
On 17/10/12 16:45, Will Deacon wrote:
The {read,write}s{b,w,l} operations are not defined by all architectures
and are being removed from the asm-generic/io.h interface.
This patch replaces the usage of these string functions in the default
SMC accessors with io{read,write}{8,16,32}_rep
On 19/10/12 03:34, James Harper wrote:
This patch implements persistent grants for the xen-blk{front,back}
mechanism. The effect of this change is to reduce the number of unmap
operations performed, since they cause a (costly) TLB shootdown. This allows
the I/O performance to scale better
Jiri,
When I run perf list, I see:
$ perf list
..
rNNN [Raw hardware
event descriptor]
cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware
event descriptor]
(see 'perf list --help' on how to encode it)
But:
$ perf list --help
$
On Tue, Oct 16, 2012 at 4:42 AM, Dave Chinner da...@fromorbit.com wrote:
On Wed, Oct 10, 2012 at 06:07:22PM +0800, zwu.ker...@gmail.com wrote:
From: Zhi Yong Wu wu...@linux.vnet.ibm.com
NOTE:
The patchset is currently post out mainly to make sure
it is going in the correct direction and
On 10/15/2012 08:04 PM, Andrew Theurer wrote:
On Mon, 2012-10-15 at 17:40 +0530, Raghavendra K T wrote:
On 10/11/2012 01:06 AM, Andrew Theurer wrote:
On Wed, 2012-10-10 at 23:24 +0530, Raghavendra K T wrote:
On 10/10/2012 08:29 AM, Andrew Theurer wrote:
On Wed, 2012-10-10 at 00:21 +0530,
On Wed, Oct 17, 2012 at 10:54:27PM +0800, Wei Yongjun wrote:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
arch_write_trylock() should return 'ret' instead of always
return 1.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
I've taken this into the
There's a regression from commit 800d4d30, in autogroup_move_group()
p-signal-autogroup = autogroup_kref_get(ag);
if (!ACCESS_ONCE(sysctl_sched_autogroup_enabled))
goto out;
...
out:
autogroup_kref_put(prev);
So kernel changed p's autogroup to
(2012/10/19 5:03), David Rientjes wrote:
On Thu, 18 Oct 2012, Kamezawa Hiroyuki wrote:
@@ -132,7 +162,7 @@ static void *m_start(struct seq_file *m, loff_t *pos)
tail_vma = get_gate_vma(priv-task-mm);
priv-tail_vma = tail_vma;
-
+ hold_task_mempolicy(priv);
/* Start
At 10/19/2012 03:41 PM, KOSAKI Motohiro Wrote:
On Fri, Oct 19, 2012 at 2:46 AM, we...@cn.fujitsu.com wrote:
From: Wen Congyang we...@cn.fujitsu.com
NR_FREE_PAGES will be wrong after offlining pages. We add/dec NR_FREE_PAGES
like this now:
1. mova all pages in buddy system to
At 10/19/2012 04:19 PM, Yasuaki Ishimatsu Wrote:
2012/10/19 17:06, Yasuaki Ishimatsu wrote:
Hi Wen,
Some bug fix patches have been merged into linux-next.
So the patches confuse me.
Sorry, I don't check linux-next tree.
The following patches have been already merged into linux-next
and
From: Al Viro v...@zeniv.linux.org.uk
Signed-off-by: Al Viro v...@zeniv.linux.org.uk
Acked-and-Tested-by: Guan Xuetao g...@mprc.pku.edu.cn
---
arch/unicore32/include/uapi/asm/unistd.h |1 +
arch/unicore32/kernel/entry.S|5 -
arch/unicore32/kernel/sys.c | 21
Generally this looks good. Obviously you'll need to update any users of
this driver as well. It might make sense to include those changes in
this patch to avoid interim build failures.
Thanks for your review.
So far no usages for this driver in the mainline.
I've tested it in my own
From: Al Viro v...@zeniv.linux.org.uk
Signed-off-by: Al Viro v...@zeniv.linux.org.uk
Acked-and-Tested-by: Guan Xuetao g...@mprc.pku.edu.cn
---
arch/unicore32/Kconfig |2 +
arch/unicore32/include/asm/processor.h |5 ---
arch/unicore32/kernel/entry.S | 15
On Fri, Oct 19, 2012 at 10:27:35AM +0200, Stephane Eranian wrote:
Jiri,
When I run perf list, I see:
$ perf list
..
rNNN [Raw hardware
event descriptor]
cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware
event
On 10/18/2012 12:28 AM, Yinghai Lu wrote:
On Wed, Oct 17, 2012 at 12:39 AM, Tang Chentangc...@cn.fujitsu.com wrote:
On 10/17/2012 01:18 PM, Yinghai Lu wrote:
And also, I have another 2 questions, maybe you can help me.
1) Do we need to put PNP0A08 into acpi_pci_roots ?
looks like we need to
On 2012/10/19 8:58, Tejun Heo wrote:
Hello, again.
On Thu, Oct 18, 2012 at 05:38:35PM -0700, Tejun Heo wrote:
Even if there isn't an actual race, the comment is dead wrong. I'm
reverting the following three patches. Let's try again later.
7e381b0eb1 (cgroup: Drop task_lock(parent) on
From: Maxime Bizon mbi...@freebox.fr
The current CE4100 and 8250_pci code have both a limitation preventing the
registration and usage of CE4100's second UART. This patch changes the
platform code fixing up the UART port to work on a relative UART port
base address, as well as the 8250_pci code
Hi,
Following patches modify cachinfo code to make use of AMD's topology
extension CPUID functions. Thus (hopefully) we can avoid CPU specific
modifications whenever cache topology changes.
Please apply.
Thanks,
Andreas
--
To unsubscribe from this list: send the line unsubscribe linux-kernel
Introduce cpu_has_topoext to check for AMD's CPUID topology extensions
support. It indicates support for
CPUID Fn8000_001D_EAX_x[N:0]-CPUID Fn8000_001E_EDX
See AMD's CPUID Specification, Publication # 25481
(as of Rev. 2.34 September 2010)
Signed-off-by: Andreas Herrmann
On Thu, 2012-10-18 at 20:59 +0200, Yann E. MORIN wrote:
On Thursday 18 October 2012 Yaakov (Cygwin/X) wrote:
Tested-by: Yaakov Selkowitz yselkow...@users.sourceforge.net
Out of curiosity: did you test on Cygwin?
Yes, of course.
Yaakov
Cygwin Ports
--
To unsubscribe from this list: send
CPUID 0x801d works quite similar to Intels' CPUID function 4.
Use it to determine number of cache leafs.
Signed-off-by: Andreas Herrmann andreas.herrma...@amd.com
---
arch/x86/include/asm/processor.h |2 +-
arch/x86/kernel/cpu/amd.c |7 +--
Rely on CPUID 0x801d for cache information when AMD CPUID topology
extensions are available.
Signed-off-by: Andreas Herrmann andreas.herrma...@amd.com
---
arch/x86/kernel/cpu/intel_cacheinfo.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git
The patch is based on a patch submitted by Hans Rosenfeld.
See http://marc.info/?l=linux-kernelm=133908777200931
Note that CPUID Fn8000_001D_EAX slightly differs to Intel's CPUID function 4.
Bits 14-25 contain NumSharingCache. Actual number of cores sharing
this cache. SW to add
At 10/19/2012 03:44 AM, KOSAKI Motohiro Wrote:
+ if (type == ACPI_BUS_REMOVAL_EJECT) {
+ /*
+* offline and remove memory only when the memory device
is
+* ejected.
+*/
This comment explain nothing. A comment should
Quite a big redesign of the feature - both structures and code have been
simplified and should be easier to read and understand, data duplication is
avoided, and much less memory allocations take place at runtime. Usage
interface is also simpler and IMHO more logical.
What happened is that
Some device drivers (e.g. panel backlights ) need to follow precise
sequences for powering on and off, involving GPIOs, regulators, PWMs
with a precise powering order and delays to respect between each steps.
These sequences are device-specific, and do not belong to a particular
driver - therefore
Make use of the power sequences specified in the device tree or platform
data to control how the backlight is powered on and off.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
.../bindings/video/backlight/pwm-backlight.txt | 72 -
drivers/video/backlight/Kconfig
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
arch/arm/boot/dts/tegra20-ventana.dts | 59 ++-
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts
b/arch/arm/boot/dts/tegra20-ventana.dts
index
On Friday 19 October 2012 04:09 AM, Stephen Warren wrote:
On 10/18/2012 04:56 AM, Laxman Dewangan wrote:
Add base address of all slink controller of Tegra20
and tegra30.
Lets not add anything to iomap.h; we're trying to remove it. Instead,
just put the raw address in the AUXDATA; I assume
In one use case, the administrator then needs the ability to configure
devices easily, for example to be much more restrictive on non-MMC
devices. It must be done with the same tools it uses for other
aspects of the policy---which will be a combination of DAC (Unix
permissions and ACLs)
On Thu, Oct 18, 2012 at 11:05:02PM +0100, Andrew Morton wrote:
On Wed, 17 Oct 2012 16:54:02 +0100
Will Deacon will.dea...@arm.com wrote:
On x86 memory accesses to pages without the ACCESSED flag set result in the
ACCESSED flag being set automatically. With the ARM architecture a page
On 10/19/2012 02:06 AM, David Rientjes wrote:
On Thu, 18 Oct 2012, Glauber Costa wrote:
Do we actually need to test PF_KTHREAD when current-mm == NULL?
Perhaps because of aio threads whcih temporarily adopt a userspace mm?
I believe so. I remember I discussed this in the past with David
On Friday 19 October 2012 04:11 AM, Stephen Warren wrote:
On 10/18/2012 04:56 AM, Laxman Dewangan wrote:
Add slink controller details in the dts file of
Tegra20 and Tegra30.
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
+ slink@7000d400 {
+
Andi Kleen a...@firstfloor.org writes:
[Updated version for the latest master tree and various fixes.
See end for details. This should be ready for merging now I hope.]
This is also now available at
git://git.kernel.org/pub/scm/linux/kernel/git/ak/linux-misc.git hsw/pmu3
-Andi
--
On Friday 19 October 2012 04:13 AM, Stephen Warren wrote:
The patch subject isn't entirely accurate here; this patch isn't just
about fixing clock entries.
OK, then will break in two patches.
+ OF_DEV_AUXDATA(nvidia,tegra20-slink, TEGRA_SLINK1_BASE,
spi-tegra-slink.0, NULL),
On Fri, Oct 19, 2012 at 07:19:27AM +0100, Alexander Holler wrote:
Hello,
Am 18.10.2012 14:16, schrieb Thomas Meyer:
ERROR: read_current_timer [drivers/gpu/drm/udl/udl.ko] undefined!
ERROR: read_current_timer [crypto/tcrypt.ko] undefined!
There is already a long thread about that,
On 10/19/2012 01:41 AM, Marcos Paulo de Souza wrote:
This does not chnange the rationale, just a cleanup
Signed-off-by: Marcos Paulo de Souza marcos.souza@gmail.com
Thanks,
Acked-by: Lars-Peter Clausen l...@metafoo.de?
---
drivers/power/jz4740-battery.c | 12 +---
1 file
On Thu, 18 Oct 2012 17:39:11 +0400 Vyacheslav Dubeyko sl...@dubeyko.com
wrote:
[snip]
And Would you share ppt or document of f2fs if Korea Linux Forum is
finished ?
Here I attached the slides, and LF will also share the slides.
Thanks,
I had hope that slides will have
On Fri, 2012-10-19 at 18:06 +0900, Alexandre Courbot wrote:
Make use of the power sequences specified in the device tree or platform
data to control how the backlight is powered on and off.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
On 10/19/2012 01:41 AM, Marcos Paulo de Souza wrote:
This don't change the rationale, just a cleanup.
Signed-off-by: Marcos Paulo de Souza marcos.souza@gmail.com
Patch is ok in general, but it would be even better if you'd use
devm_request_and_ioremap. It does both the
On Fri, Oct 19, 2012 at 09:25:48AM +0100, James Hogan wrote:
On 17/10/12 16:45, Will Deacon wrote:
The {read,write}s{b,w,l} operations are not defined by all architectures
and are being removed from the asm-generic/io.h interface.
This patch replaces the usage of these string functions
On Fri, 19 Oct 2012, Kamezawa Hiroyuki wrote:
From c5849c9034abeec3f26bf30dadccd393b0c5c25e Mon Sep 17 00:00:00 2001
From: KAMEZAWA Hiroyuki kamezawa.hir...@jp.fujitsu.com
Date: Fri, 19 Oct 2012 17:00:55 +0900
Subject: [PATCH] hold task-mempolicy while numa_maps scans.
/proc/pid/numa_maps
On Friday 19 October 2012 17:20:36 Tony Prisk wrote:
On Fri, 2012-10-19 at 18:06 +0900, Alexandre Courbot wrote:
+static void pwm_backlight_on(struct backlight_device *bl)
+{
+ struct pwm_bl_data *pb = dev_get_drvdata(bl-dev);
+ int ret;
+
+ if (pb-enabled)
+
On Fri, 19 Oct 2012, Glauber Costa wrote:
Do we actually need to test PF_KTHREAD when current-mm == NULL?
Perhaps because of aio threads whcih temporarily adopt a userspace mm?
I believe so. I remember I discussed this in the past with David
Rientjes and he advised me to test for both.
On 2012/10/17 21:30, Michal Hocko wrote:
Now that mem_cgroup_pre_destroy callback doesn't fail finally we can
safely move on and forbit all the callbacks to fail. The last missing
piece is moving cgroup_call_pre_destroy after cgroup_clear_css_refs so
that css_tryget fails so no new charges for
19.10.2012 11:56, Eric Dumazet пишет:
I wonder if some applications relied on our idr, assuming they would get
low values for their timer id.
(We could imagine some applications use a table indexed by the timer id)
Hmm.
Probably, this particular case can be optimised by tuning min_id to id of
2012/10/19 17:45, Wen Congyang wrote:
At 10/19/2012 04:19 PM, Yasuaki Ishimatsu Wrote:
2012/10/19 17:06, Yasuaki Ishimatsu wrote:
Hi Wen,
Some bug fix patches have been merged into linux-next.
So the patches confuse me.
Sorry, I don't check linux-next tree.
The following patches have
Hi Viresh,
On Fri, Oct 19, 2012 at 12:23:08PM +0530, viresh kumar wrote:
On Fri, Oct 19, 2012 at 11:29 AM, Shiraz Hashim shiraz.has...@st.com wrote:
On Thu, Oct 18, 2012 at 11:11:06PM +0530, viresh kumar wrote:
On Thu, Oct 18, 2012 at 4:58 PM, Shiraz Hashim shiraz.has...@st.com
wrote:
On 10/19/2012 01:41 AM, Marcos Paulo de Souza wrote:
With this we can remove a lot of checks.
Signed-off-by: Marcos Paulo de Souza marcos.souza@gmail.com
This one is a bit more tricky and the driver currently gets it (partially
wrong). The issue is that since the power supply is
On 19 October 2012 15:13, Shiraz Hashim shiraz.has...@st.com wrote:
It may not be required as pwms which are not enabled do not have
their clocks enabled. Hence, perhaps we can do following,
8---
static int spear_pwm_remove(struct platform_device *pdev)
{
On Fri, Oct 19, 2012 at 01:28:35AM +0400, Cyrill Gorcunov wrote:
A common way in which we do this future-proofing is to display the info
in name:value tuples (eg, /proc/meminfo). So userspace parses for the
name rather than looking into a fixed position in the /proc output.
So
On Fri, 19 Oct 2012 10:45:07 +0200
Florian Fainelli ffaine...@freebox.fr wrote:
From: Maxime Bizon mbi...@freebox.fr
The current CE4100 and 8250_pci code have both a limitation preventing the
registration and usage of CE4100's second UART. This patch changes the
platform code fixing up the
On Fri 19-10-12 12:11:52, Sha Zhengju wrote:
On 10/18/2012 11:32 PM, Michal Hocko wrote:
On Thu 18-10-12 21:51:57, Sha Zhengju wrote:
On 10/18/2012 07:56 PM, Michal Hocko wrote:
On Wed 17-10-12 01:14:48, Sha Zhengju wrote:
On Tuesday, October 16, 2012, Michal Hockomho...@suse.cz wrote:
On 10/18/2012 11:21 PM, Andrew Morton wrote:
On Thu, 18 Oct 2012 20:51:05 +0400
Glauber Costa glom...@parallels.com wrote:
On 10/18/2012 02:11 AM, Andrew Morton wrote:
On Tue, 16 Oct 2012 14:16:37 +0400
Glauber Costa glom...@parallels.com wrote:
...
A general explanation of what this is
From: Wen Congyang we...@cn.fujitsu.com
The patch-set implements a framework for hot removing memory.
The memory device can be removed by 2 ways:
1. send eject request by SCI
2. echo 1 /sys/bus/pci/devices/PNP0C80:XX/eject
In the 1st case, acpi_memory_disable_device() will be called.
In the 2nd
From: Yasuaki Ishimatsu isimatu.yasu...@jp.fujitsu.com
The memory device can be removed by 2 ways:
1. send eject request by SCI
2. echo 1 /sys/bus/pci/devices/PNP0C80:XX/eject
In the 1st case, acpi_memory_disable_device() will be called.
In the 2nd case, acpi_memory_device_remove() will be
From: Wen Congyang we...@cn.fujitsu.com
The memory device has been ejected and powoffed, so we can call
acpi_bus_trim() to remove the memory device from acpi bus.
CC: David Rientjes rient...@google.com
CC: Jiang Liu liu...@gmail.com
CC: Len Brown len.br...@intel.com
CC: Benjamin Herrenschmidt
From: Wen Congyang we...@cn.fujitsu.com
The memory device can be removed by 2 ways:
1. send eject request by SCI
2. echo 1 /sys/bus/pci/devices/PNP0C80:XX/eject
This 2 events may happen at the same time, so we may touch
acpi_memory_device.res_list at the same time. This patch
introduce a lock to
OMAP RTC IP can have kicker feature. This prevents spurious
writes to register. To write to registers kicker lock has to
be released. Procedure to do it as follows,
1. write to kick0 register, 0x83e70b13
2. write to kick1 register, 0x95a4f1e0
Writing value other than 0x83e70b13 to kick0 enables
rtc-omap driver can be reused for AM33xx RTC.
Provide dependency in Kconfig.
Signed-off-by: Afzal Mohammed af...@ti.com
Acked-by: Sekhar Nori nsek...@ti.com
---
v2:
Modify Kconfig help, resolve checkpatch warning
drivers/rtc/Kconfig | 10 ++
1 file changed, 6 insertions(+), 4
enhance rtc-omap driver with DT capability
Signed-off-by: Afzal Mohammed af...@ti.com
Acked-by: Sekhar Nori nsek...@ti.com
---
v4:
Proper devicetree documentation
v2:
Use compatible as ti,da830-rtc instead of ti,am1808-rtc
Documentation/devicetree/bindings/rtc/rtc-omap.txt | 17
On 10/19/2012 01:31 PM, David Rientjes wrote:
On Fri, 19 Oct 2012, Glauber Costa wrote:
Do we actually need to test PF_KTHREAD when current-mm == NULL?
Perhaps because of aio threads whcih temporarily adopt a userspace mm?
I believe so. I remember I discussed this in the past with David
From: Vaibhav Hiremath hvaib...@ti.com
OMAP1 RTC driver is used in multiple devices like,
OMAPL138 and AM33XX. Driver currently doesn't handle any clocks,
which may be right for OMAP1 architecture but in case of AM33XX,
the clock/module needs to be enabled in order to access the registers.
So
Hi Andrew,
This series enhances rtc-omap driver so as to be usable on
am33xx SoC by adding DT support (Beagle Bone uses am33xx).
This is a revised version of series that was posted on
27th July 2012 with the subject,
omap-am33xx rtc dt support.
It seems rtc maintainer in inactive and hence
rtc-omap driver is now capable of handling kicker mechanism,
hence remove kicker handling at platform level, instead
provide proper device name so that driver can handle kicker
mechanism by itself
Signed-off-by: Afzal Mohammed af...@ti.com
Acked-by: Sekhar Nori nsek...@ti.com
---
v2:
Use device
On Fri, Oct 19, 2012 at 11:29:43AM +0530, Shiraz HASHIM wrote:
On Thu, Oct 18, 2012 at 11:11:06PM +0530, viresh kumar wrote:
On Thu, Oct 18, 2012 at 4:58 PM, Shiraz Hashim shiraz.has...@st.com wrote:
+ pc-mmio_base = devm_request_and_ioremap(pdev-dev, r);
+ if (!pc-mmio_base)
On Fri, Oct 19, 2012 at 13:54:15, Cousson, Benoit wrote:
Hi Avinash,
This look good to me except the: status = disabled.
status = disabled in soc .dtsi file to make sure that IP driver
won't loaded unless if IP used.
So from board .dts file status = okay should be set if IP being used.
On Wed, Oct 17, 2012 at 1:41 AM, Ryan Mallon rmal...@gmail.com wrote:
The gpio_export function uses nested if statements and the status
variable to handle the failure cases. This makes the function logic
difficult to follow. Refactor the code to abort immediately on failure
using goto. This
On 19 October 2012 15:31, Shiraz Hashim shiraz.has...@st.com wrote:
On Fri, Oct 19, 2012 at 11:29:43AM +0530, Shiraz HASHIM wrote:
On Thu, Oct 18, 2012 at 11:11:06PM +0530, viresh kumar wrote:
On Thu, Oct 18, 2012 at 4:58 PM, Shiraz Hashim shiraz.has...@st.com
wrote:
+ pc-mmio_base
On 10/19/2012 01:59 AM, David Rientjes wrote:
On Thu, 18 Oct 2012, Glauber Costa wrote:
@@ -2630,6 +2634,171 @@ static void __mem_cgroup_commit_charge(struct
mem_cgroup *memcg,
memcg_check_events(memcg, page);
}
+#ifdef CONFIG_MEMCG_KMEM
+static inline bool
On Wed, Oct 17, 2012 at 3:52 AM, Jingoo Han jg1@samsung.com wrote:
This patch uses pr_* instead of printk. Also, gpio_dbg
is replaced with pr_debug.
Signed-off-by: Jingoo Han jg1@samsung.com
Reviewed-by: Linus Walleij linus.wall...@linaro.org - NAK
Please consult
At 10/19/2012 05:39 PM, Yasuaki Ishimatsu Wrote:
2012/10/19 17:45, Wen Congyang wrote:
At 10/19/2012 04:19 PM, Yasuaki Ishimatsu Wrote:
2012/10/19 17:06, Yasuaki Ishimatsu wrote:
Hi Wen,
Some bug fix patches have been merged into linux-next.
So the patches confuse me.
Sorry, I don't check
On Wed, Oct 17, 2012 at 9:26 AM, Mika Westerberg
mika.westerb...@linux.intel.com wrote:
On Tue, Oct 16, 2012 at 09:23:23PM +0200, Linus Walleij wrote:
Switch from creating the IRQ domain mapping to finding it. In this
case we know very well that the driver has created the apropriate
mapping,
From: Wen Congyang we...@cn.fujitsu.com
The documentation and implementation of 'mem=' option doesn't match, and the
option can't work for efi platform. This patchset updates the documentation
and make the option to work for efi platform.
I resend it again because HPA asked me to resend it some
From: Wen Congyang we...@cn.fujitsu.com
Current mem= implementation seems buggy because specification and
implementation doesn't match. Current mem= has been working
for many years and it's not buggy, it works as expected. So
we should update the specification.
Signed-off-by: Wen Congyang
From: Wen Congyang we...@cn.fujitsu.com
Current mem boot option only can work for non efi environment. If the user
specifies add_efi_memmap, it cannot work for efi environment. In
the efi environment, we call e820_add_region() to add the memory map. So
we can modify __e820_add_region() and the
Add support for PWM chips present on SPEAr platforms. These PWM
chips support 4 channel output with programmable duty cycle and
frequency.
More details on these PWM chips can be obtained from relevant
chapter of reference manual, present at following[1] location.
1.
On Wed, Oct 17, 2012 at 8:32 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 10/16/2012 04:33 PM, Stephen Warren wrote:
On 10/16/2012 01:23 PM, Linus Walleij wrote:
The MXS driver tries to do the work of irq_domain_add_linear()
by reserving a bunch of descriptors somewhere and keeping track
CCing Rafael, because he become ACPI Maintainer.
Hi Wen,
If you update the patch-set, please CCing Rafael from the next time.
Thanks,
Yasuaki Ishimatsu
2012/10/19 19:03, we...@cn.fujitsu.com wrote:
From: Wen Congyang we...@cn.fujitsu.com
The patch-set implements a framework for hot
On Thu, Oct 18, 2012 at 8:22 AM, Shawn Guo shawn@linaro.org wrote:
/* gpio-mxs can be a generic irq chip */
mxs_gpio_init_gc(port, irq_base);
So I know this one is not compile-tested.
No, which defconfig shall I use for this driver?
Hi Matt,
On Thu, Oct 18, 2012 at 18:56:39, Porter, Matt wrote:
Changes since v2:
- Rebased on 3.7-rc1
- Fixed bug in DT/pdata parsing first found by Gururaja
that turned out to be masked by some toolchains
- Dropped unused mach-omap2/devices.c hsmmc patch
-
(trimmed over long cc list from original 00/21 post)
On Fri, 2012-10-19 at 09:04 +0200, Eric Dumazet wrote:
On Thu, 2012-10-18 at 20:55 -0700, Joe Perches wrote:
ethernet, ipv4, and ipv6 address testing uses 3 different api naming styles.
ethernet uses: is_foo_ether_addr
ipv4 uses:
On Thu, Oct 18, 2012 at 6:38 AM, Daniel Glöckner daniel...@gmx.net wrote:
On Mon, Oct 15, 2012 at 10:30:15PM +0200, Linus Walleij wrote:
Another patch that is circulating concerns edge triggers and similar,
and it appear that some parts of the GPIO sysfs is for example
redefining and
NVIDIA produces several Tegra SoCs viz Tegra20, Tegra30 etc.
In order to support USB PHY drivers on these SoCs, existing
PHY driver is split into SoC agnostic common USB PHY driver
and Tegra20-specific USB phy driver. This will facilitate
easy addition and deletion of phy drivers for Tegra SoCs.
At 10/19/2012 06:19 PM, Yasuaki Ishimatsu Wrote:
CCing Rafael, because he become ACPI Maintainer.
Hi Wen,
If you update the patch-set, please CCing Rafael from the next time.
OK.
Thanks
Wen Congyang
Thanks,
Yasuaki Ishimatsu
2012/10/19 19:03, we...@cn.fujitsu.com wrote:
From: Wen
On Thu, Oct 18, 2012 at 12:07 PM, Roland Stigge sti...@antcom.de wrote:
On 10/17/2012 09:05 PM, Greg KH wrote:
+if (value != exported) {
+if (value)
+status = gpio_block_value_export(block);
+else
+status =
Hi,
On Fri, Oct 19, 2012 at 04:03:26PM +0530, Venu Byravarasu wrote:
NVIDIA produces several Tegra SoCs viz Tegra20, Tegra30 etc.
In order to support USB PHY drivers on these SoCs, existing
PHY driver is split into SoC agnostic common USB PHY driver
and Tegra20-specific USB phy driver. This
601 - 700 of 1116 matches
Mail list logo
