On 2015/8/29 12:21, Wang Nan wrote:
diff --git a/tools/perf/tests/Build b/tools/perf/tests/Build
index c1518bd..8c98409 100644
--- a/tools/perf/tests/Build
+++ b/tools/perf/tests/Build
@@ -32,7 +32,14 @@ perf-y += sample-parsing.o
perf-y += parse-no-sample-id-all.o
perf-y += kmod-path.o
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code, same to color space and color depth can be
parsed from EDID.
But presumably Exynos still relaies on the DT properties, so take
good use of
I hit following building error randomly:
...
/bin/sh: /path/to/kernel/buildperf/util/intel-pt-decoder/inat-tables.c: No such
file or directory
...
LINK /path/to/kernel/buildperf/plugin_mac80211.so
LINK /path/to/kernel/buildperf/plugin_kmem.so
LINK
link_rate and lane_count already configured in analogix_dp_set_link_train(),
so we don't need to config those repeatly after training finished, just
remove them out.
Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps,
Linus, I am sorry for the annoyance.
On 09/01/2015 08:47 AM, Linus Torvalds wrote:
Hmm:
On Fri, Aug 14, 2015 at 4:57 PM, Paolo Bonzini wrote:
Xiao Guangrong (9):
KVM: MMU: fully check zero bits for sptes
The above commit causes an annoying new compiler warning.
The warning is
In order to move exynos dp code to bridge directory,
we need to convert driver drm bridge mode first. As
dp driver already have a ptn3460 bridge, so we need
to move ptn bridge to the next bridge of dp bridge.
Signed-off-by: Yakir Yang
---
Changes in v4:
- Take Romain suggest, rebase on
After run "checkpatch.pl -f --subjective" command, I see there
are lots of alignment problem in exynos_dp driver, so let just
fix them.
- Take Romain suggest, rebase on linux-next branch
Signed-off-by: Yakir Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Take Joe Preches
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some platform code. Cause I can't find the exact IP name of exynos dp
DT binding documentation for this new ASoC driver.
Signed-off-by: Songjun Wu
---
.../devicetree/bindings/sound/atmel-classd.txt | 73
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/atmel-classd.txt
diff --git
Add driver for the digital imput to PWM output stereo
class D amplifier. It comes with filter, digitally
controlled gain, an equalizer and a dmphase filter.
Signed-off-by: Songjun Wu
---
sound/soc/atmel/Kconfig|9 +
sound/soc/atmel/Makefile |2 +
We were aborting if the kzalloc of img_swap fails but without freeing the
already allocated out. Similarly we were aborting if spi_sync fails
without releasing out and img_swap.
Signed-off-by: Sudip Mukherjee
---
sound/soc/codecs/wm0010.c | 8 +++-
1 file changed, 7 insertions(+), 1
The Audio Class D Amplifier driver includes two parts.
1) Driver code to implement the Audio Class D Amplifier function.
2) Device tree binding document, it describes how to add the Audio
Class D Amplifier in device tree.
Songjun Wu (2):
ASoC: atmel-classd: add the Audio Class D Amplifier code
On Mon, Aug 31, 2015 at 09:34:04AM +0200, Sascha Hauer wrote:
> Signed-off-by: Sascha Hauer
> Reviewed-by: Daniel Kurtz
Uh, still forgot the commit log. Will add something like:
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and
On Mon 31 Aug 08:43 PDT 2015, Rob Herring wrote:
> On Thu, Aug 27, 2015 at 12:37 PM, Bjorn Andersson
> wrote:
> > This documents a device tree binding for exposing the Qualcomm Shared
> > Memory State Machine as a set of gpio- and interrupt-controllers.
> >
> > Signed-off-by: Bjorn Andersson
>
On Fri 28 Aug 09:44 PDT 2015, Bjorn Andersson wrote:
> It's possible to have gpio chips hanging off unreliable remote buses
> where the get() operation will fail to acquire a readout of the current
> gpio state. Propagate these errors to the consumer so that they can
> act on, retry or ignore
On Mon 31 Aug 18:39 PDT 2015, Stephen Boyd wrote:
> The smd structures are always in little endian, but the smd
> driver is not capable of being used on big endian CPUs. Annotate
> the little endian data members and update the code to do the
> proper byte swapping.
>
I think this looks good,
This patch adds debugfs support to OPP layer to export OPPs and their
properties for all the devices.
This creates a top level directory: /sys/kernel/debug/opp and then
device specific directories (based on device names) inside it. For
example: 'cpu0', 'cpu1', etc..
If multiple devices share the
On Mon 31 Aug 18:39 PDT 2015, Stephen Boyd wrote:
> We already have a function to do this and it silences some sparse
> warnings along the way.
>
Didn't know that, thanks. Do you know why there's no equivalent for
transfers in the other direction? Should we hack one up to do the same
That's the naming convention followed in most of opp core, but few
recent additions didn't follow this, fix them.
Reviewed-by: Stephen Boyd
Signed-off-by: Viresh Kumar
---
drivers/base/power/opp.c | 18 +-
drivers/cpufreq/cpufreq-dt.c | 10 +-
include/linux/pm_opp.h
Move cpu device specific code out of generic opp library, and add it to
cpu.c.
Along with that, create a core-internal opp.h header, which will be used
to share structures and function prototypes within opp core.
Reviewed-by: Stephen Boyd
Signed-off-by: Viresh Kumar
---
We already have a better API to get the opp descriptor block's node from
cpu-node. Lets reuse that instead of creating our own routines for the
same stuff. That cleans the code a lot.
This also kills a check we had earlier (as we are using the generic API
now). Earlier we used to check if the
OPP code is expanding and is already present in multiple directories
(cpufreq and power). Lets move it to its own directory, to manage it
better.
This also moves/renames the cpufreq_opp file to cpu.c, as it will
contain helpers for cpu device. Its not just about cpufreq, other
frameworks can use
On Mon 31 Aug 18:39 PDT 2015, Stephen Boyd wrote:
> The rx and tx channel info are laid out in memory next to each
> other, and there are two types of channel info structures, byte
> based and word based. We have 4 pointers to these info
> structures, when we really only need two to point to the
On Mon 31 Aug 18:41 PDT 2015, Stephen Boyd wrote:
> Passing a void ** almost always requires a cast at the call site.
> Instead of littering the code with casts every time this function
> is called, have qcom_smem_get() return a void pointer to the
> location of the smem item. This frees the
On 09/01/2015 12:36 PM, Michael S. Tsirkin wrote:
> On Tue, Sep 01, 2015 at 11:37:13AM +0800, Jason Wang wrote:
>> >
>> >
>> > On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
>>> > > Even when we skip data decoding, MMIO is slightly slower
>>> > > than port IO because it uses the
On 09/01/2015 12:31 PM, Michael S. Tsirkin wrote:
> On Tue, Sep 01, 2015 at 11:33:43AM +0800, Jason Wang wrote:
>>
>> On 08/31/2015 07:33 PM, Michael S. Tsirkin wrote:
>>> On Mon, Aug 31, 2015 at 04:03:59PM +0800, Jason Wang wrote:
>
> On 08/31/2015 03:29 PM, Michael S. Tsirkin wrote:
On Tue, 01 Sep 2015 00:48:30 +0200,
Shuah Khan wrote:
>
> Hi Takashi,
>
> I am seeing the following inconsistent lock state warning when PCM
> is run in nonatomic mode. This is on 4.2.0 and with the following
> change to force PCM on nonatomic mode:
>
> diff --git a/sound/usb/stream.c
On Tue, Sep 01, 2015 at 11:37:13AM +0800, Jason Wang wrote:
>
>
> On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
> > Even when we skip data decoding, MMIO is slightly slower
> > than port IO because it uses the page-tables, so the CPU
> > must do a pagewalk on each access.
> >
> > This
On Tue, Sep 01, 2015 at 11:33:43AM +0800, Jason Wang wrote:
>
>
> On 08/31/2015 07:33 PM, Michael S. Tsirkin wrote:
> > On Mon, Aug 31, 2015 at 04:03:59PM +0800, Jason Wang wrote:
> >> >
> >> >
> >> > On 08/31/2015 03:29 PM, Michael S. Tsirkin wrote:
> >>> > > Thinking more about this,
Hi Linus,
On Tue, 1 Sep 2015 10:00:09 +1000 (AEST) James Morris wrote:
>
> Highlights:
>
> o PKCS#7 support added to support signed kexec, also utilized for module
> signing. See comments in 3f1e1bea.
>
> ** NOTE: this requires linking against the OpenSSL library, which must
>
On Tue, Sep 01, 2015 at 11:40:14AM +0800, Boqun Feng wrote:
> Hi Paul,
>
> On Mon, Aug 31, 2015 at 01:37:39PM -0700, Paul E. McKenney wrote:
> > On Mon, Aug 31, 2015 at 08:33:35PM +0200, Oleg Nesterov wrote:
> > > On 08/31, Boqun Feng wrote:
> > > >
> > > > Fair enough, I went too far. How about
On Mon, Aug 31, 2015 at 6:01 PM, Andy Lutomirski wrote:
> On Mon, Aug 31, 2015 at 2:47 PM, Brian Gerst wrote:
>> On Mon, Aug 31, 2015 at 5:00 PM, Andy Lutomirski wrote:
>>> Why not just a struct? Also, why is this all tangled up in gsbase
>>> initialization?
>>
>> It has to do with the fact
ed by commits
04be76a9b067 ("locktorture: Support rtmutex torturing")
40b2996f9b32 ("locktorture: Add torture tests for percpu_rwsem")
and maybe more.
I have used the rcu tree from next-20150831 for today.
--
Cheers,
Stephen Rothwells...@canb.auug.
> -Original Message-
> From: Nikhil Badola [mailto:nikhil.bad...@freescale.com]
> Sent: Monday, August 17, 2015 9:54 AM
> To: linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; linux-
> u...@vger.kernel.org
> Cc: ba...@ti.com; Badola Nikhil-B46172
> Subject: [PATCH 1/3][v2]
Hi Paul,
On Mon, Aug 31, 2015 at 01:37:39PM -0700, Paul E. McKenney wrote:
> On Mon, Aug 31, 2015 at 08:33:35PM +0200, Oleg Nesterov wrote:
> > On 08/31, Boqun Feng wrote:
> > >
> > > Fair enough, I went too far. How about just a single paragraph saying
> > > that:
> > >
> > > The wake_up(),
On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
> Even when we skip data decoding, MMIO is slightly slower
> than port IO because it uses the page-tables, so the CPU
> must do a pagewalk on each access.
>
> This overhead is normally masked by using the TLB cache:
> but not so for KVM MMIO,
On 08/31/2015 07:33 PM, Michael S. Tsirkin wrote:
> On Mon, Aug 31, 2015 at 04:03:59PM +0800, Jason Wang wrote:
>> >
>> >
>> > On 08/31/2015 03:29 PM, Michael S. Tsirkin wrote:
>>> > > Thinking more about this, invoking the 0-length write after
>>> > > > >> > the != 0
There is a problem in dwarf-regs.c of sh, sparc and x86 that it is
possible to make an out-of-bound array accessing when searching
register names. This patch fixes it by replacing '<=' to '<', so when
register (number == XXX_MAX_REGS), get_arch_regstr() returns NULL.
Signed-off-by: Wang Nan
Cc:
On Thu, 13 Aug 2015, Jérôme Glisse wrote:
> The invalidate_range_start() and invalidate_range_end() can be
> considered as forming an "atomic" section for the cpu page table
> update point of view. Between this two function the cpu page
> table content is unreliable for the address range being
Recent cleanup removed some include files without checking if the cleaned
up code still compiles. This results in the following compile error.
drivers/clk/h8300/clk-h8s2678.c: In function ‘h8s2678_pll_clk_setup’:
drivers/clk/h8300/clk-h8s2678.c:99:14: error:
implicit declaration of
On Tue, Sep 01, 2015 at 09:28:49AM +0900, Byungchul Park wrote:
> On Mon, Aug 31, 2015 at 05:21:38PM +0200, Peter Zijlstra wrote:
> > On Thu, Aug 20, 2015 at 08:35:16PM +0900, Byungchul Park wrote:
> > > On Thu, Aug 20, 2015 at 08:22:00PM +0900, byungchul.p...@lge.com wrote:
> >
> > > > +
On Thu, Jul 16, 2015 at 03:14:55PM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2015-07-16 at 15:03 +1000, Benjamin Herrenschmidt wrote:
> > On Thu, 2015-07-16 at 12:00 +1000, Michael Ellerman wrote:
> > > That would fix the problem with smp_mb__after_unlock_lock(), but not
> > > the original
On Tue, Sep 01, 2015 at 01:24:53AM +, Richard Yao wrote:
> On Mon, 2015-08-17 09:56:55 -0700, Ben Hutchings wrote:
> > On Mon, 2015-08-17 at 17:11 +0200, Michal Hocko wrote:
> > > On Mon 17-08-15 16:56:32, Ben Hutchings wrote:
> > > > On Mon, 2015-08-17 at 15:54 +0200, Michal Hocko wrote:
> >
On Mon, Aug 31, 2015 at 03:39:38PM -0700, Linus Torvalds wrote:
>
> That's not my only worry. Things like "can you go back to ext3-only"
> is an issue too - I don't think that's been a big priority for ext4
> any more, and if there are any existing hold-outs that still use ext3,
> they may want
On Fri, Aug 28, 2015 at 10:03 PM, Luis R. Rodriguez wrote:
> On Fri, Aug 28, 2015 at 06:26:05PM -0400, Paul Moore wrote:
>> On Fri, Aug 28, 2015 at 7:20 AM, Roberts, William C
>> wrote:
>> > Even triggered updates make sense, since you can at least have some form
>> > of trust
>> > of where
On 2015/9/1 4:43, Arnaldo Carvalho de Melo wrote:
Em Sat, Aug 29, 2015 at 04:21:57AM +, Wang Nan escreveu:
From: He Kuang
arch_get_reg_info() is a helper function which converts register name
like "%rax" to offset of a register in 'struct pt_regs', which is
required by BPF prologue
On Wed, Aug 26, 2015 at 11:03:00AM +, Pallala, Ramakrishna wrote:
> Hi Andreas,
>
> I went on a unplanned leave and I came back to office recently. I will go
> through your comments and get back to you.
Hi Ram,
hope all is well. Please let me know your plans/timeline for completing
this
The __do_IRQ() is removed by the patch:
"1c77ff2 genirq: Remove __do_IRQ"
This patch updates the comment for generic_handle_irq_desc().
Signed-off-by: Huang Shijie
---
include/linux/irqdesc.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/include/linux/irqdesc.h
I am sorry, I forget to remove them. It is generated by git and I send the
patch with outlook.
I will use git-send-email instead next time if my email account work.
Regards
Du, Changbin
> -Original Message-
> From: 'Greg Kroah-Hartman' [mailto:gre...@linuxfoundation.org]
> Sent: Monday,
From: "Tan, Jui Nee"
On Intel Baytrail, there is case when interrupt handler get called, no SPI
message is captured. The RX FIFO is indeed empty when RX timeout pending
interrupt (SSSR_TINT) happens.
Use the BIOS version where both HSUART and SPI are on the same IRQ. Both
drivers are using
On (09/01/15 11:06), Minchan Kim wrote:
> Thanks.
>
> I want to include this patchset in Joonsoo's crypto support patch
> if you don't mind.
>
Sure. Thanks.
-ss
> Because we don't need to make additional changes at this moment
> unless we provides another compress algorithm which
Hi, Arnaldo
On 2015/9/1 4:16, Arnaldo Carvalho de Melo wrote:
Em Sat, Aug 29, 2015 at 03:16:52AM +, He Kuang escreveu:
This patch implements arch_get_reg_info() for arm64 to enable
HAVE_BPF_PROLOGUE feature. For arm64, structure pt_regs is not composed
by fields of register names but an
On Mon, Aug 31, 2015 at 09:49:51AM -0500, Nathan Sullivan wrote:
> Due to having hardware tx buffers less than 512 bytes in size, streaming
> must be enabled on the Zynq for the udc to work at all. Add platform data
> specific to the Zynq udc, which does not set the CI_HDRC_DISABLE_STREAMING
>
On Tue, Sep 01, 2015 at 10:41:50AM +0900, Sergey Senozhatsky wrote:
> Hello Minchan,
>
> On (09/01/15 10:22), Minchan Kim wrote:
> > Hello Sergey,
> >
> > On Fri, Aug 28, 2015 at 05:02:12AM -0700, Sergey Senozhatsky wrote:
> > > Hi,
> > >
> > > I think those are the changes we need to do in
Ping ?
> On Aug 30, 2015, at 14:19, yalin wang wrote:
>
> This patch add kc_offset_to_vaddr() and kc_vaddr_to_offset(),
> the default version doesn't work on arm64, because arm64 kernel address
> is below the PAGE_OFFSET, like module address and vmemmap address are
> all below PAGE_OFFSET
On Tue, 01 Sep 2015 09:29:40 +1000, James Morris said:
> On Sun, 30 Aug 2015, David Howells wrote:
>
> > Add OIDs for sha224, sha284 and sha512 hash algos and use them to select
> > the hashing algorithm. Without this, something like the following error
> > might get written to dmesg:
> >
> > [
Hi Alexey:
在 2015/8/29 11:13, Alexey Klimov 写道:
> Hi Ma Jun,
>
> On Wed, Aug 19, 2015 at 5:55 AM, MaJun wrote:
>> From: Ma Jun
>>
>> Mbigen means Message Based Interrupt Generator(MBIGEN).
>>
>> Its a kind of interrupt controller that collects
>>
>> the interrupts from external devices and
The old code uses hardcode for the memtimer's interrupt property,
this patch replaces the hardcode with the proper macros.
Signed-off-by: Huang Shijie
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hello Minchan,
On (09/01/15 10:22), Minchan Kim wrote:
> Hello Sergey,
>
> On Fri, Aug 28, 2015 at 05:02:12AM -0700, Sergey Senozhatsky wrote:
> > Hi,
> >
> > I think those are the changes we need to do in zram. The rest
> > is zcomp specific. I'll be quite surprised to find out that
> > we
Passing a void ** almost always requires a cast at the call site.
Instead of littering the code with casts every time this function
is called, have qcom_smem_get() return a void pointer to the
location of the smem item. This frees the caller from having to
cast the pointer with the small downside
The rx and tx channel info are laid out in memory next to each
other, and there are two types of channel info structures, byte
based and word based. We have 4 pointers to these info
structures, when we really only need two to point to the
different types of structures. Encapsulate the byte based
We already have a function to do this and it silences some sparse
warnings along the way.
Cc: Bjorn Andersson
Signed-off-by: Stephen Boyd
---
drivers/soc/qcom/smd.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/soc/qcom/smd.c b/drivers/soc/qcom/smd.c
The smd structures are always in little endian, but the smd
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson
Signed-off-by: Stephen Boyd
---
drivers/soc/qcom/smd.c | 173
This set of patches does some tidying in the beginning to prepare
for adding big endian CPU support to the smd code. It builds on a
previous patch to add big endian support to smem.
Stephen Boyd (3):
soc: qcom: smd: Represent channel layout in structures
soc: qcom: smd: Use __iowrite32_copy()
On Mon, Aug 31, 2015 at 6:19 PM, Andy Lutomirski wrote:
>
> On Sun, Aug 30, 2015 at 7:52 PM, Andy Lutomirski wrote:
>>
>> On Sun, Aug 30, 2015 at 2:18 PM, Brian Gerst wrote:
>> > On Sat, Aug 29, 2015 at 12:10 PM, Andy Lutomirski
>> > wrote:
>> >> On Sat, Aug 29, 2015 at 8:20 AM, Brian Gerst
On Mon, 2015-08-17 09:56:55 -0700, Ben Hutchings wrote:
> On Mon, 2015-08-17 at 17:11 +0200, Michal Hocko wrote:
> > On Mon 17-08-15 16:56:32, Ben Hutchings wrote:
> > > On Mon, 2015-08-17 at 15:54 +0200, Michal Hocko wrote:
> > > > On Sun 16-08-15 01:42:27, Ben Hutchings wrote:
> > > > >
Hi Rob,
On 8/28/2015 9:59 PM, Rob Herring wrote:
On Fri, Aug 28, 2015 at 4:12 AM, Milo Kim wrote:
>New function, 'of_dev_get_platdata()'
> - provides unified handling of getting device platform data
> - supports DT and non-DT(legacy) cases
> - removes duplicated code from each driver
> -
Hello Sergey,
On Fri, Aug 28, 2015 at 05:02:12AM -0700, Sergey Senozhatsky wrote:
> Hi,
>
> I think those are the changes we need to do in zram. The rest
> is zcomp specific. I'll be quite surprised to find out that
> we need to change (in zram_drv) more.
This patchset looks good to me.
On 2015/8/31 22:40, Leo Yan wrote:
> On Mon, Aug 31, 2015 at 09:44:38PM +0800, Ding Tianhong wrote:
>> On 2015/8/31 21:12, Leo Yan wrote:
>>> On Sat, Aug 29, 2015 at 04:52:41PM +0800, Ding Tianhong wrote:
Add initial dtsi file to support Hisilicon Hip05-D02 Board with
support of CPUs in
Ich bin Mr.Wenyao Zhou Independent Director der Bank of China, habe ich einen
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On Mon, 2015-08-31 at 15:32 +, Mathieu Desnoyers wrote:
> - On Aug 31, 2015, at 2:54 AM, Michael Ellerman m...@ellerman.id.au wrote:
>
> > On Thu, 2015-08-27 at 13:56 -0400, Mathieu Desnoyers wrote:
> >> Allow it to be used from SPU, since it should not have unwanted
> >> side-effects.
>
On Mon, 2015-08-31 at 17:11 +0530, naresh.kamb...@linaro.org wrote:
> From: Naresh Kamboju
>
> Do not override run_tests, The default rule will just run TEST_PROGS
>
> Signed-off-by: Naresh Kamboju
Thanks.
Acked-by: Michael Ellerman
cheers
--
To unsubscribe from this list: send the line
2015-09-01 1:41 GMT+09:00 Keith Busch :
> Some compilers complain of possible uninitialized variable usage, like
> the following:
>
> drivers/regulator/helpers.c: In function ‘regulator_get_bypass_regmap’:
> drivers/regulator/helpers.c:463:16: warning: ‘val’ may be used
> uninitialized in
On Fri, 2015-08-28 at 14:50 +0300, Horia Geantă wrote:
>
> -#ifdef __BIG_ENDIAN
> -#define wr_reg32(reg, data) out_be32(reg, data)
> -#define rd_reg32(reg) in_be32(reg)
> +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_LE
> +#define caam16_to_cpu(value) le16_to_cpu(value)
> +#define cpu_to_caam16(value)
On Mon, Aug 31, 2015 at 5:07 PM, Olof Johansson wrote:
> We've been able to keep conflicts down this cycle, only a few and none
> are hairy. I've described them in the affected pull requests.
Grmbl, I just fetched your tree and looked for new conflicts, and it
looks like a few more have crept
Hmm:
On Fri, Aug 14, 2015 at 4:57 PM, Paolo Bonzini wrote:
>
> Xiao Guangrong (9):
> KVM: MMU: fully check zero bits for sptes
The above commit causes an annoying new compiler warning.
The warning is bogus ("variable 'leaf' possibly uninitialized"),
because the use of the variable is
Hi Andrew,
Linus has merged the Xtensa patches, so you should be ready to go.
Thanks,
-Chris
On Wed, Aug 26, 2015 at 10:41 AM, Christoph Hellwig wrote:
> On Wed, Aug 26, 2015 at 10:53:25AM +0300, Max Filippov wrote:
>> Looks like I just need to remove now redundant function definitions from
>>
On Mon, Aug 31, 2015 at 05:21:38PM +0200, Peter Zijlstra wrote:
> On Thu, Aug 20, 2015 at 08:35:16PM +0900, Byungchul Park wrote:
> > On Thu, Aug 20, 2015 at 08:22:00PM +0900, byungchul.p...@lge.com wrote:
>
> > > + /*
> > > + * If it's !queued, then only when the task is sleeping it has a
> > >
On 08/31/15 15:31, Raymond Jennings wrote:
On 08/31/15 14:37, Linus Torvalds wrote:
On Sun, Aug 30, 2015 at 11:19 PM, Jan Kara wrote:
The biggest change in the pull is the removal of ext3 filesystem driver
(~28k lines removed).
I really am not ready to just remove ext3 without a lot of good
On Aug 31, 2015, at 3:37 PM, Linus Torvalds
wrote:
>
> On Sun, Aug 30, 2015 at 11:19 PM, Jan Kara wrote:
>>
>> The biggest change in the pull is the removal of ext3 filesystem driver
>> (~28k lines removed).
>
> I really am not ready to just remove ext3 without a lot of good
> arguments.
> From: Adrian Hunter [mailto:adrian.hun...@intel.com]
>
> Add a new test titled:
>
> Test x86 instruction decoder - new instructions
>
> The purpose of this test is to check the instruction decoder
> after new instructions have been added. Initially, MPX
> instructions are tested which
在 2015/9/1 5:40, Sonny Rao 写道:
On Thu, Aug 27, 2015 at 5:36 PM, Shawn Lin wrote:
The purpose of the DMAFLUSHP instruction:
- Tell the peripheral to clear its status and control registers.
- Send a message to the peripheral to resend its level status.
There are 3 timings described in PL330
On 08/29/2015 05:21 PM, Winkler, Tomas wrote:
>>
>> Hi Prarit,
>>
>> On Fri, Aug 28, 2015 at 07:50:52AM -0400, Prarit Bhargava wrote:
>>> Heikki, Tomas?
>>
>> I'm afraid I don't know much about Intel's Management Engine
>> Interface. Looks like the driver is from Samuel (CC'd) so I'm guessing
>>
We normally collect non-urgent fixes during the release cycle and queue them
for the merge window.
This time around the list is short (in part because some have gone in other
branches).
- Maintainers addition for bcm2835
- IRQ number fix for orion5x (been present since 3.18)
- DT fix for
Some releases this branch is nearly empty, others we have more stuff. It
tends to gather drivers that need SoC modification or dependencies such
that they have to (also) go in through our tree.
For this release, we have merged in part of the reset controller tree
(with handshake that the parts we
New or improved SoC support:
- Addition of support for Atmel's SAMA5D2 SoC
- Addition of Freescale i.MX6UL
- Improved support of TI's DM814x platform
- Misc fixes and improvements for RockChip platforms
- Marvell MVEBU suspend/resume support
A few driver changes that ideally would belong in the
> From: Adrian Hunter [mailto:adrian.hun...@intel.com]
>
> Intel SHA Extensions are explained in the Intel Architecture
> Instruction Set Extensions Programing Reference (Oct 2014).
> There are 7 new instructions. Add them to the op code map
> and the perf tools new instructions test. e.g.
>
>
Here's our branch of ARM64 contents for this merge window.
Most of this is DT contents for new SoCs (or those who have seen new
device support added). Maybe we should stop separating out the arm64
contents here to avoid the kind of internal conflicts as we got this
time around, where 32- and
Ladies and gentlemen, we proudly announce to you the latest branch of ARM
device tree contents for the mainline kernel. Come and see, come and see!
No less than twentythree thousand lines of additions! Just imagine the
joy you will have of using your mainline kernel on newly supported
hardware
Hi Linus,
Here's the main batch of changes from arm-soc for 4.3. Besides this we
also have a branch of changes that looked to be late-arriving (right
before -rc7), and we'll leave those to a separate pull request a little
later.
Nothing in here should be controversial at this point. We have more
A large cleanup branch this release, with a healthy 10k negative line delta.
Most of this is removal of legacy (non-DT) support of shmobile
platforms. There is also removal of two non-DT platforms on OMAP,
and the plat-samsung directory is cleaned out by moving most of the
previously
We mostly keep defconfigs updates on a separate branch due to their tendency
to conflict between platforms and this encourages more careful separation of
code changes and config changes.
Most updates here are minor tweaks, enabling new drivers for various platforms,
and so on. Renesas also
On Tue, 2015-09-01 at 00:12 +0200, Ondrej Zary wrote:
>
> On Monday 31 August 2015 22:44:54 Dan Williams wrote:
> > On Mon, 2015-08-31 at 21:19 +0200, Ondrej Zary wrote:
> > > Handle IW_AUTH_ALG_OPEN_SYSTEM in set_auth.
> > > This allows wpa_supplicant (and thus NetworkManager) to work with open
Highlights:
o PKCS#7 support added to support signed kexec, also utilized for module
signing. See comments in 3f1e1bea.
** NOTE: this requires linking against the OpenSSL library, which must
be installed, e.g. the openssl-devel on Fedora **
o Smack: add IPv6 host labeling;
So the drivers can be compiled with CONFIG_RESET_CONTROLLER disabled.
Signed-off-by: Axel Lin
---
v2: Add __must_check and WARN_ON(1); And make it return ERR_PTR(-EINVAL).
include/linux/reset.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/include/linux/reset.h
Hi Simon
Thank you for your feedback
> > From: Nobuhiro Iwamatsu
> >
> > The reg variable used when setting PCIECAR register need to be masked by
> > 0xFC
> > by restriction of the corresponding register.
> > This adds PCIE_CONF_REGNO are macros for masking changes that
> > PCIE_CONF_REGNO
Add a very minimalistic set of Northstar Plus Device Tree files which
describes the SoC and the BCM958625 implementation. The perpherials
described are:
ARM Cortex A9 CPU
2 8250 UARTs
ARM GIC
PL310 L2 Cache
ARM A9 Global timer
Signed-off-by: Kapil Hali
Signed-off-by: Jon Mason
---
On 08/31/2015 03:20 PM, Dave Hansen wrote:
> - if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, _name)) {
> + if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM,
> + _name)) {
> pr_info("CPU feature '%s' is not supported.\n",
Regular release of iproute2 for Linux 4.2
Update to iproute2 utility to support new features in Linux 4.2.
Lots of work went into extending ss and bpf. Also some nicer
formatting in ip commands with brief mode.
Source:
http://www.kernel.org/pub/linux/utils/net/iproute2/iproute2-4.2.0.tar.gz
On Mon, Aug 31, 2015 at 12:59:44PM -0600, Ross Zwisler wrote:
> For DAX msync we just need to flush the given range using
> wb_cache_pmem(), which is now a public part of the PMEM API.
This is wrong, because it still leaves fsync() broken on dax.
Flushing dirty data to stable storage is the
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