Precalculated hash for empty message are now present in hash headers.
This patch just use them.
Signed-off-by: LABBE Corentin
Tested-by: Tom Lendacky
Acked-by: Tom Lendacky
---
drivers/crypto/ccp/Kconfig | 1 +
drivers/crypto/ccp/ccp-ops.c | 39 ---
2
Precalculated hash for empty message are now present in hash headers.
This patch just use them.
Signed-off-by: LABBE Corentin
---
drivers/crypto/Kconfig | 2 ++
drivers/crypto/n2_core.c | 33 ++---
2 files changed, 8 insertions(+), 27 deletions(-)
diff --git
Precalculated hash for empty message are now present in hash headers.
This patch just use them.
Signed-off-by: LABBE Corentin
---
drivers/crypto/ux500/Kconfig | 1 +
drivers/crypto/ux500/hash/hash_core.c | 20 ++--
2 files changed, 3 insertions(+), 18 deletions(-)
Hello
Some crypto drivers cannot process empty data message and so rely on
precalculated hash.
This patch series add precalculated hash in headers and
make the drivers use them.
Changes since v2
- Added missing Kconfig depends on MD5/SHA1
Changes since v1
- Moved arrays from headers to c file
Some crypto drivers cannot process empty data message and return a
precalculated hash for md5/sha1/sha224/sha256.
This patch add thoses precalculated hash in include/crypto.
Signed-off-by: LABBE Corentin
---
crypto/md5.c| 6 ++
crypto/sha1_generic.c | 7 +++
On 15 December 2015 at 09:50, Luca Abeni wrote:
> On 12/15/2015 05:59 AM, Vincent Guittot wrote:
> [...]
>
> So I don't think this is right. AFAICT this projects the WCET as the
> amount of time actually used by DL. This will, under many
> circumstances, vastly overestimate the
Add Document for hi655x pmic regulator driver
Signed-off-by: Chen Feng
Signed-off-by: Fei Wang
Tested-by: Xinwei Kong
---
.../regulator/hisilicon,hi655x-regulator.txt | 43 ++
1 file changed, 43 insertions(+)
create mode 100644
Add mfd driver to support hisilicon hi665x PMIC.
Signed-off-by: Chen Feng
Signed-off-by: Fei Wang
Tested-by: Xinwei Kong
---
drivers/mfd/Kconfig | 9 +++
drivers/mfd/Makefile| 1 +
drivers/mfd/hi655x-pmic.c | 170
Add document for mfd driver hi655x pmic driver
Signed-off-by: Chen Feng
Signed-off-by: Fei Wang
Tested-by: Xinwei Kong
---
.../devicetree/bindings/mfd/hisilicon,hi655x.txt| 17 +
1 file changed, 17 insertions(+)
create mode 100644
Add dts node for hi665x MFD and regulator driver
Signed-off-by: Chen Feng
Signed-off-by: Fei Wang
Tested-by: Xinwei Kong
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 178 ++
1 file changed, 178 insertions(+)
diff --git
The patch sets add support for Hi6220 PMIC Hi655x MFD core and its
regulator driver.
Current testing and support board is Hikey which is one of 96boards.
It is an arm64 open source board. For more information about this board,
please access https://www.96boards.org.
This is hardware layout for
Add driver support for HiSilicon Hi655x voltage regulators.
Signed-off-by: Chen Feng
Signed-off-by: Fei Wang
Tested-by: Xinwei Kong
---
drivers/regulator/Kconfig | 8 +
drivers/regulator/Makefile | 1 +
drivers/regulator/hi655x-regulator.c | 246
On 15 December 2015 at 13:41, Peter Zijlstra wrote:
> On Tue, Dec 15, 2015 at 05:43:44AM +0100, Vincent Guittot wrote:
>> On 14 December 2015 at 17:51, Peter Zijlstra wrote:
>
>> > No, since the WCET can and _will_ happen, its the best you can do with
>> > cpufreq. If you were to set it lower
On 13/12/15 20:41, H. Nikolaus Schaller wrote:
> Great that you did find the real reason of the problem.
>
> I have tested it on the GTA04 and it also works.
>
> Will the patches arrive in 4.5?
4.4, I hope.
Tomi
signature.asc
Description: OpenPGP digital signature
On Tue, Dec 15, 2015 at 09:42:31PM +0900, Namhyung Kim wrote:
> On Tue, Dec 15, 2015 at 01:24:26PM +0100, Jiri Olsa wrote:
> > On Tue, Dec 15, 2015 at 09:13:20PM +0900, Namhyung Kim wrote:
> > > On Tue, Dec 15, 2015 at 07:36:37AM -0300, Arnaldo Carvalho de Melo wrote:
> > > > Em Tue, Dec 15, 2015
Wolfram Sang writes:
> On Mon, Nov 02, 2015 at 02:03:37AM +, Mans Rullgard wrote:
>> The BYTECNT register holds the transfer size minus one. Setting it
>> to the correct value requires a dummy read/write only for zero-length
>> transfers as it is impossible to request one from the hardware.
On 14/12/15 13:36, Daniel Lezcano wrote:
> On 12/02/2015 10:33 AM, Vladimir Murzin wrote:
>> MPS2 platform has simple 32 bits general purpose countdown timers.
>>
>> The driver uses the first detected timer as a clocksource and the rest
>> of the timers as a clockevent
>>
>> Signed-off-by:
Hi,
On Tuesday 15 December 2015 05:25 PM, Arnd Bergmann wrote:
> On Tuesday 15 December 2015 16:44:41 Kishon Vijay Abraham I wrote:
>> Hi Arnd,
>>
>> On Tuesday 15 December 2015 04:26 PM, Arnd Bergmann wrote:
>>> On Tuesday 15 December 2015 14:45:59 Kishon Vijay Abraham I wrote:
This series
On 15 December 2015 at 13:20, Peter Zijlstra wrote:
> On Tue, Dec 15, 2015 at 09:50:14AM +0100, Luca Abeni wrote:
>> On 12/15/2015 05:59 AM, Vincent Guittot wrote:
>
>> >The 2nd definition is used to compute the remaining capacity for the
>> >CFS scheduler. This one doesn't need to be updated at
On Tue, Dec 15, 2015 at 10:25 AM, Bai Ping wrote:
>> It seems that even after this patch we still have a mismatch:
>> assigned-clocks has 5 members and assigned-clock-parents has 4.
>
> I think if it is the last clock in the assigned-clock list, the
> corresponding
> 'assigned-clock-parents' and
On Tue, Dec 15, 2015 at 10:49:56AM +0900, Namhyung Kim wrote:
> Post processing at perf record takes long time on big machines. What it
> does is to find build-id of related binaries. Sometimes we just want to
> skip the processing and get the result quickly. Add a new config option
> to
On 15 December 2015 at 09:50, Luca Abeni wrote:
> On 12/15/2015 05:59 AM, Vincent Guittot wrote:
> [...]
>
> So I don't think this is right. AFAICT this projects the WCET as the
> amount of time actually used by DL. This will, under many
> circumstances, vastly overestimate the
On Tue, Dec 15, 2015 at 01:24:26PM +0100, Jiri Olsa wrote:
> On Tue, Dec 15, 2015 at 09:13:20PM +0900, Namhyung Kim wrote:
> > On Tue, Dec 15, 2015 at 07:36:37AM -0300, Arnaldo Carvalho de Melo wrote:
> > > Em Tue, Dec 15, 2015 at 10:03:29AM +0100, Jiri Olsa escreveu:
> > > > On Tue, Dec 15, 2015
On Tue, Dec 15, 2015 at 05:43:44AM +0100, Vincent Guittot wrote:
> On 14 December 2015 at 17:51, Peter Zijlstra wrote:
> > No, since the WCET can and _will_ happen, its the best you can do with
> > cpufreq. If you were to set it lower you could not be able to execute
> > correctly in your
On 12/12/15 23:39, Andy Shevchenko wrote:
> On Wed, Dec 2, 2015 at 11:33 AM, Vladimir Murzin
> wrote:
>> This driver adds support to the UART controller found on ARM MPS2
>> platform.
>
> Just few comments (have neither time not big desire to do full review).
>
Still better than nothing ;) I'm
On Mon, Dec 14, 2015 at 10:31:13PM +0100, Luca Abeni wrote:
> > There 'might' be smart pants ways around this, where you run part of
> > the execution at lower speed and switch to a higher speed to 'catch'
> > up if you exceed some boundary, such that, on average, you run at the
> > same speed
On Tue, Dec 15, 2015 at 01:22:29PM +0100, Jiri Olsa wrote:
> On Tue, Dec 15, 2015 at 09:07:03PM +0900, Namhyung Kim wrote:
> > On Tue, Dec 15, 2015 at 09:53:09AM +0100, Jiri Olsa wrote:
> > > On Tue, Dec 15, 2015 at 12:46:12AM +0900, Namhyung Kim wrote:
> > >
> > > SNIP
> > >
> > > >
> > > >
On Mon, Dec 14, 2015 at 10:39:11AM +, Wang Nan wrote:
SNIP
> @@ -137,12 +138,15 @@ void machine__exit(struct machine *machine)
> void machine__delete(struct machine *machine)
> {
> machine__exit(machine);
> - free(machine);
> + if (machine->allocated)
> +
On 15/12/15 03:28, Yong Wu wrote:
On Mon, 2015-12-14 at 15:16 +0100, Joerg Roedel wrote:
On Tue, Dec 08, 2015 at 05:49:12PM +0800, Yong Wu wrote:
+static int mtk_iommu_attach_device(struct iommu_domain *domain,
+ struct device *dev)
+{
+ struct
On Mon, Dec 14, 2015 at 02:17:05PM +0100, Matias Bj??rling wrote:
> Allow read and write I/Os to be issued synchronous. Users include the
> LightNVM core to implement system block support and similar.
I think the right way to implement this is to wait in the caller,
e.g. set your end_io handler
Memory cgroup reclaim can be interrupted with mem_cgroup_iter_break()
once enough pages have been reclaimed, in which case, in contrast to a
full round-trip over a cgroup sub-tree, the current position stored in
mem_cgroup_reclaim_iter of the target cgroup does not get invalidated
and so is left
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.
The RPM is a dedicated hardware engine for managing the shared
SoC
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.
Signed-off-by: Georgi Djakov
---
.../devicetree/bindings/clock/qcom,rpmcc.txt
This patchset adds initial support for the clocks controlled by
the RPM (Resource Power Manager) processor on Qualcomm platforms.
The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems
On 2015/12/15 19:16, Fabio Estevam wrote:
On Tue, Dec 15, 2015 at 6:52 AM, Shawn Guo wrote:
On Mon, Dec 14, 2015 at 11:07:50AM +0800, Shawn Guo wrote:
On Wed, Dec 09, 2015 at 04:15:55PM +0800, Bai Ping wrote:
The 'assigned-clock-parents' and 'assigned-clock-rates' list
should corresponding
On Tue, Dec 15, 2015 at 09:13:20PM +0900, Namhyung Kim wrote:
> On Tue, Dec 15, 2015 at 07:36:37AM -0300, Arnaldo Carvalho de Melo wrote:
> > Em Tue, Dec 15, 2015 at 10:03:29AM +0100, Jiri Olsa escreveu:
> > > On Tue, Dec 15, 2015 at 12:46:13AM +0900, Namhyung Kim wrote:
> > > > Each tracepoint
On Tue, Dec 15, 2015 at 09:50:14AM +0100, Luca Abeni wrote:
> Strictly speaking, the active utilisation must be updated when a task
> wakes up and when a task sleeps/terminates (but when a task sleeps/terminates
> you cannot decrease the active utilisation immediately: you have to wait
> some time
Hi Ming,
thanks for the answer!
On 15/12/15 11:54, Ming Lei wrote:
> On Tue, Dec 15, 2015 at 7:05 PM, Andre Przywara
> wrote:
>> Hi,
>>
>> I've been experiencing issues with at least 4.4-rc3 (including current
>
> I'd suggest you to test the latest linus tree first, and at least two
> fix
On Mon, Nov 02, 2015 at 02:03:38AM +, Mans Rullgard wrote:
> The Sigma Designs variant of this controller has the ability to generate
> interrupts. This is controlled using two additional registers, oddly
> enough overlapping with the defined but unused HDSTATIM.
>
> This patch adds support
On 14/12/15 16:59, Mark Brown wrote:
> On Mon, Dec 14, 2015 at 12:36:16PM +, Juri Lelli wrote:
> > On 11/12/15 17:49, Mark Brown wrote:
>
> > > The purpose of the capacity values is to influence the scheduler
> > > behaviour and hence performance. Without a concrete definition they're
> > >
On Tue, Dec 15, 2015 at 09:07:03PM +0900, Namhyung Kim wrote:
> On Tue, Dec 15, 2015 at 09:53:09AM +0100, Jiri Olsa wrote:
> > On Tue, Dec 15, 2015 at 12:46:12AM +0900, Namhyung Kim wrote:
> >
> > SNIP
> >
> > >
> > > $ perf report -s
> > >
On Mon, Nov 02, 2015 at 02:03:37AM +, Mans Rullgard wrote:
> The BYTECNT register holds the transfer size minus one. Setting it
> to the correct value requires a dummy read/write only for zero-length
> transfers as it is impossible to request one from the hardware. If a
> zero-length
On Tue, Dec 15, 2015 at 10:33:25AM +0100, Pali Rohár wrote:
> So am I understand correctly that solution would be to hack
> arch/arm/mm/mmu.c to not overwrite page at PHYS_OFFSET?
That's completely unnecessary: there are enough platform hooks to cope
with whatever the platform requires.
If you
On 15/12/15 11:05, Anatolij Gustschin wrote:
On Tue, 15 Dec 2015 10:26:47 +
Srinivas Kandagatla wrote:
...
Anatolij, Do you see any issues if we totally move this driver to nvmem
framework? Which involves relocating and renameing the old eeprom file
to /sys/bus/nvmem/devices/*/nvmem
I
On Tue, Dec 15, 2015 at 09:50:14AM +0100, Luca Abeni wrote:
> On 12/15/2015 05:59 AM, Vincent Guittot wrote:
> >The 2nd definition is used to compute the remaining capacity for the
> >CFS scheduler. This one doesn't need to be updated at each wake/sleep
> >of a deadline task but should reflect
> -Original Message-
> From: devel [mailto:driverdev-devel-boun...@linuxdriverproject.org] On Behalf
> Of K. Y. Srinivasan
> Sent: Tuesday, December 15, 2015 11:02
> To: gre...@linuxfoundation.org; linux-kernel@vger.kernel.org;
> de...@linuxdriverproject.org; o...@aepfle.de;
On Mon, 14 Dec 2015, Andy Lutomirski wrote:
> On Mon, Dec 14, 2015 at 6:12 AM, Michael S. Tsirkin wrote:
> > On Mon, Dec 14, 2015 at 02:00:05PM +, David Vrabel wrote:
> >> On 07/12/15 16:19, Stefano Stabellini wrote:
> >> > Hi all,
> >> >
> >> > this patch series introduces support for
On Tue, Dec 15, 2015 at 07:36:37AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Tue, Dec 15, 2015 at 10:03:29AM +0100, Jiri Olsa escreveu:
> > On Tue, Dec 15, 2015 at 12:46:13AM +0900, Namhyung Kim wrote:
> > > Each tracepoint event has format string for print to improve
> > > readability. Try to
On Mon, Nov 02, 2015 at 02:03:36AM +, Mans Rullgard wrote:
> Sigma Designs chips use a variant of this controller with the following
> differences:
>
> - The BUSY bit in the STATUS register is inverted
> - Bit 8 of the CONFIG register must be set
> - The controller can generate interrupts
>
Hi Sergei,
On Tue, Dec 15, 2015 at 12:54 PM, Sergei Shtylyov
wrote:
> On 12/15/2015 2:28 PM, Geert Uytterhoeven wrote:
You are mixing 2 and 1 spaces between words, don't do that.
>>>
>>> Care to just explain why?
>>
>> It makes the text difficult to read.
>
>Are you serious? :-)
On 12/15/2015 01:06 PM, Javier Gonzalez wrote:
Add missing check after mempool allocation.
Signed-off-by: Javier Gonzalez
---
drivers/lightnvm/rrpc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/lightnvm/rrpc.c b/drivers/lightnvm/rrpc.c
index a1e7488..f4bc986 100644
---
On Tue, Dec 15, 2015 at 09:53:09AM +0100, Jiri Olsa wrote:
> On Tue, Dec 15, 2015 at 12:46:12AM +0900, Namhyung Kim wrote:
>
> SNIP
>
> >
> > $ perf report -s
> > comm,sched:sched_switch.next_pid,sched:sched_switch.next_comm --stdio
> > ...
> > # Overhead Commandnext_pid
Add missing check after mempool allocation.
Signed-off-by: Javier Gonzalez
---
drivers/lightnvm/rrpc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/lightnvm/rrpc.c b/drivers/lightnvm/rrpc.c
index a1e7488..f4bc986 100644
--- a/drivers/lightnvm/rrpc.c
+++
From: Magnus Damm
Neither the ARM page table code enabled by IOMMU_IO_PGTABLE_LPAE
nor the IPMMU_VMSA driver actually depends on ARM_LPAE, so get
rid of the dependency.
Tested with ipmmu-vmsa on r8a7794 ALT and a kernel config using:
# CONFIG_ARM_LPAE is not set
Signed-off-by: Magnus Damm
On Tue, Dec 15, 2015 at 09:52:33AM +0100, Michal Hocko wrote:
> On Mon 14-12-15 14:04:56, Kirill A. Shutemov wrote:
> > On Wed, Dec 09, 2015 at 02:02:05PM +0100, Michal Hocko wrote:
> > > Hi Kirill,
> >
> > [ sorry for late reply, just back from vacation. ]
> >
> > > while looking at the issue
On Wed, Dec 09, 2015 at 09:57:19AM +, Suzuki K. Poulose wrote:
> The ID_AA64MMFR0_EL1:ASIDBits determines the size of the mm context
> id and is used in the early boot to make decisions. The value is
> picked up from the Boot CPU and cannot be delayed until other CPUs
> are up. If a secondary
From: Magnus Damm
Introduce a bitmap for context handing and convert the
interrupt routine to go handle all registered contexts.
At this point the number of contexts are still limited.
The purpose of this patch is to remove the use of the
ARM specific mapping variable from ipmmu_irq().
From: Magnus Damm
Make the driver compile on more than just 32-bit ARM
by breaking out and wrapping ARM specific functions
in #ifdefs. Needed to be able to use the driver on
other architectures.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 94
From: Magnus Damm
Introduce the function ipmmu_utlb_ctrl() that shares code
to enable or disable utlbs.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
--- 0004/drivers/iommu/ipmmu-vmsa.c
+++
From: Magnus Damm
Rename ipmmu_vmsa_archdata to ipmmu_vmsa_dev_data to avoid
confusion when using the driver on multiple architectures.
The data now stored in ipmmu_vmsa_dev_data is used to point
various on-chip devices to the actual IPMMU instances.
Signed-off-by: Magnus Damm
---
From: Magnus Damm
The IPMMU driver is using DT these days, and platform data is no longer
used by the driver. Remove unused code.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c |5 -
1 file changed, 5 deletions(-)
--- 0001/drivers/iommu/ipmmu-vmsa.c
+++
iommu/ipmmu-vmsa: IPMMU multi-arch update
[PATCH 01/06] iommu/ipmmu-vmsa: Remove platform data handling
[PATCH 02/06] iommu/ipmmu-vmsa: Convert to dev_data
[PATCH 03/06] iommu/ipmmu-vmsa: Break out utlb control function
[PATCH 04/06] iommu/ipmmu-vmsa: Rework interrupt code and use bitmap for
A new argument --format is added to specify an alternate output
format. If perf is compiled with libbabeltrace, support for the
ctf format is available. An example:
perf record --format ctf -e sched:sched_switch ls
Signed-off-by: John Ogness
---
Patch against next-20151215.
There definately
Hello Andy,
Thank you for your feedback. Some inline answers.
Regards,
Igal Liberman
> -Original Message-
> From: Andy Fleming [mailto:aflem...@gmail.com]
> Sent: Tuesday, December 08, 2015 10:18 PM
> To: Liberman Igal-B31950
> Cc: net...@vger.kernel.org; linuxppc-...@lists.ozlabs.org;
On Tuesday 15 December 2015 16:44:41 Kishon Vijay Abraham I wrote:
> Hi Arnd,
>
> On Tuesday 15 December 2015 04:26 PM, Arnd Bergmann wrote:
> > On Tuesday 15 December 2015 14:45:59 Kishon Vijay Abraham I wrote:
> >> This series is basically to deprecate using phy-omap-control and use
> >> syscon
On Wed, Dec 09, 2015 at 09:57:15AM +, Suzuki K. Poulose wrote:
> A secondary CPU could fail to come online due to insufficient
> capabilities and could simply die or loop in the kernel.
> e.g, a CPU with no support for the selected kernel PAGE_SIZE
> loops in kernel with MMU turned off.
> or a
On Tue, Dec 15, 2015 at 02:41:21PM +0800, yalin wang wrote:
> > On Dec 15, 2015, at 05:11, Kirill A. Shutemov wrote:
> > Anyway, I don't think it's possible to gain anything measurable from this
> > optimization.
> >
> the advantage is that if addr don’t belong to any vma, we don’t need loop all
On Tue, Dec 15, 2015 at 7:05 PM, Andre Przywara wrote:
> Hi,
>
> I've been experiencing issues with at least 4.4-rc3 (including current
I'd suggest you to test the latest linus tree first, and at least two
fix patches
have been merged for blk-merge issue. If there is still the issue
with linus
Hello.
On 12/15/2015 2:28 PM, Geert Uytterhoeven wrote:
"So
what" and "I'd like to keep my spacing as is" aren't valid reasons.
Fix it, then I'll look at the rest again.
I'll consider doing that if you care to explain what's the problem
with
my spacing. TIA.
You are mixing 2 and 1
On Tue, Dec 15, 2015 at 02:41:21PM +0800, yalin wang wrote:
>
> > On Dec 15, 2015, at 05:11, Kirill A. Shutemov wrote:
> >
> > On Mon, Dec 14, 2015 at 06:55:09PM +0100, Oleg Nesterov wrote:
> >> On 12/14, Kirill A. Shutemov wrote:
> >>>
> >>> On Mon, Dec 14, 2015 at 07:02:25PM +0800, yalin
On 12/15/2015 11:38 AM, Sekhar Nori wrote:
> Hi Peter,
>
> On Friday 04 December 2015 07:23 PM, Peter Ujfalusi wrote:
>> Switch to use the ti,edma3-tpcc and ti,edma3-tptc binding for the eDMA3.
>> With the new bindings boards can customize and tweak the DMA channel
>> priority to match their
On Mon, Dec 14, 2015 at 06:43:15PM +0100, SF Markus Elfring wrote:
> Our software development dialogue seems to trigger special
> challenges between us so far.
I try very hard to review patches mechanically and not be biased so that
after a while people know if their patches will be merged or not
On Thu, Dec 10, 2015 at 04:14:44PM -0800, Tony Luck wrote:
> Extend the severity checking code to add a new context IN_KERN_RECOV
> which is used to indicate that the machine check was triggered by code
> in the kernel with a fixup entry.
>
> Add code to check for this situation and respond by
> -Original Message-
> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
> Sent: Tuesday, December 15, 2015 4:49 PM
> To: Bhushan Bharat-R65777 ;
> kvm...@lists.cs.columbia.edu; k...@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re:
On 2015/12/15 08:51AM, Wang Nan wrote:
> From: "Naveen N. Rao"
>
> perf build is currently (v4.4-rc5) broken on powerpc:
>
> bpf.c:28:4: error: #error __NR_bpf not defined. libbpf does not support
> your arch.
> # error __NR_bpf not defined. libbpf does not support your arch.
> ^
>
> Fix
On 09/12/15 09:57, Suzuki K. Poulose wrote:
A secondary CPU could fail to come online due to insufficient
capabilities and could simply die or loop in the kernel.
e.g, a CPU with no support for the selected kernel PAGE_SIZE
loops in kernel with MMU turned off.
or a hotplugged CPU which doesn't
On 15 December 2015 at 16:20, Milan Broz wrote:
> On 12/15/2015 03:56 AM, Baolin Wang wrote:
+ /*
+ * Here we need to check if it can be encrypted or decrypted with
+ * bulk block, which means these encryption modes don't need IV or
+ * just need one initial
On Tue, 2015-12-08 at 15:33 +0100, Peter Wu wrote:
> Can you have a look? I guess that reset_resume needs different
> treatment, but don't know how to do it properly as suspend is not
> called
> before system reset (because the device is apparently already in
> suspended state).
>
> I think that
On 2015/12/15 03:35AM, Wang Nan wrote:
> Hi Naveen,
>
>Now I know your problem is in native building and the reason is
> missing proper $(ARCH). I think other than that there's another problem
> in libbpf's building: if your problem is unable to compile libbpf,
> feature checker should find
Hi Sergei,
On Tue, Dec 15, 2015 at 12:24 PM, Sergei Shtylyov
wrote:
"So
what" and "I'd like to keep my spacing as is" aren't valid reasons.
Fix it, then I'll look at the rest again.
>>>
>>>
>>> I'll consider doing that if you care to explain what's the problem
>>> with
>>> my
On Mon, 2015-02-11 at 01:30:32 UTC, Boqun Feng wrote:
> According to memory-barriers.txt, xchg*, cmpxchg* and their atomic_
> versions all need to be fully ordered, however they are now just
> RELEASE+ACQUIRE, which are not fully ordered.
>
> So also replace PPC_RELEASE_BARRIER and
On Mon, 2015-02-11 at 01:30:31 UTC, Boqun Feng wrote:
> According to memory-barriers.txt:
>
> > Any atomic operation that modifies some state in memory and returns
> > information about the state (old or new) implies an SMP-conditional
> > general memory barrier (smp_mb()) on each side of the
On Tue, Dec 15, 2015 at 11:23:39AM +, Will Deacon wrote:
> > +/*
> > + * Kill the calling secondary CPU, early in bringup before it is turned
> > + * online.
> > + */
> > +void cpu_die_early(void)
> > +{
> > + int cpu = smp_processor_id();
> > +
> > + pr_crit("CPU%d: will not boot\n",
Hello.
On 12/15/2015 2:44 AM, Greg KH wrote:
Maxim Integrated MAX3355E chip integrates a charge pump and comparators
to
enable a system with an integrated USB OTG dual-role transceiver to
function
as an USB OTG dual-role device. In addition to sensing/controlling
Vbus,
the chip also
On Wed, Dec 09, 2015 at 09:57:13AM +, Suzuki K. Poulose wrote:
> This patch moves cpu_die_early to smp.c, where it fits better.
> No functional changes, except for adding the necessary checks
> for CONFIG_HOTPLUG_CPU.
>
> Cc: Will Deacon
> Cc: Mark Rutland
> Cc: Catalin Marinas
>
kmalloc() is often a bit time-consuming, also
one atomic counter has to be used to track the total
allocated elements, which is also not good.
This patch pre-allocates element pool in htab_map_alloc(),
then use percpu_ida to allocate one slot from the pool,
then the runtime allocation/freeing
Lifetime for hash fields and liftime for kfree_rcu fields
can't be overlapped, so re-organizing them for better
readabilty.
Also one sizeof(void *) should be saved with this change,
and cache footprint can got improved too.
Signed-off-by: Ming Lei
---
kernel/bpf/hashtab.c | 19
hlist_head is often used for implementing bucket header of
hash table, and one lock is often needed for adding/deleting
node in the bucket list. It can consume lots of memory if
per-bucket spinlock is used, so this patch trys to use the 1st
bit of hlist_head->first as bit lock for this purpose.
Both htab_map_update_elem() and htab_map_delete_elem() can be
called from eBPF program, and they may be in kernel hot path,
so it isn't efficient to use a per-hashtable lock in this two
helpers.
The per-hashtable spinlock is used just for protecting bucket's
hlist, and per-bucket lock should be
The spinlock is just used for protecting the per-bucket
hlist, so it isn't needed for selecting bucket.
Signed-off-by: Ming Lei
---
kernel/bpf/hashtab.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/kernel/bpf/hashtab.c b/kernel/bpf/hashtab.c
index 2615388..d857fcb
Preparing for removing global per-hashtable lock, so
the counter need to be defined as aotmic_t first.
Signed-off-by: Ming Lei
---
kernel/bpf/hashtab.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/kernel/bpf/hashtab.c b/kernel/bpf/hashtab.c
index
Hi,
This patchset tries to optimize ebpf hash map, and follows
the ideas:
1) Both htab_map_update_elem() and htab_map_delete_elem()
can be called from eBPF program, and they may be in kernel
hot path, so it isn't efficient to use a per-hashtable lock
in this two helpers, so this patch converts
On 15/12/15 10:57, Bhushan Bharat wrote:
>
>
>> -Original Message-
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Tuesday, December 15, 2015 3:50 PM
>> To: Bhushan Bharat-R65777 ;
>> kvm...@lists.cs.columbia.edu; k...@vger.kernel.org; linux-arm-
>>
On Tuesday 15 December 2015 01:50:19 Aya Mahfouz wrote:
> Constifies tty_port_operations structure in
> the char driver since it is not modified
> after its initialization.
>
> Detected and found using Coccinelle.
>
> Suggested-by: Julia Lawall
> Signed-off-by: Aya Mahfouz
>
Acked-by: Arnd
From: Dan Carpenter
The "domain" variable needs to be signed for the error handling to work.
Fixes: 8def31034d03 ('cpufreq: arm_big_little: add SCPI interface driver')
Signed-off-by: Dan Carpenter
Acked-by: Viresh Kumar
Acked-by: Sudeep Holla
---
drivers/cpufreq/scpi-cpufreq.c | 2 +-
1
On Tue, Dec 15, 2015 at 6:52 AM, Shawn Guo wrote:
> On Mon, Dec 14, 2015 at 11:07:50AM +0800, Shawn Guo wrote:
>> On Wed, Dec 09, 2015 at 04:15:55PM +0800, Bai Ping wrote:
>> > The 'assigned-clock-parents' and 'assigned-clock-rates' list
>> > should corresponding to the 'assigned-clocks' property
Hi Arnd,
On Tuesday 15 December 2015 04:26 PM, Arnd Bergmann wrote:
> On Tuesday 15 December 2015 14:45:59 Kishon Vijay Abraham I wrote:
>> This series is basically to deprecate using phy-omap-control and use
>> syscon APIs to program the control module registers.
>>
>> Changes from v2:
>> No
Em Thu, 10 Sep 2015 20:14:04 +0300
Sakari Ailus escreveu:
> Hi Javier,
>
> Thanks for the set! A few comments below.
>
> Javier Martinez Canillas wrote:
> > The media device node is registered and so made visible to user-space
> > before entities are registered and links created which means
An updated version of the richacl patches rebased on top of the recent
xattr cleanups (Al's work.xattr branch) is available here:
git://git.kernel.org/pub/scm/linux/kernel/git/agruen/linux-richacl.git \
richacl-2015-12-15
Thanks,
Andreas
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On Tue, 15 Dec 2015 10:26:47 +
Srinivas Kandagatla wrote:
...
> Anatolij, Do you see any issues if we totally move this driver to nvmem
> framework? Which involves relocating and renameing the old eeprom file
> to /sys/bus/nvmem/devices/*/nvmem
I don't know how many driver users are there
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