On Thu, Apr 07, 2016 at 08:55:54AM -0400, Boris Ostrovsky wrote:
> On 04/06/2016 08:06 PM, Luis R. Rodriguez wrote:
> >We have 4 types of x86 platforms that disable RTC:
> >
> > * Intel MID
> > * Lguest - uses paravirt
> > * Xen dom-U - uses paravirt
> > * x86 on legacy systems annotated
It was in detect_nopl, which was either a mistake by me or some kind
of mis-merge.
Fixes: ff236456f072 ("x86/cpu: Move X86_BUG_ESPFIX initialization to
generic_identify")
Signed-off-by: Andy Lutomirski
---
arch/x86/kernel/cpu/common.c | 50
This catches two distinct bugs in the current code. I'll fix them.
Signed-off-by: Andy Lutomirski
---
tools/testing/selftests/x86/Makefile | 1 +
tools/testing/selftests/x86/fsgsbase.c | 398 +
2 files changed, 399 insertions(+)
create mode 100644
On Thu, Apr 07, 2016 at 08:55:54AM -0400, Boris Ostrovsky wrote:
> On 04/06/2016 08:06 PM, Luis R. Rodriguez wrote:
> >We have 4 types of x86 platforms that disable RTC:
> >
> > * Intel MID
> > * Lguest - uses paravirt
> > * Xen dom-U - uses paravirt
> > * x86 on legacy systems annotated
It was in detect_nopl, which was either a mistake by me or some kind
of mis-merge.
Fixes: ff236456f072 ("x86/cpu: Move X86_BUG_ESPFIX initialization to
generic_identify")
Signed-off-by: Andy Lutomirski
---
arch/x86/kernel/cpu/common.c | 50 ++--
1 file
From: Borislav Petkov
... so that it doesn't appear in objdump output.
Signed-off-by: Borislav Petkov
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/entry_64.S | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/entry/entry_64.S
Allowing user code to map the HPET is problematic. HPET
implementations are notoriously buggy, and there are probably many
machines on which even MMIO reads from bogus HPET addresses are
problematic.
We have a report that the Dell Precision M2800 with:
ACPI: HPET 0xC8FE6238 38 (v01
If any bridge up to root only have 32bit pref mmio, We don't need to
treat device non-pref mmio64 as as pref mmio64.
We need to move pci_bridge_check_ranges calling early.
For parent bridges pref mmio BAR may not allocated by BIOS, res flags
is still 0, we need to have it correct set before we
Hi all-
This whole mess is intended for x86/urgent. It fixes several bugs.
It's probably a tiny performance regression on some workloads on
Intel CPUs. It's probably varies between a less tiny regression and
a small speedup on newer AMD CPUs. It's a bigger regression on AMD
K8.
The AMD code
For device resource with PREF bit setting under bridge 64-bit pref resource,
we need to make sure only set PREF for 64bit resource.
so this patch set IORESOUCE_MEM_64 for 64bit resource during OF device resource
flags parsing.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96261
Link:
Meelis reported that qla2000 driver does not get loaded on one sparc system.
schizo f00732d0: PCI host bridge to bus 0001:00
pci_bus 0001:00: root bus resource [io 0x7fe0100-0x7fe01ff] (bus
address [0x-0xff])
pci 0001:00:06.0: quirk: [io 0x7fe01000800-0x7fe0100083f] claimed by
Allowing user code to map the HPET is problematic. HPET
implementations are notoriously buggy, and there are probably many
machines on which even MMIO reads from bogus HPET addresses are
problematic.
We have a report that the Dell Precision M2800 with:
ACPI: HPET 0xC8FE6238 38 (v01
If any bridge up to root only have 32bit pref mmio, We don't need to
treat device non-pref mmio64 as as pref mmio64.
We need to move pci_bridge_check_ranges calling early.
For parent bridges pref mmio BAR may not allocated by BIOS, res flags
is still 0, we need to have it correct set before we
Hi all-
This whole mess is intended for x86/urgent. It fixes several bugs.
It's probably a tiny performance regression on some workloads on
Intel CPUs. It's probably varies between a less tiny regression and
a small speedup on newer AMD CPUs. It's a bigger regression on AMD
K8.
The AMD code
For device resource with PREF bit setting under bridge 64-bit pref resource,
we need to make sure only set PREF for 64bit resource.
so this patch set IORESOUCE_MEM_64 for 64bit resource during OF device resource
flags parsing.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96261
Link:
Meelis reported that qla2000 driver does not get loaded on one sparc system.
schizo f00732d0: PCI host bridge to bus 0001:00
pci_bus 0001:00: root bus resource [io 0x7fe0100-0x7fe01ff] (bus
address [0x-0xff])
pci 0001:00:06.0: quirk: [io 0x7fe01000800-0x7fe0100083f] claimed by
During bus mmio resource sizing stage, current code try to get alignment as
small as possible and use that to align size to get final size. But it does
not handle resource that size is bigger than alignment in optimal way, kernel
only use max alignment for them.
For example:
When we have
Now get_res_add_size() and get_res_add_align() all have same printout
from res_to_dev_res(), and it is confusing.
Move out debug messages printout from res_to_dev_res(),
so later we will reuse res_to_dev_res() in other functions.
-v2: does not print out when add_size or min_align is 0
-v3:
During bus mmio resource sizing stage, current code try to get alignment as
small as possible and use that to align size to get final size. But it does
not handle resource that size is bigger than alignment in optimal way, kernel
only use max alignment for them.
For example:
When we have
Now get_res_add_size() and get_res_add_align() all have same printout
from res_to_dev_res(), and it is confusing.
Move out debug messages printout from res_to_dev_res(),
so later we will reuse res_to_dev_res() in other functions.
-v2: does not print out when add_size or min_align is 0
-v3:
LSI HBA firmware stop responding pci read from host if pci core ever change
pci device BAR values.
Set their resources to FIXED, so let realloc to skip them.
v2: check if start is 0.
Reported-by: Paul Johnson
Suggested-by: Bjorn Helgaas
Bugzilla:
Current add_align always use max align, that make required+optional
to get allocated more than needed in some cases.
Now we have new calculate_mem_align(), so we could use it for
add_align calculation.
Need to create separated list for required+optional align/size info.
After that we can get
On hotplug path, we can not touch sibling bridges that is outside
of the slot.
That could happen when BIOS does not assign some bridge BARs and
later kernel can not assign resource to them in first try.
Check if fail dev is the parent bridge, then just use subordinate
bus instead use parent bus.
Current add_align always use max align, that make required+optional
to get allocated more than needed in some cases.
Now we have new calculate_mem_align(), so we could use it for
add_align calculation.
Need to create separated list for required+optional align/size info.
After that we can get
On hotplug path, we can not touch sibling bridges that is outside
of the slot.
That could happen when BIOS does not assign some bridge BARs and
later kernel can not assign resource to them in first try.
Check if fail dev is the parent bridge, then just use subordinate
bus instead use parent bus.
LSI HBA firmware stop responding pci read from host if pci core ever change
pci device BAR values.
Set their resources to FIXED, so let realloc to skip them.
v2: check if start is 0.
Reported-by: Paul Johnson
Suggested-by: Bjorn Helgaas
Bugzilla:
We want to keep resource flags instead of clearing it after resource
allocation fails.
Make flags take IORESOURCE_UNSET | IORESOURCE_DISABLED instead.
-v2: add missing UNSET for _alt retore to required path.
Suggested-by: Bjorn Helgaas
Signed-off-by: Yinghai Lu
We check the realloc list, as list must be empty after allocation.
Separate the realloc list checking to another function.
Add checking that is missed in acpiphp driver.
-v2: change from BUG_ON to WARN_ON according to Rafael.
Signed-off-by: Yinghai Lu
Cc: "Rafael J.
We still get "no compatible bridge window" warning on sparc T5-8
after we add support for 64bit resource parsing for root bus.
PCI: scan_bus[/pci@300/pci@1/pci@0/pci@6] bus no 8
PCI: Claiming :00:01.0: Resource 15: 8001..8004afff
[220c]
PCI: Claiming :01:00.0:
We try to assign required+optional at first, and we only accept the result
if all resources get allocated. Otherwise will release assigned in the
list, and try to assign required and expand to optional.
We have to do that to make sure any required has priority over any optional.
When that
Hi Bjorn,
After 5b28541552ef (PCI: Restrict 64-bit prefetchable bridge windows
to 64-bit resources), we have several reports on resource allocation
failure, and we try to fix the problem with resource clip, and find
more problems.
One is realloc fail with two graphics cards above 4G.
One is from
Now sort_resources() and pdev_sort_resources() all have sorting
code.
As we are going to call sort_resources() several places later for
alt_size support, so choose to remove related code in
pdev_sort_resources().
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 22
We still get "no compatible bridge window" warning on sparc T5-8
after we add support for 64bit resource parsing for root bus.
PCI: scan_bus[/pci@300/pci@1/pci@0/pci@6] bus no 8
PCI: Claiming :00:01.0: Resource 15: 8001..8004afff
[220c]
PCI: Claiming :01:00.0:
We try to assign required+optional at first, and we only accept the result
if all resources get allocated. Otherwise will release assigned in the
list, and try to assign required and expand to optional.
We have to do that to make sure any required has priority over any optional.
When that
Hi Bjorn,
After 5b28541552ef (PCI: Restrict 64-bit prefetchable bridge windows
to 64-bit resources), we have several reports on resource allocation
failure, and we try to fix the problem with resource clip, and find
more problems.
One is realloc fail with two graphics cards above 4G.
One is from
Now sort_resources() and pdev_sort_resources() all have sorting
code.
As we are going to call sort_resources() several places later for
alt_size support, so choose to remove related code in
pdev_sort_resources().
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 22 +++---
We want to keep resource flags instead of clearing it after resource
allocation fails.
Make flags take IORESOURCE_UNSET | IORESOURCE_DISABLED instead.
-v2: add missing UNSET for _alt retore to required path.
Suggested-by: Bjorn Helgaas
Signed-off-by: Yinghai Lu
---
drivers/pci/bus.c |
We check the realloc list, as list must be empty after allocation.
Separate the realloc list checking to another function.
Add checking that is missed in acpiphp driver.
-v2: change from BUG_ON to WARN_ON according to Rafael.
Signed-off-by: Yinghai Lu
Cc: "Rafael J. Wysocki"
Cc: Len Brown
Current on realloc path, we just ignore ROM resource if we can not assign
them in first try.
Treat ROM resources as optional resources,so try to allocate them together
with required ones, if can not assign them, could go with other required
resources only, and try to allocate them second time in
When we have two bridges under parent bridge, and each child
bridge has alt_size, we need to increase parent alt_size to make
sure it could fit all alt entries.
In the patch, we first select one big size, and then keep reducing
the size and retrying to get the minimum value for alt_size.
For
When we have two bridges under parent bridge, and each child
bridge has alt_size, we need to increase parent alt_size to make
sure it could fit all alt entries.
In the patch, we first select one big size, and then keep reducing
the size and retrying to get the minimum value for alt_size.
For
Current on realloc path, we just ignore ROM resource if we can not assign
them in first try.
Treat ROM resources as optional resources,so try to allocate them together
with required ones, if can not assign them, could go with other required
resources only, and try to allocate them second time in
On booting path, we don't pass realloc at first, and treat all optional
just as required, in some case we can have smaller size/align with optional
than required only.
04:00.0 has children bridges: 05:03.0, 05:04.0
pref layout after booting path like followings:
pci :04:00.0: BAR 9:
Current code will always add 2M for hotplug bridge MMIO even
there is child device under it already.
For example:
40:03.0 --- 43:00.0 --- 44:02.0 -+- 45:00.0
\- 45:00.1
44:02.0 will need 1M as must for 45:00.0 and 45:00.1
When we calculate
I can't see any reason that we need the __KERNEL_DS segment at all --
I think that everything that uses __KERNEL_DS could use __USER_DS
instead. Am I missing anything? This has been bugging me for a
while.
I mulled over this a bit when trying to understand the sysret_ss_attrs
bug and then
pdev_sort_resources() etc was checking devices resources and putting
resources that need to assign to one list in sorted order.
Now we don't do sorting in those functions anymore, so change to
pdev_assign_resources_prepare() instead.
Signed-off-by: Yinghai Lu
---
On booting path, we don't pass realloc at first, and treat all optional
just as required, in some case we can have smaller size/align with optional
than required only.
04:00.0 has children bridges: 05:03.0, 05:04.0
pref layout after booting path like followings:
pci :04:00.0: BAR 9:
Current code will always add 2M for hotplug bridge MMIO even
there is child device under it already.
For example:
40:03.0 --- 43:00.0 --- 44:02.0 -+- 45:00.0
\- 45:00.1
44:02.0 will need 1M as must for 45:00.0 and 45:00.1
When we calculate
I can't see any reason that we need the __KERNEL_DS segment at all --
I think that everything that uses __KERNEL_DS could use __USER_DS
instead. Am I missing anything? This has been bugging me for a
while.
I mulled over this a bit when trying to understand the sysret_ss_attrs
bug and then
pdev_sort_resources() etc was checking devices resources and putting
resources that need to assign to one list in sorted order.
Now we don't do sorting in those functions anymore, so change to
pdev_assign_resources_prepare() instead.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 12
In following alt_size support, we will call pci_assign_resource() several
times on one resource list, and some resources could have been assigned
already.
Skip allocated resource in the list, as pci_assign_resource()
only can handle not assigned resource.
Signed-off-by: Yinghai Lu
For alt_size support, we will add more entries to realloc list.
Add new __add_to_list() to take alt_size, alt_align.
And simplify add_to_list() not to take add/alt input.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 51
There are several calling to window_alignment(), and we will have more
for alt_size support, cache the value instead of keeping on getting it.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
In following alt_size support, we will call pci_assign_resource() several
times on one resource list, and some resources could have been assigned
already.
Skip allocated resource in the list, as pci_assign_resource()
only can handle not assigned resource.
Signed-off-by: Yinghai Lu
---
For alt_size support, we will add more entries to realloc list.
Add new __add_to_list() to take alt_size, alt_align.
And simplify add_to_list() not to take add/alt input.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 51 ++---
1 file
There are several calling to window_alignment(), and we will have more
for alt_size support, cache the value instead of keeping on getting it.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
__assign_resources_sorted() is getting too big if we put alt_size support
into it. Split out required+optional assigning code to another function.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 47 +++
1 file changed, 27
During sorting before assign, we only put resource with non-zero align
in the sorted list, so for optional resources that required size is 0 and
only have optional parts, we need to have correct align.
While treating SRIOV as optional resources, we always read alignment for
SRIOV bars every time,
On 04/07/2016 01:37 PM, Andy Shevchenko wrote:
> Some UARTs, e.g. one is used in Intel Quark, have a different address base for
> DMA operations. Introduce an additional field in struct uart_8250_dma to cover
> those cases.
>
> Signed-off-by: Andy Shevchenko
>
Current code just allocate from first avail window.
We can find all suitable empty slots and pick one with smallest size, so
we could save the big slot for needed ones later when we have several pci
bridges under parent bridge and some bridges get assigned from bios and we
need to assign others
__assign_resources_sorted() is getting too big if we put alt_size support
into it. Split out required+optional assigning code to another function.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 47 +++
1 file changed, 27 insertions(+), 20
During sorting before assign, we only put resource with non-zero align
in the sorted list, so for optional resources that required size is 0 and
only have optional parts, we need to have correct align.
While treating SRIOV as optional resources, we always read alignment for
SRIOV bars every time,
On 04/07/2016 01:37 PM, Andy Shevchenko wrote:
> Some UARTs, e.g. one is used in Intel Quark, have a different address base for
> DMA operations. Introduce an additional field in struct uart_8250_dma to cover
> those cases.
>
> Signed-off-by: Andy Shevchenko
> ---
>
Current code just allocate from first avail window.
We can find all suitable empty slots and pick one with smallest size, so
we could save the big slot for needed ones later when we have several pci
bridges under parent bridge and some bridges get assigned from bios and we
need to assign others
If the bridge does not support hotplug and has no child with sriov support,
We will not have optional resources. We could get out early and
don't try required+optional allocation.
Also in the loop that update res with optional add info, skip resource
that add_size is 0.
Signed-off-by: Yinghai Lu
Now some BIOS tend to allocate pref MMIO under non-pref MMIO, or allocate
64bit pref MMIO under 4G.
Add pci=assign_pref_bars to clear and allocate resource to pref BARS.
So could reallocate pref mmio64 above 4G and pref under bridges pref BARs.
Signed-off-by: Yinghai Lu
---
If the bridge does not support hotplug and has no child with sriov support,
We will not have optional resources. We could get out early and
don't try required+optional allocation.
Also in the loop that update res with optional add info, skip resource
that add_size is 0.
Signed-off-by: Yinghai Lu
Now some BIOS tend to allocate pref MMIO under non-pref MMIO, or allocate
64bit pref MMIO under 4G.
Add pci=assign_pref_bars to clear and allocate resource to pref BARS.
So could reallocate pref mmio64 above 4G and pref under bridges pref BARs.
Signed-off-by: Yinghai Lu
---
Now res_to_dev_res() does not print out debug message anymore, so
we can reuse it in reassign_resource_sorted() without confusing printout.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git
From: Bjorn Helgaas
The alpha pci_mmap_resource() is used for both IORESOURCE_MEM and
IORESOURCE_IO resources, but iomem_is_exclusive() is only applicable for
IORESOURCE_MEM.
Call iomem_is_exclusive() only for IORESOURCE_MEM resources, and do it
earlier to match the generic
Current is using !flags, and we are going to use
IORESOURCE_DISABLED instead of clearing resource flags.
Let's convert all !flags to helper function resource_disabled().
resource_disabled will check !flags and IORESOURCE_DISABLED both.
Cc: linux-al...@vger.kernel.org
Cc:
Now res_to_dev_res() does not print out debug message anymore, so
we can reuse it in reassign_resource_sorted() without confusing printout.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git
From: Bjorn Helgaas
The alpha pci_mmap_resource() is used for both IORESOURCE_MEM and
IORESOURCE_IO resources, but iomem_is_exclusive() is only applicable for
IORESOURCE_MEM.
Call iomem_is_exclusive() only for IORESOURCE_MEM resources, and do it
earlier to match the generic version of
Current is using !flags, and we are going to use
IORESOURCE_DISABLED instead of clearing resource flags.
Let's convert all !flags to helper function resource_disabled().
resource_disabled will check !flags and IORESOURCE_DISABLED both.
Cc: linux-al...@vger.kernel.org
Cc:
We need to move ISA io port align out of calculate_iosize(),
so we could unify calculate_iosize and calculate_memsize later.
That extra aligning or offset is to work around ISA devices:
When one bridge have several children devices, and every device
has several io port resources and resource size
Put all print out for all children align/size and result align/size
together.
We can print out device name at same time with min_align/alt_size
calculation.
So we can shut off debug print out from get_res_add_size() and
get_res_add_align().
Signed-off-by: Yinghai Lu
---
We need to move ISA io port align out of calculate_iosize(),
so we could unify calculate_iosize and calculate_memsize later.
That extra aligning or offset is to work around ISA devices:
When one bridge have several children devices, and every device
has several io port resources and resource size
Put all print out for all children align/size and result align/size
together.
We can print out device name at same time with min_align/alt_size
calculation.
So we can shut off debug print out from get_res_add_size() and
get_res_add_align().
Signed-off-by: Yinghai Lu
---
We should not release bridge resource if there is fixed resources
under it, otherwise the children firmware would stop working.
Reported-by: Paul Johnson
Suggested-by: Bjorn Helgaas
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=92351
Signed-off-by:
Current realloc path would not shrink bridge resource through
pbus_size_mem() checking with the old size.
That cause problem: when "required+optional" resource allocation fails,
the cached bridge resource size will prevent "required" resource to get
allocated smaller resource.
Clear the old
Now we add too much for hotplug bridge io port.
For example, when hotplug bridge has two children bridges,
every child bridge will need 0x1000, so size1 will be 0x2000
and size is 0. The min_size for the hotplug bridge is 0x100.
with old version calculate_iosize, we get 0x3000 for final
size as we
On Fri, Mar 25, 2016 at 8:58 AM, Dave Jones wrote:
> On Fri, Mar 25, 2016 at 08:51:39AM -0700, Andy Lutomirski wrote:
> > On Fri, Mar 25, 2016 at 8:48 AM, Dave Jones
> wrote:
> > > I had a trinity process get stuck last overnight.
> > > The
We should not release bridge resource if there is fixed resources
under it, otherwise the children firmware would stop working.
Reported-by: Paul Johnson
Suggested-by: Bjorn Helgaas
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=92351
Signed-off-by: Yinghai Lu
Cc: sta...@vger.kernel.org
Current realloc path would not shrink bridge resource through
pbus_size_mem() checking with the old size.
That cause problem: when "required+optional" resource allocation fails,
the cached bridge resource size will prevent "required" resource to get
allocated smaller resource.
Clear the old
Now we add too much for hotplug bridge io port.
For example, when hotplug bridge has two children bridges,
every child bridge will need 0x1000, so size1 will be 0x2000
and size is 0. The min_size for the hotplug bridge is 0x100.
with old version calculate_iosize, we get 0x3000 for final
size as we
On Fri, Mar 25, 2016 at 8:58 AM, Dave Jones wrote:
> On Fri, Mar 25, 2016 at 08:51:39AM -0700, Andy Lutomirski wrote:
> > On Fri, Mar 25, 2016 at 8:48 AM, Dave Jones
> wrote:
> > > I had a trinity process get stuck last overnight.
> > > The reason for it getting stuck is my bug (I think),
We need to save/restore resources several times for alt_size support,
separate the save_resources()/resources() to save some lines later.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 49 ++---
1 file changed, 30
On Fri, Apr 8, 2016 at 7:29 AM, Eric Wheeler wrote:
> On Thu, 7 Apr 2016, Ming Lei wrote:
>
>> On Thu, Apr 7, 2016 at 9:56 AM, Eric Wheeler
>> wrote:
>> > On Thu, 7 Apr 2016, Ming Lei wrote:
>> >
>> >> On Thu, Apr 7, 2016 at 9:36 AM, Eric
We need to save/restore resources several times for alt_size support,
separate the save_resources()/resources() to save some lines later.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 49 ++---
1 file changed, 30 insertions(+), 19
On Fri, Apr 8, 2016 at 7:29 AM, Eric Wheeler wrote:
> On Thu, 7 Apr 2016, Ming Lei wrote:
>
>> On Thu, Apr 7, 2016 at 9:56 AM, Eric Wheeler
>> wrote:
>> > On Thu, 7 Apr 2016, Ming Lei wrote:
>> >
>> >> On Thu, Apr 7, 2016 at 9:36 AM, Eric Wheeler
>> >> wrote:
>> >> > On Wed, 6 Apr 2016, Ming
During driver loading kernel checks if resources get reserved.
so we need to make sure resources get reserved before pci_bus_add().
On remove/rescan path, we will leave those fixed resource
not reserved. In that path, We don't call pcibios_resource_survery()
before
Same as sparc version.
Make resource with consistent sequence
like other arch or directly from pci_read_bridge_bases(),
even when non-pref mmio is missing, or out of ordering in firmware reporting.
Just hold i = 1 for non pref mmio, and i = 2 for pref mmio.
Signed-off-by: Yinghai Lu
There are powerpc generic version and x86 local version for
skip_ioresource_align().
Move the powerpc version to setup-bus.c, and kill x86 local version.
Also kill dummy version in microblaze.
Cc: Michal Simek
Cc: Paul Mackerras
Cc: Michael Ellerman
There are powerpc generic version and x86 local version for
skip_ioresource_align().
Move the powerpc version to setup-bus.c, and kill x86 local version.
Also kill dummy version in microblaze.
Cc: Michal Simek
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: Arnd Bergmann
Cc:
During driver loading kernel checks if resources get reserved.
so we need to make sure resources get reserved before pci_bus_add().
On remove/rescan path, we will leave those fixed resource
not reserved. In that path, We don't call pcibios_resource_survery()
before
Same as sparc version.
Make resource with consistent sequence
like other arch or directly from pci_read_bridge_bases(),
even when non-pref mmio is missing, or out of ordering in firmware reporting.
Just hold i = 1 for non pref mmio, and i = 2 for pref mmio.
Signed-off-by: Yinghai Lu
---
Move comment from caller to pci_need_to_release(), as we will have one new
caller for alt_size support.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 27 +++
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git
There are couples of dev_res->res reference, to make code more readable
use res instead of dev_res->res directly.
Signed-off-by: Yinghai Lu
---
drivers/pci/setup-bus.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git
When there is no child device under the non hotplug bridge,
We can use 0 for required size, and do not use old size as required size.
That will save some io port range for other bridges, as BIOS could do
some partial assign, and we want to use those not used io port range.
When there is child
Current code just use aligned start from avialable window, that could waste
big alignment from start.
We can align to the end from avialable window, so will save
start with big align to others: like second try for pref mmio
after first try already have non-pref assigned.
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