> Commit c896939f7cff ("KVM: use heuristic for fast VCPU lookup by id") added
> a return path that prevents vcpu ids to exceed KVM_MAX_VCPUS. This is a
> problem for powerpc where vcpu ids can grow up to 8*KVM_MAX_VCPUS.
>
> This patch simply reverses the logic so that we only try fast path if
> Commit c896939f7cff ("KVM: use heuristic for fast VCPU lookup by id") added
> a return path that prevents vcpu ids to exceed KVM_MAX_VCPUS. This is a
> problem for powerpc where vcpu ids can grow up to 8*KVM_MAX_VCPUS.
>
> This patch simply reverses the logic so that we only try fast path if
On 04/21/2016 08:56 AM, Willy Tarreau wrote:
> On Wed, Apr 20, 2016 at 03:50:34PM -0400, Sasha Levin wrote:
>> Hi all,
>>
>> Updates for stable-security kernels have been released:
>>
>> - v3.12.58-security
>> - v3.14.67-security
>> - v3.18.31-security
>> - v4.1.22-security
>>
On 04/21/2016 08:56 AM, Willy Tarreau wrote:
> On Wed, Apr 20, 2016 at 03:50:34PM -0400, Sasha Levin wrote:
>> Hi all,
>>
>> Updates for stable-security kernels have been released:
>>
>> - v3.12.58-security
>> - v3.14.67-security
>> - v3.18.31-security
>> - v4.1.22-security
>>
On 04/21/2016, 03:54 PM, Sasha Levin wrote:
> On 04/21/2016 08:39 AM, Greg KH wrote:
>> On Thu, Apr 21, 2016 at 02:05:41PM +0200, Jiri Slaby wrote:
On 04/21/2016, 01:59 PM, Jiri Slaby wrote:
(CVE-2016-2085) 613317b EVM: Use crypto_memneq() for digest comparisons
>>
>> Does
On 04/21/2016, 03:54 PM, Sasha Levin wrote:
> On 04/21/2016 08:39 AM, Greg KH wrote:
>> On Thu, Apr 21, 2016 at 02:05:41PM +0200, Jiri Slaby wrote:
On 04/21/2016, 01:59 PM, Jiri Slaby wrote:
(CVE-2016-2085) 613317b EVM: Use crypto_memneq() for digest comparisons
>>
>> Does
On Thu, 21 Apr 2016 16:02:55 +0200
Peter Zijlstra wrote:
> Acked-by: Peter Zijlstra (Intel)
>
> David, please take through the net tree as this depends on prior patches
> by Alexei that are already in your tree.
Yes please!
Acked-by: Steven
On Thu, 21 Apr 2016 16:02:55 +0200
Peter Zijlstra wrote:
> Acked-by: Peter Zijlstra (Intel)
>
> David, please take through the net tree as this depends on prior patches
> by Alexei that are already in your tree.
Yes please!
Acked-by: Steven Rostedt
-- Steve
On Thu, Apr 21, 2016 at 10:01:29AM -0400, Sasha Levin wrote:
> > What are you "stop-gapping" then? The 7-10 days between stable
> > releases?
>
> In a perfect world where everyone has a team of kernel hackers on hand
> reviewing stable commits, verifying the resulting kernel doesn't regress
>
On Thu, Apr 21, 2016 at 10:01:29AM -0400, Sasha Levin wrote:
> > What are you "stop-gapping" then? The 7-10 days between stable
> > releases?
>
> In a perfect world where everyone has a team of kernel hackers on hand
> reviewing stable commits, verifying the resulting kernel doesn't regress
>
On Wed, Apr 20, 2016 at 11:43:54PM +0200, Wolfram Sang wrote:
> On Mon, Apr 11, 2016 at 05:28:39PM +0200, Jan Glauber wrote:
> > From: David Daney
> >
> > Use High-Level Controller (HLC) when possible. The HLC can read/write
> > up to 8 bytes and is completely
On Wed, Apr 20, 2016 at 11:43:54PM +0200, Wolfram Sang wrote:
> On Mon, Apr 11, 2016 at 05:28:39PM +0200, Jan Glauber wrote:
> > From: David Daney
> >
> > Use High-Level Controller (HLC) when possible. The HLC can read/write
> > up to 8 bytes and is completely optional. The most important
On Mon, Apr 18, 2016 at 08:11:50PM -0700, Alexei Starovoitov wrote:
> move trace_call_bpf() into helper function to minimize the size
> of perf_trace_*() tracepoint handlers.
> text data bss dechex filename
> 10541679 5526646 2945024 190133491221ee5
On Mon, Apr 18, 2016 at 08:11:50PM -0700, Alexei Starovoitov wrote:
> move trace_call_bpf() into helper function to minimize the size
> of perf_trace_*() tracepoint handlers.
> text data bss dechex filename
> 10541679 5526646 2945024 190133491221ee5
On 04/21/2016 08:36 AM, Greg KH wrote:
> On Thu, Apr 21, 2016 at 07:27:39AM -0400, Sasha Levin wrote:
>> Hey Willy,
>>
>> On 04/21/2016 03:11 AM, Willy Tarreau wrote:
>>> This illustrates exactly what I suspected would happen because that's the
>>> same trouble we all face when picking backports
On 04/21/2016 08:36 AM, Greg KH wrote:
> On Thu, Apr 21, 2016 at 07:27:39AM -0400, Sasha Levin wrote:
>> Hey Willy,
>>
>> On 04/21/2016 03:11 AM, Willy Tarreau wrote:
>>> This illustrates exactly what I suspected would happen because that's the
>>> same trouble we all face when picking backports
CPU-idle related code like context save/restore functions idle_power7.S
can reused for adding stop instruction support. Move this
code to a new commonly accessible location.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/kernel/Makefile| 1 +
If hardware supports stop state, use the deepest stop state when
the cpu is offlined.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/platforms/powernv/idle.c| 15 +--
arch/powerpc/platforms/powernv/powernv.h | 1 +
pnv_init_idle_states discovers supported idle states from the
device tree and does the required initialization. Set power_save
function pointer only after this initialization is done
Signed-off-by: Shreyas B. Prabhy
---
arch/powerpc/platforms/powernv/idle.c | 3 +++
Move idle related macros to a common location asm/cpuidle.h so that
they can be used for stop instruction support.
Signed-off-by: Shreyas B. Prabhy
---
arch/powerpc/include/asm/cpuidle.h | 27 +++
arch/powerpc/kernel/idle_power7.S | 26
CPU-idle related code like context save/restore functions idle_power7.S
can reused for adding stop instruction support. Move this
code to a new commonly accessible location.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/kernel/Makefile| 1 +
arch/powerpc/kernel/idle_power7.S
If hardware supports stop state, use the deepest stop state when
the cpu is offlined.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/platforms/powernv/idle.c| 15 +--
arch/powerpc/platforms/powernv/powernv.h | 1 +
arch/powerpc/platforms/powernv/smp.c | 4 +++-
3 files
pnv_init_idle_states discovers supported idle states from the
device tree and does the required initialization. Set power_save
function pointer only after this initialization is done
Signed-off-by: Shreyas B. Prabhy
---
arch/powerpc/platforms/powernv/idle.c | 3 +++
Move idle related macros to a common location asm/cpuidle.h so that
they can be used for stop instruction support.
Signed-off-by: Shreyas B. Prabhy
---
arch/powerpc/include/asm/cpuidle.h | 27 +++
arch/powerpc/kernel/idle_power7.S | 26 --
2
On Sat, 2016-20-02 at 05:02:47 UTC, Anju T wrote:
> Map ID values with corresponding register names. These names are then
> displayed when user issues perf record with the -I option
> followed by perf report/script with -D option.
>
> To test this patchset,
> Eg:
> $ perf record -I ls # record
Hello,
> s390/compat: build error for large compat syscall args
>
> Enforce 32 bit types for all compat syscall argument types.
>
> This way we can make sure that all arguments get correct sign
> or zero extension. Otherwise incorrect code would be generated.
>
> E.g. for a 'long' type
On Sat, 2016-20-02 at 05:02:47 UTC, Anju T wrote:
> Map ID values with corresponding register names. These names are then
> displayed when user issues perf record with the -I option
> followed by perf report/script with -D option.
>
> To test this patchset,
> Eg:
> $ perf record -I ls # record
Hello,
> s390/compat: build error for large compat syscall args
>
> Enforce 32 bit types for all compat syscall argument types.
>
> This way we can make sure that all arguments get correct sign
> or zero extension. Otherwise incorrect code would be generated.
>
> E.g. for a 'long' type
On Sat, 2016-20-02 at 05:02:46 UTC, Anju T wrote:
> The perf infrastructure uses a bit mask to find out valid
> registers to display. Define a register mask for supported
> registers defined in asm/perf_regs.h. The bit positions also
> correspond to register IDs which is used by perf
On Sat, 2016-20-02 at 05:02:46 UTC, Anju T wrote:
> The perf infrastructure uses a bit mask to find out valid
> registers to display. Define a register mask for supported
> registers defined in asm/perf_regs.h. The bit positions also
> correspond to register IDs which is used by perf
Crestez Dan Leonard wrote:
> On 04/20/2016 11:31 PM, Peter Rosin wrote:
> > Crestez Dan Leonard wrote:
> >> Changes since that version:
> >> * Nest the adapter in inv_mpu6050_state instead of making it static
> >> * Explicitly forward of_node "i2c-aux-master" to allow describing aux
> >> devices
Crestez Dan Leonard wrote:
> On 04/20/2016 11:31 PM, Peter Rosin wrote:
> > Crestez Dan Leonard wrote:
> >> Changes since that version:
> >> * Nest the adapter in inv_mpu6050_state instead of making it static
> >> * Explicitly forward of_node "i2c-aux-master" to allow describing aux
> >> devices
> I think we should just drop the _interruptible_ and use
> wait_event_timeout. The same is already used in the octeon_i2c_wait().
> The 2ms timeout should not hurt anyone.
This is what most people have good experience with :)
signature.asc
Description: PGP signature
> I think we should just drop the _interruptible_ and use
> wait_event_timeout. The same is already used in the octeon_i2c_wait().
> The 2ms timeout should not hurt anyone.
This is what most people have good experience with :)
signature.asc
Description: PGP signature
> I assumed this check was bogus and there are no valid 0-length
> messages...
They are valid (check SMBUS_QUICK), but not every controller can handle
them correctly. Your driver has SMBUS_QUICK enabled, so this is a
contradiction to the check above where it rejects it.
So, it looks like it
> I assumed this check was bogus and there are no valid 0-length
> messages...
They are valid (check SMBUS_QUICK), but not every controller can handle
them correctly. Your driver has SMBUS_QUICK enabled, so this is a
contradiction to the check above where it rejects it.
So, it looks like it
On 04/21/2016 08:39 AM, Greg KH wrote:
> On Thu, Apr 21, 2016 at 02:05:41PM +0200, Jiri Slaby wrote:
>> > On 04/21/2016, 01:59 PM, Jiri Slaby wrote:
> >> (CVE-2016-2085) 613317b EVM: Use crypto_memneq() for digest
> >> comparisons
>>> > >
>>> > > Does not exist in the CVE database/is
On 04/21/2016 08:39 AM, Greg KH wrote:
> On Thu, Apr 21, 2016 at 02:05:41PM +0200, Jiri Slaby wrote:
>> > On 04/21/2016, 01:59 PM, Jiri Slaby wrote:
> >> (CVE-2016-2085) 613317b EVM: Use crypto_memneq() for digest
> >> comparisons
>>> > >
>>> > > Does not exist in the CVE database/is
The controller claims to support SDR104. In fact, it only supports a
degraded SDR104 since the maximum frequency of the SD clock is 120 MHz
instead of 208 MHz.
The sdhci core is unaware of it and will compute a wrong clock divider.
We can deal with this specific case by using presets.
The controller claims to support SDR104. In fact, it only supports a
degraded SDR104 since the maximum frequency of the SD clock is 120 MHz
instead of 208 MHz.
The sdhci core is unaware of it and will compute a wrong clock divider.
We can deal with this specific case by using presets.
Add Stefano and Anthony
On Thu, Apr 21, 2016 at 04:43:45PM +0300, Michael S. Tsirkin wrote:
> This adds a flag to enable/disable bypassing the IOMMU by
> virtio devices.
>
> This is on top of patch
> http://article.gmane.org/gmane.comp.emulators.qemu/403467
> virtio: convert to use DMA api
>
>
On 04/21/2016 07:59 AM, Jiri Slaby wrote:
> On 04/21/2016, 01:11 PM, Sasha Levin wrote:
>>> Ok, not that bad, it is only unused code, but why are *not* these in the
>>> security tree?
>>> ipr: Fix out-of-bounds null overwrite
>>
>> Is there a particular way to exploit this that I'm missing?
>
>
Add Stefano and Anthony
On Thu, Apr 21, 2016 at 04:43:45PM +0300, Michael S. Tsirkin wrote:
> This adds a flag to enable/disable bypassing the IOMMU by
> virtio devices.
>
> This is on top of patch
> http://article.gmane.org/gmane.comp.emulators.qemu/403467
> virtio: convert to use DMA api
>
>
On 04/21/2016 07:59 AM, Jiri Slaby wrote:
> On 04/21/2016, 01:11 PM, Sasha Levin wrote:
>>> Ok, not that bad, it is only unused code, but why are *not* these in the
>>> security tree?
>>> ipr: Fix out-of-bounds null overwrite
>>
>> Is there a particular way to exploit this that I'm missing?
>
>
power7_powersave_common does common steps needed before entering idle
state and eventually changes MSR to MSR_IDLE and does rfid to
power7_enter_nap_mode.
Make it more generic by passing the rfid address as a function parameter.
Also make function name more generic.
Signed-off-by: Shreyas B.
power7_powersave_common does common steps needed before entering idle
state and eventually changes MSR to MSR_IDLE and does rfid to
power7_enter_nap_mode.
Make it more generic by passing the rfid address as a function parameter.
Also make function name more generic.
Signed-off-by: Shreyas B.
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added. This instruction replaces
instructions like nap, sleep, rvwinkle.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
PSSCR has
On 04/20/2016 04:43 PM, Linus Walleij wrote:
On Tue, Apr 19, 2016 at 2:18 PM, wrote:
From: Patrice Chotard
STMPE1600 is a 16-bit port expander.
Datasheet is available here :
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added. This instruction replaces
instructions like nap, sleep, rvwinkle.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
PSSCR has
On 04/20/2016 04:43 PM, Linus Walleij wrote:
On Tue, Apr 19, 2016 at 2:18 PM, wrote:
From: Patrice Chotard
STMPE1600 is a 16-bit port expander.
Datasheet is available here :
http://www2.st.com/content/st_com/en/products/interfaces-and-transceivers/
On 21 April 2016 at 14:41, Laurent Pinchart
wrote:
> Hi Ulf,
>
> On Thursday 21 Apr 2016 11:10:19 Ulf Hansson wrote:
>> On 21 April 2016 at 01:30, Laurent Pinchart wrote:
>> > On Monday 07 Mar 2016 11:10:08 Ulf Hansson wrote:
>> >> [...]
>> >>
>> I agree,
On 21 April 2016 at 14:41, Laurent Pinchart
wrote:
> Hi Ulf,
>
> On Thursday 21 Apr 2016 11:10:19 Ulf Hansson wrote:
>> On 21 April 2016 at 01:30, Laurent Pinchart wrote:
>> > On Monday 07 Mar 2016 11:10:08 Ulf Hansson wrote:
>> >> [...]
>> >>
>> I agree, that's a better idea. Drivers
In the current code, when the thread wakes up in reset vector, some
of the state restore code and check for whether a thread needs to
branch to kvm is duplicated. Reorder the code such that this
duplication is avoided.
At a higher level this is what the change looks like-
Before this patch -
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
Supported idle states and value to be written to PSSCR register to enter
any idle
In the current code, when the thread wakes up in reset vector, some
of the state restore code and check for whether a thread needs to
branch to kvm is duplicated. Reorder the code such that this
duplication is avoided.
At a higher level this is what the change looks like-
Before this patch -
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
Supported idle states and value to be written to PSSCR register to enter
any idle
On 04/20/2016 04:37 PM, Linus Walleij wrote:
On Tue, Apr 19, 2016 at 2:18 PM, wrote:
From: Patrice Chotard
By cross-checking STMPE 610/801/811/1601/2401/2403 datasheets,
it appears that edge detection and rising/falling edge detection
is
On 04/20/2016 04:37 PM, Linus Walleij wrote:
On Tue, Apr 19, 2016 at 2:18 PM, wrote:
From: Patrice Chotard
By cross-checking STMPE 610/801/811/1601/2401/2403 datasheets,
it appears that edge detection and rising/falling edge detection
is not supported by all STMPE variant:
On 21.04.2016 15:31, Eric Dumazet wrote:
> On Thu, 2016-04-21 at 05:05 -0400, valdis.kletni...@vt.edu wrote:
>> On Thu, 21 Apr 2016 09:42:12 +0200, Hannes Frederic Sowa said:
>>> Hi,
>>>
>>> On Thu, Apr 21, 2016, at 02:30, Valdis Kletnieks wrote:
linux-next 20160420 is whining at an
CHECK_HMI_INTERRUPT is used to check for HMI's in reset vector. Move
the macro to a common location (exception-64s.h)
This patch does not change any functionality.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/include/asm/exception-64s.h | 18 ++
On Wed, Apr 13, 2016 at 03:29:17PM +0200, Niklas S?derlund wrote:
> > Yes, it would be good to do an audit of all the ARM dma_ops as well
> > as generic code like drivers/base/dma-*.c, lib/dma-debug.c and
> > include/linux/dma-*.h
What about things like the phys_addr() helper in lib/dma-debug.c?
On 21.04.2016 15:31, Eric Dumazet wrote:
> On Thu, 2016-04-21 at 05:05 -0400, valdis.kletni...@vt.edu wrote:
>> On Thu, 21 Apr 2016 09:42:12 +0200, Hannes Frederic Sowa said:
>>> Hi,
>>>
>>> On Thu, Apr 21, 2016, at 02:30, Valdis Kletnieks wrote:
linux-next 20160420 is whining at an
CHECK_HMI_INTERRUPT is used to check for HMI's in reset vector. Move
the macro to a common location (exception-64s.h)
This patch does not change any functionality.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/include/asm/exception-64s.h | 18 ++
On Wed, Apr 13, 2016 at 03:29:17PM +0200, Niklas S?derlund wrote:
> > Yes, it would be good to do an audit of all the ARM dma_ops as well
> > as generic code like drivers/base/dma-*.c, lib/dma-debug.c and
> > include/linux/dma-*.h
What about things like the phys_addr() helper in lib/dma-debug.c?
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added. This instruction replaces
instructions like nap, sleep, rvwinkle.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added. This instruction replaces
instructions like nap, sleep, rvwinkle.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
On Wed, Apr 20, 2016 at 01:41:24AM +, Li, Liang Z wrote:
> > Cc: Rik van Riel; v...@zeniv.linux.org.uk; linux-kernel@vger.kernel.org;
> > quint...@redhat.com; amit.s...@redhat.com; pbonz...@redhat.com;
> > dgilb...@redhat.com; linux...@kvack.org; k...@vger.kernel.org; qemu-
> >
On Wed, Apr 20, 2016 at 01:41:24AM +, Li, Liang Z wrote:
> > Cc: Rik van Riel; v...@zeniv.linux.org.uk; linux-kernel@vger.kernel.org;
> > quint...@redhat.com; amit.s...@redhat.com; pbonz...@redhat.com;
> > dgilb...@redhat.com; linux...@kvack.org; k...@vger.kernel.org; qemu-
> >
The parameters atomic and duplicates of efivar_init always have opposite
values. Drop the parameter atomic, replace the uses of !atomic with
duplicates, and update the call sites accordingly.
The code using duplicates is slightly reorganized with an else, to avoid
duplicating the lock code.
On Sat, 2016-20-02 at 05:02:45 UTC, Anju T wrote:
> The enum definition assigns an 'id' to each register in "struct pt_regs"
> of arch/powerpc. The order of these values in the enum definition are
> based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h.
>
> Signed-off-by:
On Wed, 2016-04-20 at 10:16 -0300, Arnaldo Carvalho de Melo wrote:
> Em Wed, Apr 20, 2016 at 02:55:58PM +1000, Michael Ellerman escreveu:
> > On Wed, 2016-04-20 at 00:57 -0300, Arnaldo Carvalho de Melo wrote:
> > > Even the bits in tools/perf/ are arch specific, so I guess this goes via
> > > the
On Wed, Apr 20, 2016 at 02:55:15PM -0700, David Daney wrote:
> On 04/20/2016 02:43 PM, Wolfram Sang wrote:
> >On Mon, Apr 11, 2016 at 05:28:39PM +0200, Jan Glauber wrote:
> [...]
> >>+ */
> >>+static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c)
> >>+{
> >>+ int time_left;
> >>+
> >>+
The parameters atomic and duplicates of efivar_init always have opposite
values. Drop the parameter atomic, replace the uses of !atomic with
duplicates, and update the call sites accordingly.
The code using duplicates is slightly reorganized with an else, to avoid
duplicating the lock code.
On Sat, 2016-20-02 at 05:02:45 UTC, Anju T wrote:
> The enum definition assigns an 'id' to each register in "struct pt_regs"
> of arch/powerpc. The order of these values in the enum definition are
> based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h.
>
> Signed-off-by:
On Wed, 2016-04-20 at 10:16 -0300, Arnaldo Carvalho de Melo wrote:
> Em Wed, Apr 20, 2016 at 02:55:58PM +1000, Michael Ellerman escreveu:
> > On Wed, 2016-04-20 at 00:57 -0300, Arnaldo Carvalho de Melo wrote:
> > > Even the bits in tools/perf/ are arch specific, so I guess this goes via
> > > the
On Wed, Apr 20, 2016 at 02:55:15PM -0700, David Daney wrote:
> On 04/20/2016 02:43 PM, Wolfram Sang wrote:
> >On Mon, Apr 11, 2016 at 05:28:39PM +0200, Jan Glauber wrote:
> [...]
> >>+ */
> >>+static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c)
> >>+{
> >>+ int time_left;
> >>+
> >>+
Hello Inki,
On 03/28/2016 09:28 PM, Javier Martinez Canillas wrote:
> Commit aeefb36832e5 ("drm/exynos: gsc: add device tree support and remove
> usage of static mappings") made the DRM_EXYNOS_GSC Kconfig symbol to only
> be selectable if the exynos-gsc V4L2 driver isn't enabled, since both use
>
Hello Inki,
On 03/28/2016 09:28 PM, Javier Martinez Canillas wrote:
> Commit aeefb36832e5 ("drm/exynos: gsc: add device tree support and remove
> usage of static mappings") made the DRM_EXYNOS_GSC Kconfig symbol to only
> be selectable if the exynos-gsc V4L2 driver isn't enabled, since both use
>
From: Fu Wei
This is a update of Chinese documentation: Documentation/zh_CN/arm64/booting.txt
It is based on the modifications of Documentation/arm64/booting.txt in
submission:
"a7f8de16".
Signed-off-by: Fu Wei
---
Documentation/zh_CN/arm64/booting.txt | 20
From: Fu Wei
This is a update of Chinese documentation: Documentation/zh_CN/arm64/booting.txt
It is based on the modifications of Documentation/arm64/booting.txt in
submission:
"a7f8de16".
Signed-off-by: Fu Wei
---
Documentation/zh_CN/arm64/booting.txt | 20
1 file
On Sat, 2016-20-02 at 05:02:48 UTC, Anju T wrote:
> From: Madhavan Srinivasan
>
> Add sample_reg_mask array with pt_regs registers.
> This is needed for printing supported regs ( -I? option).
>
> Signed-off-by: Madhavan Srinivasan
Applied to
On Sat, 2016-20-02 at 05:02:48 UTC, Anju T wrote:
> From: Madhavan Srinivasan
>
> Add sample_reg_mask array with pt_regs registers.
> This is needed for printing supported regs ( -I? option).
>
> Signed-off-by: Madhavan Srinivasan
Applied to powerpc next, thanks.
Hello,
> s390/compat: build error for large compat syscall args
>
> Enforce 32 bit types for all compat syscall argument types.
>
> This way we can make sure that all arguments get correct sign
> or zero extension. Otherwise incorrect code would be generated.
>
> E.g. for a 'long' type
Hello,
> s390/compat: build error for large compat syscall args
>
> Enforce 32 bit types for all compat syscall argument types.
>
> This way we can make sure that all arguments get correct sign
> or zero extension. Otherwise incorrect code would be generated.
>
> E.g. for a 'long' type
On Wed, Apr 20, 2016 at 09:30:07PM -0700, Guenter Roeck wrote:
>
> Hi Clemens,
>
> fix is to drop the call to cancel_delayed_work_sync() from watchdog_release().
> Turns out the call is not necessary.
>
> I'll send a proper patch in the next couple of days.
>
> Guenter
>
Hi Guenter,
thank
On Wed, Apr 20, 2016 at 09:30:07PM -0700, Guenter Roeck wrote:
>
> Hi Clemens,
>
> fix is to drop the call to cancel_delayed_work_sync() from watchdog_release().
> Turns out the call is not necessary.
>
> I'll send a proper patch in the next couple of days.
>
> Guenter
>
Hi Guenter,
thank
This adds a flag to enable/disable bypassing the IOMMU by
virtio devices.
This is on top of patch
http://article.gmane.org/gmane.comp.emulators.qemu/403467
virtio: convert to use DMA api
Tested with patchset
http://article.gmane.org/gmane.linux.kernel.virtualization/27545
virtio-pci: iommu
This adds a flag to enable/disable bypassing the IOMMU by
virtio devices.
This is on top of patch
http://article.gmane.org/gmane.comp.emulators.qemu/403467
virtio: convert to use DMA api
Tested with patchset
http://article.gmane.org/gmane.linux.kernel.virtualization/27545
virtio-pci: iommu
On Fri, Apr 15, 2016 at 02:22:53PM +0530, Kedareswara rao Appana wrote:
> Device-tree binding documentation for Xilinx zynqmp dma engine used in
> Zynq UltraScale+ MPSoC.
>
> Signed-off-by: Punnaiah Choudary Kalluri
> Signed-off-by: Kedareswara rao Appana
On Fri, Apr 15, 2016 at 02:22:53PM +0530, Kedareswara rao Appana wrote:
> Device-tree binding documentation for Xilinx zynqmp dma engine used in
> Zynq UltraScale+ MPSoC.
>
> Signed-off-by: Punnaiah Choudary Kalluri
> Signed-off-by: Kedareswara rao Appana
> ---
> Changes in v6:
> - Removed
Hi Al,
I hope you don't mind if I put few minor questions here.
On Mon, Apr 18, 2016 at 8:32 PM, Al Stone wrote:
> The ACPI 6.1 specification was recently released at the end of January
> 2016, but the arm64 kernel documentation for the use of ACPI was written
> for the 5.1
Hi Al,
I hope you don't mind if I put few minor questions here.
On Mon, Apr 18, 2016 at 8:32 PM, Al Stone wrote:
> The ACPI 6.1 specification was recently released at the end of January
> 2016, but the arm64 kernel documentation for the use of ACPI was written
> for the 5.1 version of the spec.
It has:
a tense correction(led->leads);
a typo(unevitably->inevitably);
Signed-off-by: Cao jin
---
Documentation/timers/hrtimers.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/timers/hrtimers.txt
It has:
a tense correction(led->leads);
a typo(unevitably->inevitably);
Signed-off-by: Cao jin
---
Documentation/timers/hrtimers.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/timers/hrtimers.txt
b/Documentation/timers/hrtimers.txt
index
2016-04-20 Joe Perches :
> On Wed, 2016-04-20 at 16:18 -0300, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > This function had copies in 3 different files. Unify them in kernel.h.
> []
> > diff --git a/include/linux/kernel.h
2016-04-20 Joe Perches :
> On Wed, 2016-04-20 at 16:18 -0300, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > This function had copies in 3 different files. Unify them in kernel.h.
> []
> > diff --git a/include/linux/kernel.h b/include/linux/kernel.h
> []
> > @@ -53,6 +53,12 @@
> >
>
On 04/21/2016 09:23 PM, Jonathan Corbet wrote:
On Thu, 21 Apr 2016 18:25:41 +0800
Cao jin wrote:
This change is incorrect - "unacceptable" is exactly what the writer
wanted to say here.
*it cannot be 'designed out' without inevitably degrading other portions
of
On 04/21/2016 09:23 PM, Jonathan Corbet wrote:
On Thu, 21 Apr 2016 18:25:41 +0800
Cao jin wrote:
This change is incorrect - "unacceptable" is exactly what the writer
wanted to say here.
*it cannot be 'designed out' without inevitably degrading other portions
of the timers.c code in an
Have hit this same looking oops every now and then since at least 4.2 or so..
Not easy to reproduce systematically.
--Mika
[10973.891726] Unable to handle kernel NULL pointer dereference at virtual
address
[10973.899839] pgd = a8ce4000
[10973.902549] [] *pgd=38c38831,
Have hit this same looking oops every now and then since at least 4.2 or so..
Not easy to reproduce systematically.
--Mika
[10973.891726] Unable to handle kernel NULL pointer dereference at virtual
address
[10973.899839] pgd = a8ce4000
[10973.902549] [] *pgd=38c38831,
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