The musb driver can drop rx packets when heavily loaded. These two
patches address two issues that can cause this. Both issues arose
when an endpoint was reprogrammed. The first patch is a logic bug
that resulted in a shared_fifo in rx mode not having its state
cleared out. The second patch fixes
The musb driver can drop rx packets when heavily loaded. These two
patches address two issues that can cause this. Both issues arose
when an endpoint was reprogrammed. The first patch is a logic bug
that resulted in a shared_fifo in rx mode not having its state
cleared out. The second patch fixes
On Fri, May 20, 2016 at 04:17:05PM +0200, Ralf Baechle wrote:
> CONFIG_MIPS32_N32=y but CONFIG_BINFMT_ELF disabled results in the following
> linker errors:
>
> arch/mips/built-in.o: In function `elf_core_dump':
> binfmt_elfn32.c:(.text+0x23dbc): undefined reference to `elf_core_extra_phdrs'
>
On Fri, May 20, 2016 at 04:17:05PM +0200, Ralf Baechle wrote:
> CONFIG_MIPS32_N32=y but CONFIG_BINFMT_ELF disabled results in the following
> linker errors:
>
> arch/mips/built-in.o: In function `elf_core_dump':
> binfmt_elfn32.c:(.text+0x23dbc): undefined reference to `elf_core_extra_phdrs'
>
This is an updated (and rewritten) version of v3 of this patchset[1].
The main difference is that I changed how we the "allow management" is
implemented. Rather than just chmod-ing the cgroup directory (which
everyone agreed was quite an odd way of doing it),
unshare(CLONE_NEWCGROUP) will create
This is an updated (and rewritten) version of v3 of this patchset[1].
The main difference is that I changed how we the "allow management" is
implemented. Rather than just chmod-ing the cgroup directory (which
everyone agreed was quite an odd way of doing it),
unshare(CLONE_NEWCGROUP) will create
2016-05-20 Christian König :
> From: Gustavo Padovan
>
> struct fence_collection inherits from struct fence and carries a
> collection of fences that needs to be waited together.
>
> It is useful to translate a sync_file to a fence to
2016-05-20 Christian König :
> From: Gustavo Padovan
>
> struct fence_collection inherits from struct fence and carries a
> collection of fences that needs to be waited together.
>
> It is useful to translate a sync_file to a fence to remove the complexity
> of dealing with sync_files on DRM
This is not implemented and doesn't really make sense because IIO
proximity is unit-less.
Remove IIO_CHAN_INFO_SCALE from info_mask because so that the _scale
sysfs entry won't appear. This fixes userspace tools like generic_buffer
which abort when reads returns an error.
Signed-off-by: Crestez
This is not implemented and doesn't really make sense because IIO
proximity is unit-less.
Remove IIO_CHAN_INFO_SCALE from info_mask because so that the _scale
sysfs entry won't appear. This fixes userspace tools like generic_buffer
which abort when reads returns an error.
Signed-off-by: Crestez
On Fri, May 20, 2016 at 03:56:11PM +0200, Christian König wrote:
> From: Gustavo Padovan
>
> struct fence_collection inherits from struct fence and carries a
> collection of fences that needs to be waited together.
>
> It is useful to translate a sync_file to a
On Fri, May 20, 2016 at 03:56:11PM +0200, Christian König wrote:
> From: Gustavo Padovan
>
> struct fence_collection inherits from struct fence and carries a
> collection of fences that needs to be waited together.
>
> It is useful to translate a sync_file to a fence to remove the complexity
>
On Thu, 19 May 2016, Valdis Kletnieks wrote:
> UBSAN throws a complaint:
>
> [2.418579] UBSAN: Undefined behaviour in
> drivers/usb/host/ehci-hub.c:877:47
> [2.418582] index -1 is out of range for type 'u32 [1]'
>
> though it's only on the hostpc[] part, not on the port_status[] on
On Thu, 19 May 2016, Valdis Kletnieks wrote:
> UBSAN throws a complaint:
>
> [2.418579] UBSAN: Undefined behaviour in
> drivers/usb/host/ehci-hub.c:877:47
> [2.418582] index -1 is out of range for type 'u32 [1]'
>
> though it's only on the hostpc[] part, not on the port_status[] on
On Thu, 19 May 2016 valdis.kletni...@vt.edu wrote:
> On Thu, 19 May 2016 17:50:31 -0700, Greg Kroah-Hartman said:
> > On Thu, May 19, 2016 at 05:19:00PM -0400, Valdis Kletnieks wrote:
> > > UBSAN throws a complaint:
> > >
> > > [2.418579] UBSAN: Undefined behaviour in
> > >
On Thu, 19 May 2016 valdis.kletni...@vt.edu wrote:
> On Thu, 19 May 2016 17:50:31 -0700, Greg Kroah-Hartman said:
> > On Thu, May 19, 2016 at 05:19:00PM -0400, Valdis Kletnieks wrote:
> > > UBSAN throws a complaint:
> > >
> > > [2.418579] UBSAN: Undefined behaviour in
> > >
On 05/18/2016 04:03 PM, Mel Gorman wrote:
On Wed, May 18, 2016 at 10:09:50AM +, Naoya Horiguchi wrote:
From c600b1ee6c36b3df6973f5365b4179c92f3c08e3 Mon Sep 17 00:00:00 2001
From: Naoya Horiguchi
Date: Wed, 18 May 2016 18:42:57 +0900
Subject: [PATCH v2] mm:
On 05/18/2016 04:03 PM, Mel Gorman wrote:
On Wed, May 18, 2016 at 10:09:50AM +, Naoya Horiguchi wrote:
From c600b1ee6c36b3df6973f5365b4179c92f3c08e3 Mon Sep 17 00:00:00 2001
From: Naoya Horiguchi
Date: Wed, 18 May 2016 18:42:57 +0900
Subject: [PATCH v2] mm: check_new_page_bad() directly
On Friday 20 May 2016 13:44:14 Mark Brown wrote:
> On Fri, May 20, 2016 at 02:24:14PM +0200, Arnd Bergmann wrote:
> > On Thursday 19 May 2016 14:08:43 Andy Gross wrote:
>
> > > I'd rather do something like what we did for the GSBI. It needed to
> > > change some phy related bits in the TCSR as
On Friday 20 May 2016 13:44:14 Mark Brown wrote:
> On Fri, May 20, 2016 at 02:24:14PM +0200, Arnd Bergmann wrote:
> > On Thursday 19 May 2016 14:08:43 Andy Gross wrote:
>
> > > I'd rather do something like what we did for the GSBI. It needed to
> > > change some phy related bits in the TCSR as
On Thursday 12 May 2016 19:08:30 mario_limoncie...@dell.com wrote:
> > > We do mirror the information in ACPI under the system bus:
> > >
> > > Scope (_SB)
> > > {
> > > Name (AMAC, Buffer (0x17)
> > > {
> > > "_AUXMAC_#847BEB5992D2#"
> > > })
> > >
On Thursday 12 May 2016 19:08:30 mario_limoncie...@dell.com wrote:
> > > We do mirror the information in ACPI under the system bus:
> > >
> > > Scope (_SB)
> > > {
> > > Name (AMAC, Buffer (0x17)
> > > {
> > > "_AUXMAC_#847BEB5992D2#"
> > > })
> > >
On Thu, 19 May 2016, Andy Gross wrote:
> On 19 May 2016 at 05:12, Srinivas Kandagatla
> wrote:
>
>
>
> > +++ b/drivers/usb/host/ehci-hcd.c
> > @@ -368,6 +368,15 @@ static void ehci_shutdown(struct usb_hcd *hcd)
> > {
> > struct ehci_hcd *ehci =
On Thu, 19 May 2016, Andy Gross wrote:
> On 19 May 2016 at 05:12, Srinivas Kandagatla
> wrote:
>
>
>
> > +++ b/drivers/usb/host/ehci-hcd.c
> > @@ -368,6 +368,15 @@ static void ehci_shutdown(struct usb_hcd *hcd)
> > {
> > struct ehci_hcd *ehci = hcd_to_ehci(hcd);
> >
> > + /**
>
Hi Lothar,
Am Freitag, den 20.05.2016, 15:34 +0200 schrieb Lothar Waßmann:
> Currently these flags are lost in the call
> drm_display_mode_from_videomode()
>
> Signed-off-by: Lothar Waßmann
thank you for the patches. The other two look fine to me, could you
rebase
Hi Lothar,
Am Freitag, den 20.05.2016, 15:34 +0200 schrieb Lothar Waßmann:
> Currently these flags are lost in the call
> drm_display_mode_from_videomode()
>
> Signed-off-by: Lothar Waßmann
thank you for the patches. The other two look fine to me, could you
rebase this one on top of:
From: Andi Kleen
When --metric-only is enabled there were no headers for the topology
in interval mode. Fix this here.
Before
$ perf stat --metric-only -e cycles,instructions -a -I 1000
1.000554967 insn per cycle stalled cycles per insn
1.000554967
From: Andi Kleen
When --metric-only is enabled there were no headers for the topology
in interval mode. Fix this here.
Before
$ perf stat --metric-only -e cycles,instructions -a -I 1000
1.000554967 insn per cycle stalled cycles per insn
1.0005549670.27
2.000862000
Hi,
Some bootloaders (like U-boot) support several HW devices: serial, network,
NAND, USB, etc. most of which are also supported by Linux.
So the question is: is code shared? I mean, I understand that the drivers need
to talk to the appropriate API, and such API could be different between
Hi,
Some bootloaders (like U-boot) support several HW devices: serial, network,
NAND, USB, etc. most of which are also supported by Linux.
So the question is: is code shared? I mean, I understand that the drivers need
to talk to the appropriate API, and such API could be different between
Upcoming patch will change how to encode zspage meta so for easy review,
this patch wraps code to access metadata as accessor.
Reviewed-by: Sergey Senozhatsky
Signed-off-by: Minchan Kim
---
mm/zsmalloc.c | 82
Use kernel standard bit spin-lock instead of custom mess. Even, it has
a bug which doesn't disable preemption. The reason we don't have any
problem is that we have used it during preemption disable section
by class->lock spinlock. So no need to go to stable.
Reviewed-by: Sergey Senozhatsky
For page migration, we need to create page chain of zspage dynamically
so this patch factors it out from alloc_zspage.
Reviewed-by: Sergey Senozhatsky
Signed-off-by: Minchan Kim
---
mm/zsmalloc.c | 59
On 20 May 2016 at 15:43, Kangjie Lu wrote:
>
>
> On Friday, May 20, 2016, Vegard Nossum wrote:
>>
>> On 19 May 2016 at 11:08, Jiri Slaby wrote:
>> > From: Kangjie Lu
>> >
>> > 3.12-stable review patch. If
Upcoming patch will change how to encode zspage meta so for easy review,
this patch wraps code to access metadata as accessor.
Reviewed-by: Sergey Senozhatsky
Signed-off-by: Minchan Kim
---
mm/zsmalloc.c | 82 +++
1 file changed, 60
Use kernel standard bit spin-lock instead of custom mess. Even, it has
a bug which doesn't disable preemption. The reason we don't have any
problem is that we have used it during preemption disable section
by class->lock spinlock. So no need to go to stable.
Reviewed-by: Sergey Senozhatsky
For page migration, we need to create page chain of zspage dynamically
so this patch factors it out from alloc_zspage.
Reviewed-by: Sergey Senozhatsky
Signed-off-by: Minchan Kim
---
mm/zsmalloc.c | 59 +++
1 file changed, 35
On 20 May 2016 at 15:43, Kangjie Lu wrote:
>
>
> On Friday, May 20, 2016, Vegard Nossum wrote:
>>
>> On 19 May 2016 at 11:08, Jiri Slaby wrote:
>> > From: Kangjie Lu
>> >
>> > 3.12-stable review patch. If anyone has any objections, please let me
>> > know.
>> >
>> > ===
>> >
>> >
We have squeezed meta data of zspage into first page's descriptor.
So, to get meta data from subpage, we should get first page first
of all. But it makes trouble to implment page migration feature
of zsmalloc because any place where to get first page from subpage
can be raced with first page
Currently, putback_zspage does free zspage under class->lock
if fullness become ZS_EMPTY but it makes trouble to implement
locking scheme for new zspage migration.
So, this patch is to separate free_zspage from putback_zspage
and free zspage out of class->lock which is preparation for
zspage
Currently, putback_zspage does free zspage under class->lock
if fullness become ZS_EMPTY but it makes trouble to implement
locking scheme for new zspage migration.
So, this patch is to separate free_zspage from putback_zspage
and free zspage out of class->lock which is preparation for
zspage
We have squeezed meta data of zspage into first page's descriptor.
So, to get meta data from subpage, we should get first page first
of all. But it makes trouble to implment page migration feature
of zsmalloc because any place where to get first page from subpage
can be raced with first page
Zsmalloc stores first free object's position into
freeobj in each zspage. If we change it with index from first_page
instead of position, it makes page migration simple because we
don't need to correct other entries for linked list if a page is
migrated out.
Cc: Sergey Senozhatsky
Now, VM has a feature to migrate non-lru movable pages so
balloon doesn't need custom migration hooks in migrate.c
and compaction.c. Instead, this patch implements
page->mapping->a_ops->{isolate|migrate|putback} functions.
With that, we could remove hooks for ballooning in general
migration
Zsmalloc stores first free object's position into
freeobj in each zspage. If we change it with index from first_page
instead of position, it makes page migration simple because we
don't need to correct other entries for linked list if a page is
migrated out.
Cc: Sergey Senozhatsky
Now, VM has a feature to migrate non-lru movable pages so
balloon doesn't need custom migration hooks in migrate.c
and compaction.c. Instead, this patch implements
page->mapping->a_ops->{isolate|migrate|putback} functions.
With that, we could remove hooks for ballooning in general
migration
. zsmalloc page migration
zsmalloc: page migration support
zram: use __GFP_MOVABLE for memory allocation
* From v5
* rebase on next-20160520
* move utility functions to compaction.c and export - Sergey
* zsmalloc dobule free fix - Sergey
* add additional Reviewed-by for zsmalloc - Serg
Zsmalloc is ready for page migration so zram can use __GFP_MOVABLE
from now on.
I did test to see how it helps to make higher order pages.
Test scenario is as follows.
KVM guest, 1G memory, ext4 formated zram block device,
for i in `seq 1 8`;
do
dd if=/dev/vda1 of=mnt/test$i.txt bs=128M
This patch introduces run-time migration feature for zspage.
For migration, VM uses page.lru field so it would be better to not use
page.next field which is unified with page.lru for own purpose.
For that, firstly, we can get first object offset of the page via
runtime calculation instead of
We have allowed migration for only LRU pages until now and it was
enough to make high-order pages. But recently, embedded system(e.g.,
webOS, android) uses lots of non-movable pages(e.g., zram, GPU memory)
so we have seen several reports about troubles of small high-order
allocation. For fixing
. zsmalloc page migration
zsmalloc: page migration support
zram: use __GFP_MOVABLE for memory allocation
* From v5
* rebase on next-20160520
* move utility functions to compaction.c and export - Sergey
* zsmalloc dobule free fix - Sergey
* add additional Reviewed-by for zsmalloc - Serg
Zsmalloc is ready for page migration so zram can use __GFP_MOVABLE
from now on.
I did test to see how it helps to make higher order pages.
Test scenario is as follows.
KVM guest, 1G memory, ext4 formated zram block device,
for i in `seq 1 8`;
do
dd if=/dev/vda1 of=mnt/test$i.txt bs=128M
This patch introduces run-time migration feature for zspage.
For migration, VM uses page.lru field so it would be better to not use
page.next field which is unified with page.lru for own purpose.
For that, firstly, we can get first object offset of the page via
runtime calculation instead of
We have allowed migration for only LRU pages until now and it was
enough to make high-order pages. But recently, embedded system(e.g.,
webOS, android) uses lots of non-movable pages(e.g., zram, GPU memory)
so we have seen several reports about troubles of small high-order
allocation. For fixing
Procedure of page migration is as follows:
First of all, it should isolate a page from LRU and try to
migrate the page. If it is successful, it releases the page
for freeing. Otherwise, it should put the page back to LRU
list.
For LRU pages, we have used putback_lru_page for both freeing
and
Every zspage in a size_class has same number of max objects so
we could move it to a size_class.
Reviewed-by: Sergey Senozhatsky
Signed-off-by: Minchan Kim
---
mm/zsmalloc.c | 32 +++-
1 file changed, 15
Procedure of page migration is as follows:
First of all, it should isolate a page from LRU and try to
migrate the page. If it is successful, it releases the page
for freeing. Otherwise, it should put the page back to LRU
list.
For LRU pages, we have used putback_lru_page for both freeing
and
Every zspage in a size_class has same number of max objects so
we could move it to a size_class.
Reviewed-by: Sergey Senozhatsky
Signed-off-by: Minchan Kim
---
mm/zsmalloc.c | 32 +++-
1 file changed, 15 insertions(+), 17 deletions(-)
diff --git a/mm/zsmalloc.c
On 05/20/2016 07:34 AM, Rafael J. Wysocki wrote:
> On Fri, May 20, 2016 at 9:15 AM, Ingo Molnar wrote:
>>
>> * Logan Gunthorpe wrote:
>>
>>> Hi,
>>>
>>> I have been working on a bug that causes my laptop to freeze during
>>> resume from hibernation. I did a
On 05/20/2016 07:34 AM, Rafael J. Wysocki wrote:
> On Fri, May 20, 2016 at 9:15 AM, Ingo Molnar wrote:
>>
>> * Logan Gunthorpe wrote:
>>
>>> Hi,
>>>
>>> I have been working on a bug that causes my laptop to freeze during
>>> resume from hibernation. I did a bisect to find the offending commit:
On Thu, 2016-05-19 at 15:44 +0300, Heikki Krogerus wrote:
> Like I've told some of you guys, I'm trying to implement a bus for
> the Alternate Modes, but I'm still nowhere near finished with that
> one, so let's just get the class ready now. The altmode bus should in
> any case not affect the
On Thu, 2016-05-19 at 15:44 +0300, Heikki Krogerus wrote:
> Like I've told some of you guys, I'm trying to implement a bus for
> the Alternate Modes, but I'm still nowhere near finished with that
> one, so let's just get the class ready now. The altmode bus should in
> any case not affect the
> [jolsa@ibm-x3650m4-01 perf]$ sudo ./perf stat --topdown -I 1000 -a
> nmi_watchdog enabled with topdown. May give wrong results.
> Disable with echo 0 > /proc/sys/kernel/nmi_watchdog
> 1.002097350 retiring bad speculation
> frontend bound backend
Signed-off-by: Greg Kurz
---
arch/powerpc/kernel/rtasd.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index 5a2c049c1c61..b6e7a935d8b0 100644
--- a/arch/powerpc/kernel/rtasd.c
+++
> [jolsa@ibm-x3650m4-01 perf]$ sudo ./perf stat --topdown -I 1000 -a
> nmi_watchdog enabled with topdown. May give wrong results.
> Disable with echo 0 > /proc/sys/kernel/nmi_watchdog
> 1.002097350 retiring bad speculation
> frontend bound backend
Signed-off-by: Greg Kurz
---
arch/powerpc/kernel/rtasd.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index 5a2c049c1c61..b6e7a935d8b0 100644
--- a/arch/powerpc/kernel/rtasd.c
+++
CONFIG_MIPS32_N32=y but CONFIG_BINFMT_ELF disabled results in the following
linker errors:
arch/mips/built-in.o: In function `elf_core_dump':
binfmt_elfn32.c:(.text+0x23dbc): undefined reference to `elf_core_extra_phdrs'
binfmt_elfn32.c:(.text+0x246e4): undefined reference to
CONFIG_MIPS32_N32=y but CONFIG_BINFMT_ELF disabled results in the following
linker errors:
arch/mips/built-in.o: In function `elf_core_dump':
binfmt_elfn32.c:(.text+0x23dbc): undefined reference to `elf_core_extra_phdrs'
binfmt_elfn32.c:(.text+0x246e4): undefined reference to
On Fri, May 20, 2016 at 03:43:46PM +0200, Jiri Olsa wrote:
> On Fri, May 20, 2016 at 06:38:33AM -0700, Andi Kleen wrote:
> > > > @@ -82,6 +87,12 @@ void perf_stat__reset_shadow_stats(void)
> > > > sizeof(runtime_transaction_stats));
> > > > memset(runtime_elision_stats, 0,
On Fri, May 20, 2016 at 03:43:46PM +0200, Jiri Olsa wrote:
> On Fri, May 20, 2016 at 06:38:33AM -0700, Andi Kleen wrote:
> > > > @@ -82,6 +87,12 @@ void perf_stat__reset_shadow_stats(void)
> > > > sizeof(runtime_transaction_stats));
> > > > memset(runtime_elision_stats, 0,
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laptop,tv,dj,guitar,bikefree shipping
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On 20/05/16 14:34, Laxman Dewangan wrote:
>
> On Friday 20 May 2016 07:02 PM, Jon Hunter wrote:
>> On 20/05/16 12:59, Laxman Dewangan wrote:
>>> +/* tegra_io_pads_config_info: Tegra IO pads bit config info.
>>> + * @dpd_config_bit: DPD configuration bit position. -1 if not
>>> supported.
>>> + *
On 20/05/16 14:34, Laxman Dewangan wrote:
>
> On Friday 20 May 2016 07:02 PM, Jon Hunter wrote:
>> On 20/05/16 12:59, Laxman Dewangan wrote:
>>> +/* tegra_io_pads_config_info: Tegra IO pads bit config info.
>>> + * @dpd_config_bit: DPD configuration bit position. -1 if not
>>> supported.
>>> + *
On 20/05/16 14:34, Laxman Dewangan wrote:
>
> On Friday 20 May 2016 07:02 PM, Jon Hunter wrote:
>> On 20/05/16 12:59, Laxman Dewangan wrote:
>>> +/* tegra_io_pads_config_info: Tegra IO pads bit config info.
>>> + * @dpd_config_bit: DPD configuration bit position. -1 if not
>>> supported.
>>> +
On 20/05/16 14:34, Laxman Dewangan wrote:
>
> On Friday 20 May 2016 07:02 PM, Jon Hunter wrote:
>> On 20/05/16 12:59, Laxman Dewangan wrote:
>>> +/* tegra_io_pads_config_info: Tegra IO pads bit config info.
>>> + * @dpd_config_bit: DPD configuration bit position. -1 if not
>>> supported.
>>> +
On Thu, May 19, 2016 at 04:39:51PM -0700, Andy Lutomirski wrote:
> On Thu, May 19, 2016 at 4:15 PM, Josh Poimboeuf wrote:
> > Note this example is with today's unwinder. It could be made smarter to
> > get the RIP from the pt_regs so the '?' could be removed from
> >
On Thu, May 19, 2016 at 04:39:51PM -0700, Andy Lutomirski wrote:
> On Thu, May 19, 2016 at 4:15 PM, Josh Poimboeuf wrote:
> > Note this example is with today's unwinder. It could be made smarter to
> > get the RIP from the pt_regs so the '?' could be removed from
> > copy_page_to_iter().
> >
> >
From: Gustavo Padovan
struct fence_collection inherits from struct fence and carries a
collection of fences that needs to be waited together.
It is useful to translate a sync_file to a fence to remove the complexity
of dealing with sync_files on DRM drivers. So
From: Gustavo Padovan
struct fence_collection inherits from struct fence and carries a
collection of fences that needs to be waited together.
It is useful to translate a sync_file to a fence to remove the complexity
of dealing with sync_files on DRM drivers. So
From: Gustavo Padovan
struct fence_collection inherits from struct fence and carries a
collection of fences that needs to be waited together.
It is useful to translate a sync_file to a fence to remove the complexity
of dealing with sync_files on DRM drivers. So even if there are many
fences in
From: Gustavo Padovan
struct fence_collection inherits from struct fence and carries a
collection of fences that needs to be waited together.
It is useful to translate a sync_file to a fence to remove the complexity
of dealing with sync_files on DRM drivers. So even if there are many
fences in
From: Eric Huang
Fixes OD failures on Tonga.
Reviewed-by: Alex Deucher
Signed-off-by: Eric Huang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 8
From: Eric Huang
Fixes OD failures on Tonga.
Reviewed-by: Alex Deucher
Signed-off-by: Eric Huang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
Please ignore this one, I was on the wrong branch while sending mails.
Christian.
Am 20.05.2016 um 15:53 schrieb Christian König:
From: Eric Huang
Fixes OD failures on Tonga.
Reviewed-by: Alex Deucher
Signed-off-by: Eric Huang
Please ignore this one, I was on the wrong branch while sending mails.
Christian.
Am 20.05.2016 um 15:53 schrieb Christian König:
From: Eric Huang
Fixes OD failures on Tonga.
Reviewed-by: Alex Deucher
Signed-off-by: Eric Huang
Signed-off-by: Alex Deucher
---
Hi Peter,
On Fri, May 20, 2016 at 01:58:19PM +0200, Peter Zijlstra wrote:
> On Thu, May 19, 2016 at 10:39:26PM -0700, Davidlohr Bueso wrote:
> > As such, the following restores the behavior of the ticket locks and 'fixes'
> > (or hides?) the bug in sems. Naturally incorrect approach:
> >
> > @@
Hi Peter,
On Fri, May 20, 2016 at 01:58:19PM +0200, Peter Zijlstra wrote:
> On Thu, May 19, 2016 at 10:39:26PM -0700, Davidlohr Bueso wrote:
> > As such, the following restores the behavior of the ticket locks and 'fixes'
> > (or hides?) the bug in sems. Naturally incorrect approach:
> >
> > @@
From: Christian König
Fence contexts are created on the fly (for example) by the GPU scheduler used
in the amdgpu driver as a result of an userspace request. Because of this
userspace could in theory force a wrap around of the 32bit context number
if it doesn't behave
From: Christian König
Fence contexts are created on the fly (for example) by the GPU scheduler used
in the amdgpu driver as a result of an userspace request. Because of this
userspace could in theory force a wrap around of the 32bit context number
if it doesn't behave well.
Avoid this by
For the PLX local address space range registers, LAS0RR and LAS1RR, bit
0 indicates whether the local address space will be mapped to memory
space or I/O space. If mapped to I/O space, bit 1 must be set to 0, and
bits 31 to 2 form the address decoding mask, which should be -2^N mod
2^32 for a
For the PLX local address space range registers, LAS0RR and LAS1RR, bit
0 indicates whether the local address space will be mapped to memory
space or I/O space. If mapped to I/O space, bit 1 must be set to 0, and
bits 31 to 2 form the address decoding mask, which should be -2^N mod
2^32 for a
On Fri, May 20, 2016 at 02:53:04AM +, Rich Felker wrote:
> Signed-off-by: Rich Felker
> ---
Hi Rich,
please add a nice changelog describing how works the timer.
Having openhardware is really awesome and that deserves a nice
documentation. I noticed the changelog of this
On Fri, May 20, 2016 at 02:53:04AM +, Rich Felker wrote:
> Signed-off-by: Rich Felker
> ---
Hi Rich,
please add a nice changelog describing how works the timer.
Having openhardware is really awesome and that deserves a nice
documentation. I noticed the changelog of this patchset it very
On 05/18/2016 05:24 PM, Michal Hocko wrote:
>>
>> So the following patch attempts what you suggest, if I understand you
>> correctly. GFP_TRANSHUGE includes all possible flag, and then they are
>> removed as needed. I don't really think it helps code readability
>> though.
>
> yeah it is ugly
On 05/18/2016 05:24 PM, Michal Hocko wrote:
>>
>> So the following patch attempts what you suggest, if I understand you
>> correctly. GFP_TRANSHUGE includes all possible flag, and then they are
>> removed as needed. I don't really think it helps code readability
>> though.
>
> yeah it is ugly
Rename the macros in "plx9080.h" that define the offsets of registers,
following the pattern `PLX_REG_`, where `` is the register
name from the PLX PCI 9080 Data Book.
Add defines for the "Mailbox" registers, and add parameterized macros
for the mailbox registers and the DMA control registers.
Rename the macros in "plx9080.h" that define the offsets of registers,
following the pattern `PLX_REG_`, where `` is the register
name from the PLX PCI 9080 Data Book.
Add defines for the "Mailbox" registers, and add parameterized macros
for the mailbox registers and the DMA control registers.
Replace the existing macros in "plx9080.h" that define values for the
LAS0BA and LAS1BA registers. Use the prefix `PLX_LASBA_` for the
macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define
the macros.
Signed-off-by: Ian Abbott
---
Replace the existing macros in "plx9080.h" that define values for the
LAS0BA and LAS1BA registers. Use the prefix `PLX_LASBA_` for the
macros. Make use of the `BIT(x)` and `GENMASK(h,l)` macros to define
the macros.
Signed-off-by: Ian Abbott
---
drivers/staging/comedi/drivers/cb_pcidas64.c |
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