On 05/20/2016 12:22 AM, Rafael J. Wysocki wrote:
> On Thu, May 19, 2016 at 6:15 PM, Aleksey Makarov
> wrote:
>> This patchset adds support for ACPI_TABLE_UPGRADE for ARM64
Hi Catalin, Will,
Can you review these patches and consider ACKing the ARM64 part [5/5]
please?
Thank you
Aleksey Makarov
One warning should be enough to get one motivated to fix this. It is
possible that this happens more than once and so starts flooding the
output. Later the prints will be suppressed so we only get half of it.
Depending on the console system used it might not be helpfull.
Signed-off-by: Sebastian A
On 26/05/16 10:34, Maxime Coquelin wrote:
This patch fixes the following warning:
drivers/char/hw_random/stm32-rng.c: In function 'stm32_rng_read':
drivers/char/hw_random/stm32-rng.c:82:19: warning: 'sr' may be used
uninitialized in this function
Reported-
This patch introduces SOC_SINGLE_S8_TLV() macro for volume control
on chips which supports both negative and positive gains with sign
bit on a 8 bit register, Gain ranges from -128 to +127 with a
predefined step size.
Currently we only have support to DOUBLE_S8_TLV() which does not fit
for cases wh
This patch adds DT bindings required for msm8916 codec which is
integrated in msm8916 and apq8016 SOCs.
Codec IP is divided into two parts, first analog which is integrated
in pmic pm8916 and secondly digital part which is integrated into
application processor. Codec register controls are also spl
This patch adds support to msm8916-wcd codec.
msm8916-wcd codec is found in Qualcomm msm8916 and apq8016 processors.
This codec IP is split in to two parts(Digital & Analog), Analog part
is integrated in to PMIC PM8916 and the digital part is integrated into
Application processor. Register access
This patchset aims at adding msm8916-wcd codec support.
msm8916-wcd codec is found in Qualcomm msm8916 and apq8016 processors.
This codec IP is split in to two parts(Digital & Analog), Analog part
is integrated in to PMIC PM8916 and the digital part is integrated into
Application processor. Registe
On 05/20/2016 04:03 PM, Aleksey Makarov wrote:
> 'ARM Server Base Boot Requirements' [1] mentions SPCR (Serial Port Console
> Redirection Table) [2] as a mandatory ACPI table that specifies the
> configuration of serial console.
Hi Russell,
Can you review these patches and consider ACKing the pl0
On 27 May 2016, John Paul Adrian Glaubitz outgrape:
> Hi Nick!
>
> On 05/27/2016 03:19 PM, Nick Alcock wrote:
>> So I've been working on a patch series (see below) that applies GCC's
>> -fstack-protector{-all,-strong} to almost all of glibc bar the dynamic
>> linker. In trying to upstream it, one
Define separate function for configuration load register handling
to make it use by different functions later.
Signed-off-by: Shardar Shariff Md
---
Changes in v2:
- Remove unnecessary paranthesis and align to 80 characters per line
Changes in v3:
- Add separate function for config load handlin
On 26 May 2016 at 21:44, Yuyang Du wrote:
> Hi Vincent,
>
> On Thu, May 26, 2016 at 01:50:56PM +0200, Vincent Guittot wrote:
>> On 26 May 2016 at 03:14, Yuyang Du wrote:
>> > Vincent reported that the first task to a new task group's cfs_rq will
>> > be attached in attach_task_cfs_rq() and once m
After CONFIG_LOAD register programing instead of explicitly waiting for
timeout, use readx_poll_timeout() to check for register value to get
updated or wait till timeout.
Signed-off-by: Shardar Shariff Md
---
Changes in v4:
- Split timeout calculation to separate patch
Changes in v5:
- Move dis
To summarize the issue observed in error cases:
SW Flow: For i2c message transfer, packet header and data payload is
posted and then required error/packet completion interrupts are enabled
later.
HW flow: HW process the packet just after packet header is posted, if
ARB lost/NACK error occurs (SW
Hi,
Leo Li writes:
>> Leo Li writes:
> On certain platforms (e.g. ARM64) the dma_ops needs to be explicitly set
> to be able to do DMA allocations, so use the of_dma_configure() helper
> to populate the dma properties and assign an appropriate dma_ops.
>
> Signed-off-by: Raj
Hi Nick!
On 05/27/2016 03:19 PM, Nick Alcock wrote:
> So I've been working on a patch series (see below) that applies GCC's
> -fstack-protector{-all,-strong} to almost all of glibc bar the dynamic
> linker. In trying to upstream it, one review commenter queried one
> SPARC-specific patch in the se
Add a new USB Phy driver for Broadcom STB SoCs. This driver
supports all Broadcom STB ARM SoCs. This driver in combination
with the generic ohci, ehci and xhci platform drivers will enable
USB1.1, USB2.0 and USB3.0 support. This Phy driver also supports
the Broadcom UDC gadget driver.
Signed-off-b
Add Broadcom USB PHY driver for Broadcom STB SoCs. This driver in
combination with the generic ohci, ehci and xhci platform drivers
will enable USB1.1, USB2.0 and USB3.0 support.
NOTE: An unrelated patch is in the pipline to move the file
drivers/soc/brcmstb/common.c to drivers/soc/bcm/brcmstb/com
Signed-off-by: Al Cooper
---
drivers/soc/brcmstb/common.c| 12
include/linux/soc/brcmstb/brcmstb.h | 10 ++
2 files changed, 22 insertions(+)
diff --git a/drivers/soc/brcmstb/common.c b/drivers/soc/brcmstb/common.c
index 94e7335..454f4c2 100644
--- a/drivers/soc/brcm
On 27/05/2016 14:18, Hans Verkuil wrote:
> On 05/27/2016 02:52 PM, Nick Dyer wrote:
>> On 27/05/2016 13:38, Hans Verkuil wrote:
>>> On 05/04/2016 07:07 PM, Nick Dyer wrote:
+V4L2_PIX_FMT_YS16
+Grey-scale image
+
+
+Description
+
+This is a sign
On Wednesday 25 May 2016 03:36 PM, Arnd Bergmann wrote:
On Wednesday, May 25, 2016 7:35:17 AM CEST Sudip Mukherjee wrote:
On Tuesday 24 May 2016 02:05 AM, Arnd Bergmann wrote:
On Monday, May 23, 2016 6:14:08 PM CEST Sudip Mukherjee wrote:
We have been getting build warning about:
drivers/char/
Hi Moritz,
On Thu, 26 May 2016 10:28:48 -0700
Moritz Fischer wrote:
> Hi Boris,
>
> On Thu, May 26, 2016 at 1:04 AM, Boris Brezillon
> wrote:
>
> > I think the MTD partition -> nvmem connection could benefit to non-OTP
> > partitions too.
>
> Yeah, I thought about that, too. Would you use
On 05/25/2016 01:39 AM, Shuah Khan wrote:
> Media Device Allocator API to allows multiple drivers share a media device.
> Using this API, drivers can allocate a media device with the shared struct
> device as the key. Once the media device is allocated by a driver, other
> drivers can get a referen
On Friday 27 May 2016 15:05:54 Thorsten Leemhuis wrote:
> Pali Rohár wrote on 27.05.2016 12:45:
> > […]
> > Looks like there are two different problems with dell-smm-hwmon
> > driver: 1) Fan speed going randomly up and down without system
> > freeze […]
> > So for problem 1) I need to know:
> >
>
[Resent with fixed address for sparclinux@; sorry!]
So I've been working on a patch series (see below) that applies GCC's
-fstack-protector{-all,-strong} to almost all of glibc bar the dynamic
linker. In trying to upstream it, one review commenter queried one
SPARC-specific patch in the series; th
On 05/27/2016 02:52 PM, Nick Dyer wrote:
> On 27/05/2016 13:38, Hans Verkuil wrote:
>> On 05/04/2016 07:07 PM, Nick Dyer wrote:
>>> +V4L2_PIX_FMT_YS16
>>> +Grey-scale image
>>> +
>>> +
>>> +Description
>>> +
>>> +This is a signed grey-scale image with a depth of 16 bits per
>>>
On 05/25/2016 06:06 PM, Peter Griffin wrote:
XP70 slim core is used as a basis for many IPs in the STi
chipsets such as fdma, display, and demux. To avoid
duplicating the elf loading code in each device driver
an xp70 rproc driver has been created.
This driver is designed to be used by other d
On Mon 23-05-16 20:29:29, Ebru Akagunduz wrote:
> On Mon, May 23, 2016 at 08:14:08PM +0300, Ebru Akagunduz wrote:
> > This patch series removes duplication of included header
> > and fixes locking inconsistency in khugepaged swapin
> >
> > Ebru Akagunduz (3):
> > mm, thp: remove duplication of i
gcc is apparently unablel to track the state of the local 'resp_v2'
variable across the kzalloc() function, and warns about the response
variable being used without an initialization:
drivers/net/wireless/intel/iwlwifi/mvm/nvm.c: In function ‘iwl_mvm_update_mcc’:
drivers/net/wireless/intel/iwlwifi
Pali Rohár wrote on 27.05.2016 12:45:
> […]
> Looks like there are two different problems with dell-smm-hwmon driver:
> 1) Fan speed going randomly up and down without system freeze
> […]
> So for problem 1) I need to know:
>
> * Is it regression? […]
Yes, it is known to be a regression from f989
On Fri, May 27, 2016 at 12:49:11PM +0200, Arnd Bergmann wrote:
> On Friday, May 27, 2016 10:30:52 AM CEST Catalin Marinas wrote:
> > On Fri, May 27, 2016 at 10:42:59AM +0200, Arnd Bergmann wrote:
> > > On Friday, May 27, 2016 8:03:57 AM CEST Heiko Carstens wrote:
> > > > > > > > Cost wise, this see
Moving Hynix specific initialization into nand_hynix.c. This is part
of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/nand_base.c | 108 ++
drivers
Now that struct nand_chip embeds an mtd_info object we can get rid of the
mtd parameter and extract it from the chip parameter with the nand_to_mtd()
helper.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/nand_base.c | 56
1 file changed, 30 inse
Moving Micron specific initialization into nand_micron.c. This is part
of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/nand_base.c | 31 +---
drivers/mtd/nand/nand_ids.c
Moving AMD/Spansion specific initialization into nand_amd.c. This is part
of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile| 1 +
drivers/mtd/nand/nand_amd.c | 60
driv
Auto-detection functions are passed a busw parameter to retrieve the actual
NAND bus width and eventually set the correct value in chip->options.
Rework the nand_get_flash_type() function to get rid of this extra
parameter and let detection code directly set the NAND_BUSWIDTH_16 flag in
chip->optio
Hello,
This patch series is a step forward in supporting vendor-specific
functionalities.
This series is mainly moving vendor-specific initialization or
detection code out of the core, but also introduces an infrastructure
allowing support for vendor-specific features.
While those features might
The only caller of nand_get_flash_type() (nand_scan_ident()) actually
don't use the returned nand_flash_dev pointer except for converting it to
to an error code.
Rename this function nand_detect() and make it return an integer.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/nand_base.c | 19
Moving Macronix specific initialization into nand_macronix.c. This is part
of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile| 1 +
drivers/mtd/nand/nand_base.c | 11 ---
drivers/mtd/nand/nand_ids.c
MTD_NAND_IDS is selected by MTD_NAND, which makes it useless. Remove the
Kconfig option and link nand_ids.o into the nand.o object file.
Doing that also prevents adding an extra nand_ids.ko module when MTD_NAND
is activated as a module.
Signed-off-by: Boris Brezillon
---
arch/cris/arch-v32/drive
A lot of NANDs are implementing generic features in a non-generic way, or
are providing advanced auto-detection logic where the NAND ID bytes meaning
changes with the NAND generation.
Providing this vendor specific initialization step will allow us to get rid
of the full ids in the nand_ids table
Moving Samsung specific initialization into nand_samsung.c. This is part
of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/nand_base.c| 52 ++--
drivers/mtd/nand/na
Moving Hynix specific initialization into nand_toshiba.c. This is part
of the "separate vendor specific code from core" cleanup process.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/nand_base.c| 19 ++---
drivers/mtd/nand/nand_ids.c
On 05/27/2016 02:17 PM, Jon Hunter wrote:
>
> On 27/05/16 12:46, Krzysztof Kozlowski wrote:
>> On 05/27/2016 12:28 PM, Jon Hunter wrote:
>>> Hi Krzysztof,
>>>
>>> On 27/05/16 09:37, Krzysztof Kozlowski wrote:
>>>
>>> ...
>>>
Indeed I was struggling with similar issue in bq27x00_battery. The i
Hi,
William Wu writes:
> Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
> which specifies whether the USB2.0 PHY provides a free-running
> PHY clock, which is active when the clock control input is active.
>
> Signed-off-by: William Wu
can you rebase on top of my testing/next? We'
From: Hans de Goede
On some nand controllers with hw-ecc the controller code wants to know
the ecc strength and size and having these as 0, 0 is not accepted.
Specifying these in devicetree is possible but undesirable as the nand
may be different in different production runs of the same board, s
On 05/04/2016 07:07 PM, Nick Dyer wrote:
> There are different datatypes available from a maXTouch chip. Add
> support to retrieve reference data as well.
>
> Signed-off-by: Nick Dyer
> ---
> drivers/input/touchscreen/atmel_mxt_ts.c | 66
> +++-
> 1 file changed, 56
Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/nand_base.c | 55
include/linux/mtd/nand.h | 13 +++
2 files changed, 43 insertions(+), 2
The current NAND ID detection in nand_hynix.c is not handling the
different scheme used by Hynix, thus forcing developers to add new
entries in the nand_ids table each time they want to support a new MLC
NAND.
Enhance the detection logic to handle all known formats. This does not
necessarily mean
All Hynix MLC NANDs using the produced with the 1X nm process support
read-retry.
This read retry implementation should also be reusable for other Hynix
NANDs, but the method to retrieve the read-retry parameters from the
read-retry OTP area might change a bit (some NANDs are even using a fixed
set
Hi Nick,
On 05/04/2016 07:07 PM, Nick Dyer wrote:
> Register a video device to output T37 diagnostic data.
>
> Signed-off-by: Nick Dyer
> ---
> drivers/input/touchscreen/Kconfig| 2 +
> drivers/input/touchscreen/atmel_mxt_ts.c | 271
> +++
> 2 files change
On 27/05/2016 13:38, Hans Verkuil wrote:
> On 05/04/2016 07:07 PM, Nick Dyer wrote:
>> +V4L2_PIX_FMT_YS16
>> +Grey-scale image
>> +
>> +
>> +Description
>> +
>> +This is a signed grey-scale image with a depth of 16 bits per
>> +pixel. The most significant byte is stored at highe
Lengthy output of sysrq-w may take a lot of time on slow serial console.
Currently we reset NMI-watchdog on the current CPU to avoid softlockup.
Sometimes this doesn't work since watchdog might trigger on the other
CPU which is waiting for an IPI to proceed.
Reset watchdog on all CPUs to prevent s
On 26/05/16 18:01, Dmitry Osipenko wrote:
> On 26.05.2016 18:27, Jon Hunter wrote:
>> On 26/05/16 15:57, Dmitry Osipenko wrote:
...
>>> That's how I see it:
>>>
>>> +--+
>>> |CPU 0 |
>>> +---+
On 05/04/2016 07:07 PM, Nick Dyer wrote:
> This will be used for output of raw touch data.
>
> Signed-off-by: Nick Dyer
> ---
> Documentation/DocBook/media/v4l/pixfmt-ys16.xml | 79
> +
> Documentation/DocBook/media/v4l/pixfmt.xml | 1 +
> drivers/media/v4l2-core/v
Hi,
On Thu, May 26, 2016 at 11:43:51AM -0700, Yang Shi wrote:
> The upstream commit 1771c6e1a567ea0ba20a4ffe68a1419fd8ef
> ("x86/kasan: instrument user memory access API") added KASAN instrument to
> x86 user memory access API, so added such instrument to ARM64 too.
>
> Tested by test_kasan m
On Thursday, May 26, 2016 10:26:50 PM CEST Linus Torvalds wrote:
> On Thu, May 26, 2016 at 1:33 PM, Michal Marek wrote:
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild.git kbuild
>
> This pull results in new warnings.
>
> I get new "may be uninitialized" warnings now for me
The action 'check for winner' and 'download firmware' should be an
atomic action. This is true for btmrvl driver but not mwmfiex, which
cause firmware download to fail when the following scenario happens:
1) mwifiex check winner status: true
2) btmrvl check winner status: true, and start downloadi
[+Lorenzo]
On 20/05/16 11:29, Shawn Lin wrote:
> RK3399 has a PCIe controller which can be used as Root Complex.
> This driver supports a PCIe controller as Root Complex mode.
>
> Signed-off-by: Shawn Lin
> ---
>
> drivers/pci/host/Kconfig | 12 +
> drivers/pci/host/Makefile|
On 2016/5/26 0:54, Jaegeuk Kim wrote:
> Hi Yunlong,
>
> Do we have a bug report in terms of this?
>
Hi Kim,
I found the old following patch, you have mentioned one reason why "nid !=
nid_of_node(page)" in
that commit message.
http://git.kernel.org/cgit/linux/kernel/git/jaegeuk/f2fs.git/com
On Thu, May 26, 2016 at 10:54:16PM -0700, Stefan Agner wrote:
> On 2016-05-26 02:11, Alexander Stein wrote:
> > This needs to be a flat cache. See
> > https://lists.freedesktop.org/archives/dri-devel/2016-January/099121.html
> > or https://lkml.org/lkml/2016/3/24/281
> > max_register also needs an
On 27/05/16 12:46, Krzysztof Kozlowski wrote:
> On 05/27/2016 12:28 PM, Jon Hunter wrote:
>> Hi Krzysztof,
>>
>> On 27/05/16 09:37, Krzysztof Kozlowski wrote:
>>
>> ...
>>
>>> Indeed I was struggling with similar issue in bq27x00_battery. The issue
>>> was introduced by... me :( when moving the o
On 22/05/2016 13:50, Pali Rohár wrote:
> This patch exports standard hwmon pwmX_enable sysfs attribute for enabling
> or disabling automatic fan control by BIOS. Standard value "1" is for
> disabling automatic BIOS fan control and value "2" for enabling.
>
> Currently there is no way to check if B
On 27/05/16 07:55, Daeseok Youn wrote:
> The 'ch_intr_rx' variable was used only for increasing.
> So the 'ch_intr_rx' variable is not useful for this driver.
>
> Signed-off-by: Daeseok Youn
> ---
> drivers/staging/dgnc/dgnc_cls.c| 1 -
> drivers/staging/dgnc/dgnc_driver.h | 2 --
> drivers/
On 27/05/16 07:53, Daeseok Youn wrote:
> The 'intr_modem' variable was used only for increasing.
> So the 'intr_modem' variable is not useful for this driver.
>
> Signed-off-by: Daeseok Youn
> ---
> drivers/staging/dgnc/dgnc_cls.c| 1 -
> drivers/staging/dgnc/dgnc_driver.h | 1 -
> drivers/s
Hello.
On 5/27/2016 2:31 PM, William Wu wrote:
This patch documents the device tree documentation required for
Documents the documentation? :-)
Rockchip USB3.0 core wrapper consist of USB3.0 IP from Synopsys.
Consisting?
It could operate in device mode (SS, HS, FS) and host
mode (
On 27/05/16 07:52, Daeseok Youn wrote:
> The 'intr_count' variable was used only for increasing.
> So the 'intr_count' variable is not useful for this driver.
>
> Signed-off-by: Daeseok Youn
> ---
> drivers/staging/dgnc/dgnc_cls.c| 2 --
> drivers/staging/dgnc/dgnc_driver.h | 1 -
> drivers/
Hi,
On Thu, May 26, 2016 at 04:44:02PM -0500, Rob Landley wrote:
> As far as I know, we're the first nommu SMP implementation in Linux.
According to hearsay, thou shall be called Buzz Aldrin, Blackfin is
Neil Armstrong.
Regards
afzal
Bring some consistency by:
1. Replacing fixed-space indentation of structure members with just
tabs.
2. Remove indentation in declaration of local variable between type and
name. Driver was mixing usage of such indentation and lack of it.
When removing indentation, reorder variables in
On 05/27/2016 12:28 PM, Jon Hunter wrote:
> Hi Krzysztof,
>
> On 27/05/16 09:37, Krzysztof Kozlowski wrote:
>
> ...
>
>> Indeed I was struggling with similar issue in bq27x00_battery. The issue
>> was introduced by... me :( when moving the ownership of power supply
>> structure from driver to t
We observed some crazy apps on Android set their comm to unprintable
string. For example:
# cat /proc/10607/task/*/comm
tencent.qqmusic
...
Binder_2
日志输出线 <-- Chinese word 'log output thread'
WifiManager
...
'perf data convert' fails to convert perf.data with such string to CTF for
This patch documents the device tree documentation required for
Rockchip USB3.0 core wrapper consist of USB3.0 IP from Synopsys.
It could operate in device mode (SS, HS, FS) and host
mode (SS, HS, FS, LS).
Signed-off-by: William Wu
---
Changes in v3:
- add dwc3 address (Felipe)
Changes in v2:
-
On Thu, May 26, 2016 at 09:16:21PM -0400, Rich Felker wrote:
> Would you prefer I continue to submit this driver with new versions of
> the patch series, or separate it out for further review on its own?
It would be clearer to submit it separately.
signature.asc
Description: PGP signature
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.
Signed-off-by: William Wu
---
Changes in v3:
- None
Changes in v2:
- None
Documentation/devicetree/bindi
This series add support for rockchip dwc3 driver,
and add additional optional properties for specific
platforms (e.g., rockchip platform).
William Wu (5):
usb: dwc3: of-simple: add compatible for rockchip
usb: dwc3: add dis_u2_freeclk_exists_quirk
usb: dwc3: add phyif_utmi_quirk
usb: dwc3:
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.
Signed-off-by: William Wu
---
Changes in v3:
- None
Changes in v2:
- None
Documentation/devicetree/bindi
Add a quirk to configure the core to support the
UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
interface is hardware property, and it's platform
dependent. Normall, the PHYIf can be configured
during coreconsultant. But for some specific usb
cores(e.g. rk3399 soc dwc3), the default PHYIf
conf
Rockchip platform merely enable usb3 clocks and
populate its children. So we can use this generic
glue layer to support Rockchip dwc3.
Signed-off-by: William Wu
---
Changes in v3:
- None
Changes in v2:
- sort the list of_dwc3_simple_match (Doug)
drivers/usb/dwc3/dwc3-of-simple.c | 1 +
1 file
Hello,
I'm trying to understand how this value has been chosen.
Was it arbitrary, or did it come up after some rationale?
If alter it to a lower value like 30 (or 60), and a piece of third
party code hung in D state triggers the kernel hung task complain
message, can I still report this as an iss
So I've been working on a patch series (see below) that applies GCC's
-fstack-protector{-all,-strong} to almost all of glibc bar the dynamic
linker. In trying to upstream it, one review commenter queried one
SPARC-specific patch in the series; the absence of this patch triggers a
BUG in the SPARC k
And here again. Get rid of the mm_users check because it is not
reliable.
---
>From 7681e91cba6bcd45f9ebc5d2dcee3df06c687296 Mon Sep 17 00:00:00 2001
From: Michal Hocko
Date: Wed, 25 May 2016 19:50:34 +0200
Subject: [PATCH] mm, oom_adj: make sure processes sharing mm have same view of
oom_score_a
On Tue, May 03, 2016 at 03:45:43PM -0300, Erico Nunes wrote:
> i2c-dev had never moved away from the older register_chrdev interface to
> implement its char device registration. The register_chrdev API has the
> limitation of enabling only up to 256 i2c-dev busses to exist.
>
> Large platforms wit
On 05/27/2016, 01:06 PM, Jiri Slaby wrote:
> On 10/18/2015, 04:05 AM, Greg Kroah-Hartman wrote:
>> 3.14-stable review patch. If anyone has any objections, please let me know.
>>
>> --
>>
>> From: Dave Airlie
>>
>> commit 69e5d3f893e19613486f300fd6e631810338aa4b upstream.
>>
>> If
Now some cipher hardware engines prefer to handle bulk block rather than one
sector (512 bytes) created by dm-crypt, cause these cipher engines can handle
the intermediate values (IV) by themselves in one bulk block. This means we
can increase the size of the request by merging request rather than
In now dm-crypt code, it is ineffective to map one segment (always one
sector) of one bio with just only one scatterlist at one time for hardware
crypto engine. Especially for some encryption mode (like ecb or xts mode)
cooperating with the crypto engine, they just need one initial IV or null
IV in
In dm-crypt, it need to map one bio to scatterlist for improving the
hardware engine encryption efficiency. Thus this patch introduces the
blk_bio_map_sg() function to map one bio with scatterlists.
For avoiding the duplicated code in __blk_bios_map_sg() function, add
one parameter to distinguish
On Sat, May 21, 2016 at 11:14:49PM +0300, Alexey Dobriyan wrote:
> lockless_dereference() is supposed to take pointer not integer.
>
> Signed-off-by: Alexey Dobriyan
> ---
>
> include/linux/seqlock.h |4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> --- a/include/linux/seqlock
This patchset will check if the cipher can support bulk mode, then dm-crypt
will handle different ways to send requests to crypto layer according to
cipher mode. For bulk mode, we can use sg table to map the whole bio and
send all scatterlists of one bio to crypto engine to encrypt or decrypt,
whic
On Fri, May 27, 2016 at 6:55 AM, Vitaly Wool wrote:
> Hello Dan,
>
> On Fri, May 20, 2016 at 2:39 PM, Dan Streetman wrote:
>
>
>>> +static int z3fold_compact_page(struct z3fold_header *zhdr)
>>> +{
>>> + struct page *page = virt_to_page(zhdr);
>>> + void *beg = zhdr;
>>> +
>>> +
>>>
Hello,
After commit, "b968091 security_d_instantiate(): move to the point prior to
attaching dentry to inode", booting on system with
systemd and security smack, following kernel panic occurs.
---
Unable to handle kernel paging request at virtual address fff4
pgd = eda74000
[fff4] *pgd=6
I have updated the patch to not rely on the mm_users check because it is
not reliable as pointed by Tetsuo and we really want this function to be
reliable. I do not have a good and reliable way to check for existence
of external users sharing the mm so we are checking the whole list
unconditionally
On 10/18/2015, 04:05 AM, Greg Kroah-Hartman wrote:
> 3.14-stable review patch. If anyone has any objections, please let me know.
>
> --
>
> From: Dave Airlie
>
> commit 69e5d3f893e19613486f300fd6e631810338aa4b upstream.
>
> If the server isn't new enough to give us state, repo
On 05/26/2016 09:43 PM, Yang Shi wrote:
> The upstream commit 1771c6e1a567ea0ba20a4ffe68a1419fd8ef
> ("x86/kasan: instrument user memory access API") added KASAN instrument to
> x86 user memory access API, so added such instrument to ARM64 too.
>
> Tested by test_kasan module.
>
> Signed-of
Quentin ran into this bug:
WARNING: CPU: 64 PID: 10085 at fs/sysfs/dir.c:31 sysfs_warn_dup+0x65/0x80
sysfs: cannot create duplicate filename '/devices/virtual/block/nbd3/pid'
Modules linked in: nbd
CPU: 64 PID: 10085 Comm: qemu-nbd Tainted: G D 4.6.0+ #7
8820330b
Hello Dan,
On Fri, May 20, 2016 at 2:39 PM, Dan Streetman wrote:
>> +static int z3fold_compact_page(struct z3fold_header *zhdr)
>> +{
>> + struct page *page = virt_to_page(zhdr);
>> + void *beg = zhdr;
>> +
>> +
>> + if (!test_bit(MIDDLE_CHUNK_MAPPED, &page->private) &&
>> +
On 2016年05月27日 00:50, Peter Zijlstra wrote:
On Wed, May 25, 2016 at 04:18:03PM +0800, Pan Xinhui wrote:
_testspinlcok__pv-qspinlcok_
|futex hash | 556370 ops | 629634 ops |
|futex lock-pi | 362 ops | 367 ops
[+ Rafael]
On Thu, May 26, 2016 at 01:49:23PM -0700, Duc Dang wrote:
> Hi Lorenzo,
>
> On Thu, May 26, 2016 at 5:34 AM, Lorenzo Pieralisi
> wrote:
> > Hi Duc,
> >
> > On Wed, May 25, 2016 at 04:13:35PM -0700, Duc Dang wrote:
> >> On Thu, Feb 25, 2016 at 9:38 AM, Lorenzo Pieralisi
> >> wrote:
>
On Friday, May 27, 2016 10:30:52 AM CEST Catalin Marinas wrote:
> On Fri, May 27, 2016 at 10:42:59AM +0200, Arnd Bergmann wrote:
> > On Friday, May 27, 2016 8:03:57 AM CEST Heiko Carstens wrote:
> > > > > > > Cost wise, this seems like it all cancels out in the end, but what
> > > > > > > do I know
Add a PHY provider driver for the rk3399 SoC Type-c PHY. The USB
Type-C PHY is designed to support the USB3 and DP applications. The
PHY basically has two main components: USB3 and DisplyPort. USB3
operates in SuperSpeed mode and the DP can operate at RBR, HBR and
HBR2 data rates.
Signed-off-by: C
Add support for cdn DP controller which is embedded in the rk3399
SoCs. The DP is compliant with DisplayPort Specification,
Version 1.3, This IP is compatible with the rockchip type-c PHY IP.
There is a uCPU in DP controller, it need a firmware to work,
please put the firmware file to /lib/firmware
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong
---
.../bindings/display/rockchip/cdn-dp-rockchip.txt | 57 ++
1 file changed, 57 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/rockchip/cdn-
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