[adding Marc to Cc]
On Fri, Jul 29, 2016 at 11:23:11AM +0200, Rafał Miłecki wrote:
> From: Rafał Miłecki
>
> On some devices using arch code for reading clock rate doesn't work. So
> far the only option was to specify clock-frequency in a DT. This works
> only if a clock frequency doesn't have t
It doesn't trim just symbols that are totally unused in-tree - it trims the
symbols unused by any in-tree modules actually built. If you've done
a 'make localmodconfig' and only build a hundred or so modules, it's pretty
likely that your out-of-tree module will come up lacking something...
Hopefu
Hi, Bibby:
On Fri, 2016-07-29 at 17:04 +0800, Bibby Hsieh wrote:
> From: Daniel Kurtz
>
> It is not actually useful to a mtk plane to know its zpos/index, so just
> remove this field.
>
> This let's us completely remove struct mtk_drm_plane in a follow up patch.
'let's us'? My English is not a
Hi,
On 25/07/16 20:54, Maxime Ripard wrote:
> On Wed, Jul 20, 2016 at 10:03:16AM +0200, LABBE Corentin wrote:
>> This patch add support for sun8i-emac ethernet MAC hardware.
>> It could be found in Allwinner H3/A83T/A64 SoCs.
>>
>> It supports 10/100/1000 Mbit/s speed with half/full duplex.
>> It
On Thursday, July 28, 2016 2:22:02 PM CEST Linus Torvalds wrote:
> On Thu, Jul 28, 2016 at 12:03 PM, Linus Torvalds
> wrote:
> >
> > And the new warnings were actually not so much due to new code in 4.7,
> > as the fact that in between I did a user-space upgrade, and gcc 6.1.1
> > has regressed to
> > In the Project Zero Stagefright post
> > (http://googleprojectzero.blogspot.com/2015/09/stagefrightened.html)
> > ,
> > we see that the linear allocation of memory combined with the low
> > number of bits in the initial mmap offset resulted in a much more
> > predictable layout which aided the
On Thu, Jul 28, 2016 at 11:40:55PM -0700, Josh Triplett wrote:
[snip]
>
> I'd welcome any feedback, whether on the interface and workflow, the
> internals and collaboration, ideas on presenting diffs of patch series,
> or anything else.
>
This looks awesome!
I've been working on some similar st
Hello Linus,
please pull
git://git.kernel.org/pub/scm/linux/kernel/git/egtvedt/linux-avr32.git for-linus
to receive the following AVR32 update for 4.8
Hans-Christian Noren Egtvedt (2):
avr32: wire up preadv2 and pwritev2 syscalls
avr32: fixup code style in unistd.h and syscall_table
Originally, EC driver stops handling both events and transactions in
acpi_ec_block_transactions(), and restarts to handle transactions in
acpi_ec_unblock_transactions_early(), restarts to handle both events and
transactions in acpi_ec_unblock_transactions().
Thus, the event handling is actually st
On Wed, Jul 27, 2016 at 04:42:02PM -0700, Mitchel Humpherys wrote:
> The following patch to the ARM SMMU driver:
>
> commit d346180e70b91b3d5a1ae7e5603e65593d4622bc
> Author: Robin Murphy
> Date: Tue Jan 26 18:06:34 2016 +
>
> iommu/arm-smmu: Treat all device transa
It is reported that on some platforms, resume speed is not fast. The cause
is: in noirq stage, EC driver is working in polling mode, and each state
machine advancement requires a context switch.
The context switch is not necessary to the EC driver's polling mode. This
patch implements PM hooks to
There are 2 improvements can be done to the EC driver to make system
suspend/resume faster:
1. Automatically use busy polling mode when noirq is entered
2. Disallow event handling (SCI_EVT/_Qxx) during suspend/resume period
This patchset achieves such performance tuning on top of a recent
workarou
On 07/27/2016 05:03 AM, Limonciello, Mario wrote:
>> -Original Message-
>> From: Limonciello, Mario
>> Sent: Tuesday, July 19, 2016 9:48 AM
>> To: 'Jean Delvare' ; Hung, Allen
>> Cc: Jean Delvare ; linux-kernel@vger.kernel.org
>> Subject: RE: [PATCH 2/2] dmi-id: add dmi/id/oem group for ex
On 07/29/2016 11:23 AM, One Thousand Gnomes wrote:
>> Serial consoles are already polled for output. So nothing should
>> care until userspace starts, and the full serial driver initializes.
>
> At which point it hangs
Yep, because the IRQ is never firing. It isn't screaming at all. :)
>> So I
Hi Bibby,
Am Freitag, den 29.07.2016, 17:09 +0800 schrieb Bibby Hsieh:
> To support HDMI 4K resolution, mmsys need clcok
> mm_sel to be 400MHz.
>
> The board .dts file should override the clock rate
> property with the higher VENCPLL frequency the board
> supports HDMI 4K resolution.
>
> Signed-
Signed-off-by: Tiffany Lin
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c | 83 ++--
1 file changed, 78 insertions(+), 5 deletions(-)
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c
b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c
index 3ed3f2d..8f0
This option enables Boot Time Preservation between Bootloader and
Linux Kernel. It is based on the idea that the Bootloader (or any
other early firmware) will start the HW Timer and Linux Kernel will
count the time starting with the cycles elapsed since timer start.
Signed-off-by: Bogdan Mirea
--
On Fri, 29 Jul 2016, Julia Lawall wrote:
> On Fri, 29 Jul 2016, Sebastian Ott wrote:
> > On Fri, 29 Jul 2016, Amitoj Kaur Chawla wrote:
> > > Remove unnecessary error handling because the only failure value that
> > > can be returned is NULL and so the test can never be true.
> > >
> > > The Coccin
Hi Thomas,
On Tue, Jul 19, 2016 at 12:40:14PM +0200, Thomas Gleixner wrote:
> On Tue, 19 Jul 2016, Chen Yu wrote:
> > On 2016年07月19日 16:36, Thomas Gleixner wrote:
> > > On Tue, 19 Jul 2016, Chen Yu wrote:
> > > > Further investigation shows that, the problem is caused by setting
> > > > /sys/power
On Thu, Jul 28, 2016 at 05:03:52PM -0700, Matt Roper wrote:
> This is completely untested (and probably horribly broken/buggy), but
> here's a quick mockup of the general approach I was thinking for
> ensuring DDB & WM's can be updated together while ensuring the
> three-step pipe flushing process
Hi All,
I have a doubt regarding the workqueue scheduling.
I am using the workqueue for processing the Rx Interrupt data. I am
calling schedule_work() on receiving the Rx interrupt from hardware.
I calculated the time between calling the schedule_work() and
workqueue task actually getting execut
Hi,
On Thu, Jul 28, 2016 at 07:30:39PM -0700, Kees Cook wrote:
> The targets for lkdtm's objcopy were missing which caused them to always
> be rebuilt. This corrects the problem.
>
> Additionally, commit f8fa70f392fa ("arm64: localise Image objcopy flags")
> has landed now, so this removes the wo
On Thu, 28 Jul 2016 11:50:41 +0200, Benjamin Tissoires wrote:
> i801 mixes hexadecimal and decimal values for defining bits. However,
> we have a nice BIT() macro for this exact purpose.
Looks good to me. But maybe we could convert all the FEATURE_* defines
as well?
> No functional changes, clean
The oem strings in DMI system identification information of the BIOS have
been parsed and stored as dmi devices in dmi_scan.c but they are not
exported to userspace via sysfs.
The patch intends to export oem strings to sysfs device /sys/class/dmi/id.
As the number of oem strings are dynamic, a gro
On Thursday, July 28, 2016 3:18:26 PM CEST LABBE Corentin wrote:
>
> I will reworked locking and it seems that no locking is necessary.
> I have added the following comment about the locking strategy:
>
> /* Locking strategy:
> * RX queue does not need any lock since only sun8i_emac_poll() acces
> Serial consoles are already polled for output. So nothing should
> care until userspace starts, and the full serial driver initializes.
At which point it hangs
> So I suspect either "irqfixup" or "irqpoll" would handle this for you.
> If not I am certain a small tweak to some of that code woul
From: Rafał Miłecki
On some devices using arch code for reading clock rate doesn't work. So
far the only option was to specify clock-frequency in a DT. This works
only if a clock frequency doesn't have to be calculated on runtime.
On BCM53573 SoC (with Cortex-A7) there is ILP clock that needs it
On 29 July 2016 at 06:14, Shawn Lin wrote:
>
> We need to enable the power domain manually while probing as the
> power policy will turn off the pd which is not referenced. Otherwise
I assume you are going to use the generic PM domain (genpd)?
If so, this statement isn't entirely correct.
As a m
On Thu, 28 Jul 2016 11:50:40 +0200, Benjamin Tissoires wrote:
> No functional changes, just typos and remove unused #define.
>
> Signed-off-by: Benjamin Tissoires
> ---
> drivers/i2c/busses/i2c-i801.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/i2c/bus
Salut Benjamin,
On Thu, 28 Jul 2016 11:50:39 +0200, Benjamin Tissoires wrote:
> struct host_notify contains its own workqueue, so there is a race when
> the adapter gets removed:
> - the adapter schedules a notification
> - the notification is on hold
> - the adapter gets removed and all its child
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Email: prodawez...@yo
To support HDMI 4K resolution, mmsys need clcok
mm_sel to be 400MHz.
The board .dts file should override the clock rate
property with the higher VENCPLL frequency the board
supports HDMI 4K resolution.
Signed-off-by: Bibby Hsieh
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi |2 ++
1 file cha
To properly implement atomic w/ runtime pm, we move
drm_atomic_helper_commit_modeset_enables() above
drm_atomic_helper_commit_planes() to ensure CRTCs are enabled before
modifying plane registers, and set active_only to true to filter out
plane update notifications when the CRTC is disabled.
Accor
We pass xen_vcpu_id mapping information to hypercalls which require
uint32_t type so it would be cleaner to have it as uint32_t. The
initializer to -1 can be dropped as we always do the mapping before using
it and we never check the 'not set' value anyway.
Signed-off-by: Vitaly Kuznetsov
---
Chan
From: Daniel Kurtz
Use the framebuffer's format to compute its cpp, and use it when
calculating the address shift value.
Signed-off-by: Bibby Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_plane.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_d
From: Daniel Kurtz
Now that mtk_drm_plane just contains its base struct drm_plane, we can
just remove it and use struct drm_plane everywhere.
Signed-off-by: Daniel Kurtz
Signed-off-by: Bibby Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 16
drivers/gpu/drm/mediatek/m
These patches based on 4.7-rc1 to clean up unused function & variable
and use drm core function instead.
The following patches are needed to cleanly apply on top of v4.7-rc1:
- https://patchwork.kernel.org/patch/8044001/
(drm: Deal with rotation in drm_plane_helper_check_update())
- https://p
Use the core destroy_state helpers to destroy core state to ensure we don't
leak if/when more fields get added later.
Signed-off-by: Daniel Kurtz
Signed-off-by: Bibby Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c |3 +--
drivers/gpu/drm/mediatek/mtk_drm_plane.c |3 +--
2 files chan
From: Daniel Kurtz
It is not actually useful to a mtk plane to know its zpos/index, so just
remove this field.
This let's us completely remove struct mtk_drm_plane in a follow up patch.
Signed-off-by: Daniel Kurtz
Signed-off-by: Bibby Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c |2
From: Daniel Kurtz
This function no longer exists.
Signed-off-by: Daniel Kurtz
Signed-off-by: Bibby Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.h |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
index
From: Daniel Kurtz
The mtk_plane_enable is just called once by mtk_plane_atomic_update.
So, merge mtk_plane_enable into mtk_plane_atomic_update.
While we are here, also clean up the function a bit by using an fb local
variables.
Signed-off-by: Bibby Hsieh
Signed-off-by: Daniel Kurtz
---
driv
On 28/07/16 15:40, Catalin Marinas wrote:
On Wed, Jul 27, 2016 at 06:13:37PM -0400, David Long wrote:
On 07/27/2016 07:50 AM, Daniel Thompson wrote:
On 25/07/16 23:27, David Long wrote:
On 07/25/2016 01:13 PM, Catalin Marinas wrote:
The problem is that the original design was done on x86 for
From: Tomasz Nowicki
This commit provides APEI arch-specific bits for aarch64
Meanwhile,
(1)add a new subfunction "hest_ia32_init" for
"acpi_disable_cmcff" which is used by IA-32 Architecture
Corrected Machine Check (CMC).
(2)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
a gen
Hi,
Le jeudi 28 juillet 2016 à 20:47 +, Jason Cooper a écrit :
> To date, all callers of randomize_range() have set the length to 0,
> and check for a zero return value. For the current callers, the only
> way to get zero returned is if end <= start. Since they are all
> adding a constant to
David Vrabel writes:
> On 28/07/16 17:24, Vitaly Kuznetsov wrote:
>> We pass xen_vcpu_id mapping information to hypercalls which require
>> uint32_t type so it would be cleaner to have it as uint32_t. The
>> initializer to -1 can be dropped as we always do the mapping before using
>> it and we ne
On Fri, 29 Jul 2016, walter harms wrote:
>
>
> Am 29.07.2016 05:55, schrieb Andrew Donnellan:
> > Rewrite the cxl_guest_init_afu() loop in cxl_of_probe() to use
> > for_each_child_of_node() rather than a hand-coded for loop.
> >
> > Remove the useless of_node_put(afu_np) call after the loop, whe
Am 29.07.2016 05:55, schrieb Andrew Donnellan:
> Rewrite the cxl_guest_init_afu() loop in cxl_of_probe() to use
> for_each_child_of_node() rather than a hand-coded for loop.
>
> Remove the useless of_node_put(afu_np) call after the loop, where it's
> guaranteed that afu_np == NULL.
>
> Reported
On Fri, 29 Jul 2016, Sebastian Ott wrote:
> On Fri, 29 Jul 2016, Amitoj Kaur Chawla wrote:
> > Remove unnecessary error handling because the only failure value that
> > can be returned is NULL and so the test can never be true.
> >
> > The Coccinelle semantic patch used to make this change is as
On Fri, 29 Jul 2016, Amitoj Kaur Chawla wrote:
> Remove unnecessary error handling because the only failure value that
> can be returned is NULL and so the test can never be true.
>
> The Coccinelle semantic patch used to make this change is as follows:
> @@
> expression e;
> @@
>
> e = debugfs
I got a KASAN report of use-after-free:
==
BUG: KASAN: use-after-free in klist_iter_exit+0x61/0x70 at addr
8800b6581508
Read of size 8 by task trinity-c1/315
==
On 5 April 2016 at 04:06, Yakir Yang wrote:
> Hi Daniel,
>
>
> On 03/31/2016 06:15 PM, Daniel Vetter wrote:
>>
>> On Mon, Feb 15, 2016 at 07:08:05PM +0800, Yakir Yang wrote:
>>>
>>> Hi all,
>>>
>>>The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
>>> share the same IP, so a
Not to call rtl8169_update_counters() to dump tally counter when driver
is in runtime suspend state.
Calling rtl8169_update_counters() in runtime suspend state will produce
warning message "rtl_counters_cond == 1 (loop: 1000, delay: 10)".
Signed-off-by: Chunhao Lin
---
drivers/net/ethernet/real
When there is no AC power, NIC may not work after changing mac address.
Please refer to following link.
http://www.spinics.net/lists/netdev/msg356572.html
This issue is caused by runtime power management. When there is no AC
power, if we put NIC down (ifconfig down), the driver will be in runtime
v2:
use "struct device *d = &tp->pci_dev->dev" instead of "struct pci_dev *pdev =
tp->pci_dev"
v1:
This series of patches fix 3 runtime pm related issues that are listed below.
Chunhao Lin (3):
r8169:fix kernel log spam when set or get hardware wol setting.
r8169:add checking driver's runtim
NIC will be put into D3 state during runtime suspend state. When set or
get hardware wol setting, driver will write or read hardware registers.
If we set or get hardware wol setting in runtime suspend state, because
NIC will in D3 state, the hardware registers read by driver will return all
0xff. T
On Thursday 28 July 2016 11:20 PM, Grygorii Strashko wrote:
> Use of_platform_depopulate() in cpsw_remove() instead of
> of_device_unregister(), because CSPW child devices will not be
> recreated otherwise on next insmod. of_platform_depopulate() is
> correct way now as it will ensure that all step
Remove unnecessary error handling because the only failure value that
can be returned is NULL and so the test can never be true.
The Coccinelle semantic patch used to make this change is as follows:
@@
expression e;
@@
e = debugfs_create_file(...);
- if(IS_ERR(e)) { e = NULL; }
Signed-off-by:
On Thursday 28 July 2016 11:20 PM, Grygorii Strashko wrote:
> The L3 error will be generated and system will crash during unloading
> of CPSW driver if CPSW is used as module and ethX devices are down.
> This happens because CPSW can be power off by PM runtime now when ethX
> devices are down.
>
>
From: Yanjiang Jin
"if (!ret == template[i].fail)" is confusing to compilers (gcc5):
crypto/testmgr.c: In function '__test_aead':
crypto/testmgr.c:531:12: warning: logical not is only applied to the
left hand side of comparison [-Wlogical-not-parentheses]
if (!ret == template[i].fail) {
On 29/07/16 04:53, Masahiro Yamada wrote:
> Hi.
>
> I noticed my board would not work any more
> when pulling recent updates.
>
> I did "git-bisect" and I found the following commit is it.
>
> commit 1e2a7d78499ec8859d2b469051b7b80bad3b08aa
> Author: Jon Hunter
> Date: Tue Jun 7 16:12:28 201
On Thursday, July 28, 2016 5:48:41 PM CEST Andrey Smirnov wrote:
> Replace magic numbers used for L310 Prefetch Control Register
>
> Acked-by: Arnd Bergmann
> Signed-off-by: Andrey Smirnov
>
Please send the two patches the patch tracker at
http://www.arm.linux.org.uk/developer/patches/
debugfs_create_file returns NULL on error so an IS_ERR test is
incorrect here and a NULL check is required.
The Coccinelle semantic patch used to make this change is as follows:
@@
expression e;
@@
e = debugfs_create_file(...);
if(
-IS_ERR(e)
+!e
)
{
<+...
return
- PTR_ERR(e
Hi,
Robert Foss writes:
> This series should be labelled v2 instead of v1.
right, and you should also list your changes since v1.
--
balbi
signature.asc
Description: PGP signature
Hi,
robert.f...@collabora.com writes:
> From: Andrew Bresticker
>
> Enable runtime PM for the xhci-plat device so that the parent device
> may implement runtime PM.
>
> Signed-off-by: Andrew Bresticker
> Tested-by: Robert Foss
> Signed-off-by: Robert Foss
> ---
> drivers/usb/host/xhci-plat.c
On Tue, Jul 19, 2016 at 5:32 AM, Minfei Huang wrote:
> From: Minfei Huang
>
> We do a lot of memory allocation in function init_vq, and don't handle
> the allocation failure properly. Then this function will return 0,
> although initialization fails due to lacking memory. At that moment,
> kernel
On Thursday 28 July 2016 11:20 PM, Grygorii Strashko wrote:
> Fix deadlock in cpdma_ctlr_destroy() which is triggered now on
> cpsw module removal:
> cpsw_remove()
> - cpdma_ctlr_destroy()
>- spin_lock_irqsave(&ctlr->lock, flags)
>- cpdma_ctlr_stop()
> - spin_lock_irqsave(&ctlr->lock
Running LTP msgsnd06 with kmemleak gives the following:
cat /sys/kernel/debug/kmemleak
unreferenced object 0x88003c0a11f8 (size 8):
comm "msgsnd06", pid 1645, jiffies 4294672526 (age 6.549s)
hex dump (first 8 bytes):
1b 00 00 00 01 00 00 00
backtrac
On Thu, Jul 28, 2016 at 08:49:16PM +0200, Maxime Ripard wrote:
> On Thu, Jul 28, 2016 at 03:40:31PM +0200, LABBE Corentin wrote:
> > On Thu, Jul 21, 2016 at 09:55:19AM +0200, Maxime Ripard wrote:
> > > Hi,
> > >
> > > On Wed, Jul 20, 2016 at 10:03:18AM +0200, LABBE Corentin wrote:
> > > > This pat
On Thu, Jul 28, 2016 at 09:32:06PM +0200, Pavel Machek wrote:
> On Fri 2016-07-22 10:30:47, Chen Yu wrote:
> > test_resume mode is to verify if the snapshot data
> > written to swap device can be successfully restored
> > to memory. It is useful to ease the debugging process
> > on hibernation, sin
On 29/07/16 04:53, Masahiro Yamada wrote:
> Hi.
>
>
> I noticed my board would not work any more
> when pulling recent updates.
>
>
> I did "git-bisect" and I found the following commit is it.
It would help if you did post the log showing the failure.
What if you apply the following patch:
h
DT binding documentation for ISC driver.
Signed-off-by: Songjun Wu
---
Changes in v7: None
Changes in v6:
- Add "iscck" and "gck" to clock-names.
Changes in v5:
- Add clock-output-names.
Changes in v4:
- Remove the isc clock nodes.
Changes in v3:
- Remove the 'atmel,sensor-preferred'.
- Modif
Add driver for the Image Sensor Controller. It manages
incoming data from a parallel based CMOS/CCD sensor.
It has an internal image processor, also integrates a
triple channel direct memory access controller master
interface.
Signed-off-by: Songjun Wu
---
Changes in v7:
- Add enum_framesizes an
The Image Sensor Controller driver includes two parts.
1) Driver code to implement the ISC function.
2) Device tree binding documentation, it describes how
to add the ISC in device tree.
Test result with v4l-utils.
v4l2-compliance SHA : not available
Driver Info:
Driver name : atme
On Thu, Jul 28, 2016 at 09:21:47PM -0400, Martin K . Petersen wrote:
> > "James" == James Smart writes:
>
> James> This patch is good.
>
> Johannes: You were going to tweak a few things and resubmit. Please do.
Oh yes, sorry totally forgot about this one.
My bad.
--
Johannes Thumshirn
From: Aihua Zhang
the check IS_IMMUTABLE(inode) is invalid in utimes_commmon,
the inode should point to upper rather than merge.
the patch also fix the error in LTP(utimensat01).
Signed-off-by: Aihua Zhang
---
fs/utimes.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --gi
Hi Linus,
after many years I finally have some major freevxfs updated, thanks to
Krzysztof Błaszkowski:
The following changes since commit 6b15d6650c5301ce023d8df0cc3a60b1a76d377e:
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net (2016-05-31
22:28:28 -0700)
are available in the
On new rockchip platform(rk3399 etc), there have dcf controller to
do ddr frequency scaling, and this controller will implement in
arm-trust-firmware. We add a special clock-type to handle that.
Signed-off-by: Lin Huang
---
Changes in v4:
- use arm_smccc_smc() to set/read ddr rate
Changes in v3:
Signed-off-by: Lin Huang
---
Changes in v4:
-None
Changes in v3:
-None
Changes in v2:
- None
Changes in v1:
- None
include/dt-bindings/clock/rk3399-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/rk3399-cru.h
b/include/dt-bindings/clock/rk3399-cru.h
index
add ddrc clock setting, so we can do ddr frequency
scaling on rk3399 platform in future.
Signed-off-by: Lin Huang
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- remove clk_ddrc_dpll_src from critical clock list
Changes in v1:
- remove ddrc source CLK_IGNORE_UNUSED flag
- move
when in ddr frequency scaling process, vop can not do
enable or disable operation, since dcf will base on vop vblank
time to do frequency scaling and need to get vop irq if there
have vop enabled. So need register to devfreq notifier, and we can
get the dmc status. Also, when there have two vop ena
base on dfi result, we do ddr frequency scaling, register
dmc driver to devfreq framework, and use simple-ondemand
policy.
Signed-off-by: Lin Huang
---
Changes in v4:
- use arm_smccc_smc() function talk to bl31
- delete rockchip_dmc.c file and config
- delete dmc_notify
- adjust probe order
Cha
on rk3399 platform, there is dfi conroller can monitor
ddr load, base on this result, we can do ddr freqency
scaling.
Signed-off-by: Lin Huang
Acked-by: Chanwoo Choi
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- use clk_disable_unprepare and clk_enable_prepare
- remove clk_e
Hi Linus,
The following changes since commit ee40fb2948fc99096836995d4f3ddcc0efbac790:
Merge tag 'scsi-fixes' of
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi (2016-07-08 18:59:46
-0700)
are available in the git repository at:
git://git.infradead.org/users/hch/configfs.git tags/
From: Heiko Stübner
add clock flag parameter so we can pass specific clock flag
(like CLK_GET_RATE_NOCACHE etc..)to pll driver.
Signed-off-by: Heiko Stübner
Signed-off-by: Lin Huang
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- None
Changes in v1:
- None
drivers/clk/roc
rk3399 platform have dfi controller can monitor ddr load,
and dcf controller to handle ddr register so we can get the
right ddr frequency and make ddr controller happy work(which
will implement in bl31). So we do ddr frequency scaling with
following flow:
kernel
For PMD aligned (8M) hugepages, we currently allocate
all four page table levels which is wasteful. We now
allocate till PMD level only which saves memory usage
from page tables.
Also, when freeing page table for 8M hugepage backed region,
make sure we don't try to access non-existent PTE level.
On Fri, Jul 29, 2016 at 12:11:23AM -0700, Christoph Hellwig wrote:
> Both pull requests were generated using git request-pull from git
> 2.1.4.
Looks like I was tired enough to mess up the confusing arguments to
git request-pull once again. I'll resend both requests.
On Jul 29 2016 or thereabouts, Zheng, Lv wrote:
> Hi, Benjamin
>
> > From: linux-acpi-ow...@vger.kernel.org [mailto:linux-acpi-
> > ow...@vger.kernel.org] On Behalf Of Benjamin Tissoires
> > Subject: [PATCH] ACPI / button: remove pointer to old lid_sysfs on unbind
> >
> > When we removed the proc
Hi all
This series patch is for rockchip Type-C phy and DisplayPort controller
driver.
The USB Type-C PHY is designed to support the USB3 and DP applications.
The PHY basically has two main components: USB3 and DisplyPort. USB3
operates in SuperSpeed mode and the DP can operate at RBR, HBR and H
There are 2 Type-C phy on RK3399, they are almost same, except the
address of register. They support USB3.0 Type-C and DisplayPort1.3
Alt Mode on USB Type-C. Register a phy, supply it to USB3 controller
and DP controller.
Signed-off-by: Chris Zhong
Reviewed-by: Guenter Roeck
---
Changes in v8:
Add support for cdn DP controller which is embedded in the rk3399
SoCs. The DP is compliant with DisplayPort Specification,
Version 1.3, This IP is compatible with the rockchip type-c PHY IP.
There is a uCPU in DP controller, it need a firmware to work,
please put the firmware file to /lib/firmware
From: Jiri Kosina
Convert the per-device linked list into a hashtable. The primary
motivation for this change is that currently, we're not tracking all the
qdiscs in hierarchy (e.g. excluding default qdiscs), as the lookup
performed over the linked list by qdisc_match_from_root() is rather
ex
This patch adds a binding that describes the cdn DP controller for
rk3399.
Signed-off-by: Chris Zhong
Acked-by: Rob Herring
---
Changes in v8: None
Changes in v7: None
Changes in v6:
- add assigned-clocks and assigned-clock-rates
- add power-domains
Changes in v5: None
Changes in v4:
- add a
Add a PHY provider driver for the rk3399 SoC Type-c PHY. The USB
Type-C PHY is designed to support the USB3 and DP applications. The
PHY basically has two main components: USB3 and DisplyPort. USB3
operates in SuperSpeed mode and the DP can operate at RBR, HBR and
HBR2 data rates.
Signed-off-by: C
This patch adds a binding that describes the Rockchip USB Type-C PHY
for rk3399
Signed-off-by: Chris Zhong
Reviewed-by: Tomasz Figa
Reviewed-by: Kever Yang
Acked-by: Rob Herring
---
Changes in v8: None
Changes in v7: None
Changes in v6:
- add assigned-clocks and assigned-clock-rates
Changes
Add EXTCON_DISP_DP for the Display external connector. For Type-C
connector the DisplayPort can work as an Alternate Mode(VESA DisplayPort
Alt Mode on USB Type-C Standard). The Type-C support both normal
and flipped orientation, so add a property to extcon.
Signed-off-by: Chris Zhong
Signed-off-b
Le 29/07/2016 à 05:55, Andrew Donnellan a écrit :
Rewrite the cxl_guest_init_afu() loop in cxl_of_probe() to use
for_each_child_of_node() rather than a hand-coded for loop.
Remove the useless of_node_put(afu_np) call after the loop, where it's
guaranteed that afu_np == NULL.
Reported-by: SF Ma
* Rafael J. Wysocki wrote:
> > Fixes: ef0f3ed5a4ac ("x86/asm/power: Create stack frames in
> > hibernate_asm_64.S")
> > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=150021
> > Reported-by:
> > Tested-by:
> > Cc:
> > Signed-off-by: Josh Poimboeuf
>
> I've queued this up as an urgen
On 07/29/2016 06:47 AM, Zheng, Lv wrote:
Hi, Vegard
From: linux-acpi-ow...@vger.kernel.org [mailto:linux-acpi-
ow...@vger.kernel.org] On Behalf Of Vegard Nossum
Subject: [PATCH] ACPICA: cleanup method properly on error
If the call to acpi_ds_init_aml_walk() fails, then we have to undo the
walk
On Tue, Jul 26, 2016 at 09:43:47AM +0200, Quentin Schulz wrote:
> The Allwinner SoCs all have an ADC that can also act as a touchscreen
> controller and a thermal sensor. This patch adds the ADC driver which is
> based on the MFD for the same SoCs ADC.
>
> This also registers the thermal adc chann
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