On Fri, 2 Dec 2016 13:33:58 +0900
Masahiro Yamada wrote:
> Hi Boris,
>
>
> 2016-11-28 0:21 GMT+09:00 Boris Brezillon
> :
> > On Sun, 27 Nov 2016 03:05:55 +0900
> > Masahiro Yamada wrote:
> >
> >> Currently, is_erased() is called against "buf" twice, so the second
> >> call is meaningless.
On Fri, 2 Dec 2016 13:26:27 +0900
Masahiro Yamada wrote:
> Hi Boris,
>
>
> 2016-11-28 0:42 GMT+09:00 Boris Brezillon
> :
> >> + if (err_byte < ECC_SECTOR_SIZE) {
> >> + struct mtd_info *mtd =
> >> + nand_to_mtd
Hi Felipe,
On 2016년 11월 30일 19:36, Felipe Balbi wrote:
>
> Hi,
>
> Chanwoo Choi writes:
>> This patch uses the resource-managed extcon API for
>> extcon_register_notifier()
>> and replaces the deprecated extcon API as following:
>> - extcon_get_cable_state_() -> extcon_get_state()
>>
>> Signed
Hi Joshua,
On Thu, 1 Dec 2016 16:04:09 -0800
Joshua Clayton stillcompil...@gmail.com wrote:
...
>>> +static __always_inline __attribute_const__ u32 __arch_bitrev8x4(u32 x)
>>> +{
>>> + __asm__ ("rbit %0, %1; rev %0, %0" : "=r" (x) : "r" (x));
>> return x;
>Oops thats a little embarrassi
On Thu, Dec 1, 2016 at 11:12 PM, Jon Masters wrote:
> On 12/01/2016 09:27 PM, Duc Dang wrote:
>> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
>> needs to configure additional controller's register to address
>> device at bus:dev:function.
>>
>> The quirk will discover controller
On Fri, Dec 02, 2016 at 07:14:03AM +, KY Srinivasan wrote:
> > In other words, why do you need this and PCI or USB doesn't? Why is
> > hyperv "special"?
>
> On Hyper-V, each VF interface (SR-IOV interface)
> is paired with an instance of the
> synthetic interface that is managed by netvsc.
>
On Thu, Dec 1, 2016 at 10:31 PM, Jon Masters wrote:
> Bjorn,
>
> Although I think the below still applies (that we need to leave that
> Memory32Fixed for existing deployments, and this is going to result
> in /proc/iomem polution), I've done some more reading of your ecam
> tree and the implementa
* Borislav Petkov wrote:
> On Wed, Nov 30, 2016 at 12:34:55PM -0800, Andy Lutomirski wrote:
> > Aside from being excessively slow, CPUID is problematic: Linux runs
> > on a handful of CPUs that don't have CPUID. MOV to CR2 is always
> > available, so use it instead.
> >
> > Signed-off-by: Andy
Freezing process can abort when a client is waiting uninterruptibly
for a response. Add new macro wait_fatal_freezable to try to fix it.
Signed-off-by: cuilifei
---
fs/fuse/dev.c | 45 +
1 file changed, 41 insertions(+), 4 deletions(-)
diff --git a/fs
ATTENZIONE;
La cassetta postale ha superato il limite di archiviazione, che è 5 GB come
definiti dall'amministratore, che è attualmente in esecuzione su 10.9GB, non si
può essere in grado di inviare o ricevere nuovi messaggi fino a ri-convalidare
la tua mailbox. Per rinnovare la vostra casella
On 12/01/2016 04:25 PM, Michal Hocko wrote:
From: Michal Hocko
__alloc_pages_may_oom makes sure to skip the OOM killer depending on
the allocation request. This includes lowmem requests, costly high
order requests and others. For a long time __GFP_NOFAIL acted as an
override for all those rules
This patch adds the bus nodes using VDD_INT for Exynos5433 SoC.
Exynos5433 has the following AMBA AXI buses to translate data
between DRAM and sub-blocks.
Following list specify the detailed correlation between sub-block and clock:
- CLK_ACLK_G2D_{400|266} : Bus clock for G2D
- CLK_ACLK_MSCL_400
This patch adds the detailed corrleation between sub-blocks and VDD_INT power
line for Exynos5433. VDD_INT provided the power source to INT (Internal) block.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: Chanwoo Choi
---
Documentation/devicetree/bindings/devfreq/exynos-bus.txt |
The ACLK_BUS0/1/2 are used for NoC (Network on Chip). If NoC's clocks are
disabled, the system halt happen. Following clock must be always enabled.
- CLK_ACLK_BUS0_400 : NoC's bus clock for PERIC/PERIS/FSYS/MSCL
- CLK_ACLK_BUS1_400 : NoC's bus clock for MFC/HEVC/G3D
- CLK_ACLK_BUS2_400 : NoC's bus
This patches add the AMBA bus Device-tree node unsing VDD_INT
to enable the bus frequency scaling on Exynos5433-based TM2 board.
There are two kind of bus device with devfreq framework.
- Parent bus device : Change the frequency/voltage according to bus's
utilization.
- Passive bus device : Chan
This patch adds PPMU (Platform Performance Monitoring Unit) Device-tree node
to measure the utilization of each IP in Exynos SoC.
- PPMU_D{0|1}_CPU are used to measure the utilization of MIF (Memory Interface)
block with VDD_MIF power source.
- PPMU_D{0|1}_GENERAL are used to measure the utiliza
This patch adds the bus Device-tree nodes for INT (Internal) block
to enable the bus frequency scaling.
Signed-off-by: Chanwoo Choi
---
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 72 +++
1 file changed, 72 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Thursday, December 1, 2016 10:48 PM
> To: KY Srinivasan
> Cc: linux-kernel@vger.kernel.org; de...@linuxdriverproject.org;
> o...@aepfle.de; a...@canonical.com; vkuzn...@redhat.com;
> jasow...@redhat.com; lea
On 12/01/2016 09:27 PM, Duc Dang wrote:
> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
> needs to configure additional controller's register to address
> device at bus:dev:function.
>
> The quirk will discover controller MMIO register space and configure
> controller registers t
On Fri, Dec 02, 2016 at 07:55:30AM +0100, Greg KH wrote:
> On Fri, Dec 02, 2016 at 03:07:00AM +, Matthew Garrett wrote:
> > If root is able to modify the behaviour of verified code after it was
> > verified, then the value of that verification is reduced. Ensuring that
> > the code remains tr
James,
On 01.12.16 17:26:55, James Morse wrote:
> On 01/12/16 16:45, Will Deacon wrote:
> > Thanks for sending out the new patch. Whilst I'm still a bit worried about
> > changing pfn_valid like this, I guess we'll just have to fix up any callers
> > which suffer from this change.
>
> Hibernate's
Hey Arnaldo,
On Tue, Nov 22, 2016 at 04:01:06PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Thu, Nov 10, 2016 at 04:40:46PM -0800, Krister Johansen escreveu:
> > Thanks. As part of processing this did you run into any problems?
> > Would you like me to rebase against the latest perf/core and re-s
On 12/01/16 22:10, Moritz Fischer wrote:
> From: Moritz Fischer
>
> No longer fall through into the error case that prints out
> an error if no error (err = 0) occurred.
>
> Fixes d9181b20a83(of: Add back an error message, restructured)
> Signed-off-by: Moritz Fischer
> Reviewed-by: Frank Rowan
On Wed, Nov 30, 2016 at 02:57:33PM +0900, Chanwoo Choi wrote:
> This patch uses the resource-managed extcon API for extcon_register_notifier()
> and replaces the deprecated extcon API as following:
> - extcon_get_cable_state_() -> extcon_get_state()
>
> Signed-off-by: Chanwoo Choi
> ---
> driver
On 2016/12/1 5:33, Andrew Morton wrote:
> On Wed, 30 Nov 2016 18:30:52 +0800 Yisheng Xie wrote:
>
>> I tried to echo an invalid value to an unsigned long type sysctl on
>> 4.9.0-rc6:
>>linux:~# cat /proc/sys/vm/user_reserve_kbytes
>>131072
>>linux:~# echo -1 > /proc/sys/vm/user_rese
On Fri, Dec 02, 2016 at 03:07:00AM +, Matthew Garrett wrote:
> On Thu, Dec 01, 2016 at 04:01:35PM +0100, Greg KH wrote:
>
> > First off, this "secure boot support" massive patchset has not gone
> > anywhere yet, so why do this now?
>
> Because David ended up with the short straw when distro m
On Thu, Dec 01, 2016 at 10:57:24PM +0100, Rafael J. Wysocki wrote:
> On Tue, Nov 22, 2016 at 4:53 AM, Peter Chen wrote:
> > On Tue, Nov 22, 2016 at 03:23:12AM +0100, Rafael J. Wysocki wrote:
> >> > @@ -0,0 +1,237 @@
> >> > +/*
> >> > + * core.c power sequence core file
> >> > + *
> >> > + * C
On Fri, Dec 02, 2016 at 06:02:29AM +, KY Srinivasan wrote:
>
>
> > -Original Message-
> > From: Greg KH [mailto:gre...@linuxfoundation.org]
> > Sent: Thursday, December 1, 2016 12:36 PM
> > To: KY Srinivasan
> > Cc: linux-kernel@vger.kernel.org; de...@linuxdriverproject.org;
> > o...
On Thu, Dec 01, 2016 at 01:05:46PM +0900, Masahiro Yamada wrote:
> I see no override of read/write callbacks in sdhci-of-at91.c.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Ludovic Desroches
Thanks
> ---
>
> BTW, this config may not be so useful in recent multi-platforms.
> Perhaps, is it be
On 12/02/2016 01:42 AM, Duc Dang wrote:
> On Thu, Dec 1, 2016 at 9:50 PM, Jon Masters wrote:
>> On 11/30/2016 07:28 PM, Bjorn Helgaas wrote:
>>
>>> I'm hoping to end up with something like this:
>>> https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/ecam&id=51ad4df79a9b7f2a
On Thu, Dec 1, 2016 at 9:50 PM, Jon Masters wrote:
> On 11/30/2016 07:28 PM, Bjorn Helgaas wrote:
>
>> I'm hoping to end up with something like this:
>> https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/ecam&id=51ad4df79a9b7f2a66b346a46b21a785a2937469
>
> The following bui
On 12/01/2016 10:02 PM, Michal Nazarewicz wrote:
On Thu, Dec 01 2016, Michal Hocko wrote:
I am not familiar with this code so I cannot really argue but a quick
look at rmem_cma_setup doesn't suggest any speicific placing or
anything...
early_cma parses ‘cma’ command line argument which can spe
Bjorn,
Although I think the below still applies (that we need to leave that
Memory32Fixed for existing deployments, and this is going to result
in /proc/iomem polution), I've done some more reading of your ecam
tree and the implementation of acpi_get_rc_resources you mentioned,
and in particular h
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Thursday, December 1, 2016 12:37 PM
> To: KY Srinivasan
> Cc: linux-kernel@vger.kernel.org; de...@linuxdriverproject.org;
> o...@aepfle.de; a...@canonical.com; vkuzn...@redhat.com;
> jasow...@redhat.com; lea
On 12/02/2016 04:47 AM, Hillf Danton wrote:
On Friday, December 02, 2016 8:23 AM Mel Gorman wrote:
Vlastimil Babka pointed out that commit 479f854a207c ("mm, page_alloc:
defer debugging checks of pages allocated from the PCP") will allow the
per-cpu list counter to be out of sync with the per-cp
Instead of requesting a new slot on the ring to the backend early, do
so only after all has been setup for the request to be sent. This
makes error handling easier as we don't need to undo the request id
allocation and ring slot allocation.
Suggested-by: Jan Beulich
Signed-off-by: Juergen Gross
Instead of requesting a new slot on the ring to the backend early, do
so only after all has been setup for the request to be sent. This
makes error handling easier as we don't need to undo the request id
allocation and ring slot allocation.
Suggested-by: Jan Beulich
Signed-off-by: Juergen Gross
Instead of requesting a new slot on the ring to the backend early, do
so only after all has been setup for the request to be sent. This
makes error handling easier as we don't need to undo the request id
allocation and ring slot allocation.
Suggested-by: Jan Beulich
Signed-off-by: Juergen Gross
From: Moritz Fischer
No longer fall through into the error case that prints out
an error if no error (err = 0) occurred.
Fixes d9181b20a83(of: Add back an error message, restructured)
Signed-off-by: Moritz Fischer
Reviewed-by: Frank Rowand
---
Hi Frank, Rob
sorry for the noise before.
Thanks
On 02-12-16, 13:58, Baoyou Xie wrote:
> + Viresh, the author of the bindings.
>
> On 2 December 2016 at 13:52, Baoyou Xie wrote:
>
> > This patch adds the CPU clock phandle in CPU's node
> > and uses operating-points-v2 to register operating points.
> >
> > So it can be used by cpufreq-dt driver
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Thursday, December 1, 2016 12:36 PM
> To: KY Srinivasan
> Cc: linux-kernel@vger.kernel.org; de...@linuxdriverproject.org;
> o...@aepfle.de; a...@canonical.com; vkuzn...@redhat.com;
> jasow...@redhat.com; lea
Hello, Mel.
I didn't follow up previous discussion so what I raise here would be
duplicated. Please let me know the link if it is answered before.
On Fri, Dec 02, 2016 at 12:22:44AM +, Mel Gorman wrote:
> Changelog since v4
> o Avoid pcp->count getting out of sync if struct page gets corrupte
---
drivers/input/mouse/elantech.c | 152 +++--
1 file changed, 131 insertions(+), 21 deletions(-)
diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c
index db7d1d6..acfe7f2 100644
--- a/drivers/input/mouse/elantech.c
+++ b/drivers/inpu
This patch adds the CPU clock phandle in CPU's node
and uses operating-points-v2 to register operating points.
So it can be used by cpufreq-dt driver.
Signed-off-by: Baoyou Xie
---
arch/arm64/boot/dts/zte/zx296718.dtsi | 39 +++
1 file changed, 39 insertions(+)
On 11/30/2016 07:28 PM, Bjorn Helgaas wrote:
> I'm hoping to end up with something like this:
> https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/ecam&id=51ad4df79a9b7f2a66b346a46b21a785a2937469
The following build warnings happen using your branch on RHELSA7.3:
drivers/
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Thursday, December 1, 2016 12:34 PM
> To: KY Srinivasan
> Cc: linux-kernel@vger.kernel.org; de...@linuxdriverproject.org;
> o...@aepfle.de; a...@canonical.com; vkuzn...@redhat.com;
> jasow...@redhat.com; lea
On 2016/12/2 7:12, Rafael J. Wysocki wrote:
> On Thursday, December 01, 2016 11:47:17 PM Borislav Petkov wrote:
>> On Thu, Dec 01, 2016 at 11:29:45PM +0100, Rafael J. Wysocki wrote:
>>> Well, there's another ARM-related patch touching APEI.
>>>
>>> I guess whoever takes this one should also take th
On 2016年12月02日 13:15, Pan Xinhui wrote:
在 2016/12/2 12:35, yjin 写道:
On 2016年12月02日 12:22, Balbir Singh wrote:
On Fri, Dec 2, 2016 at 3:15 PM, Michael Ellerman
wrote:
yanjiang@windriver.com writes:
diff --git a/arch/powerpc/include/asm/cputime.h
b/arch/powerpc/include/asm/cputime.h
在 2016/12/2 12:35, yjin 写道:
On 2016年12月02日 12:22, Balbir Singh wrote:
On Fri, Dec 2, 2016 at 3:15 PM, Michael Ellerman wrote:
yanjiang@windriver.com writes:
diff --git a/arch/powerpc/include/asm/cputime.h
b/arch/powerpc/include/asm/cputime.h
index 4f60db0..4423e97 100644
--- a/arch/p
On 11/10/2016 12:42 PM, Bjorn Helgaas wrote:
> For the PNP/ACPI quirks, there are two interesting cases:
>
> 1) Firmware provides a PNP0C02 device, but its _CRS doesn't include
> the ECAM space, and
>
> 2) Firmware doesn't provide a PNP0C02 device at all.
>
> For case 1, we could consi
Stephen Rothwell writes:
> Hi all,
>
> Today's linux-next merge of the wireless-drivers-next tree got a
> conflict in:
>
> drivers/net/wireless/ath/ath10k/mac.c
>
> between commit:
>
> f3fe4e93dd63 ("mac80211: add a HW flag for supporting HW TX fragmentation")
>
> from the net-next tree and c
David Howells writes:
> When the kernel is running in secure boot mode, we lock down the kernel to
> prevent userspace from modifying the running kernel image. Whilst this
> includes prohibiting access to things like /dev/mem, it must also prevent
> access by means of configuring driver modules
On 11/03/2016 10:00 AM, Bjorn Helgaas wrote:
> It turns out that we can't use the _CRS of host bridges because of the
> Producer/Consumer bit screwup [1]. So the fallback is to include the
> ECAM space in the _CRS of a PNP0C02 device. This is what the PCI
> Firmware spec r3.0, Table 4-2, footnot
The File handle is not yet added in the vdev list.So no need to call
v4l2_fh_del(&ctx->fh)if it fails to create control.
Signed-off-by: Shailendra Verma
---
drivers/media/platform/sti/bdisp/bdisp-v4l2.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platfor
On 2 December 2016 at 12:40, Lu Baolu wrote:
> Hi,
>
> On 12/02/2016 12:18 PM, Baolin Wang wrote:
>> On 2 December 2016 at 10:29, Lu Baolu wrote:
>>> handle_cmd_completion() frees a command structure which might
>>> be still referenced by xhci->current_cmd. This might cause
>>> problem when xhci-
The File handle is not yet added in the vfd list.So no need to call
v4l2_fh_del(&ctx->fh) if it fails to create control.
Signed-off-by: Shailendra Verma
---
drivers/media/platform/exynos-gsc/gsc-m2m.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform/e
The File handle is not yet added in the vfd list.So no need to call
v4l2_fh_del(&ctx->fh) if it fails to create control.
Signed-off-by: Shailendra Verma
---
drivers/media/platform/exynos4-is/fimc-m2m.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform
Hi,
On 12/02/2016 12:18 PM, Baolin Wang wrote:
> On 2 December 2016 at 10:29, Lu Baolu wrote:
>> handle_cmd_completion() frees a command structure which might
>> be still referenced by xhci->current_cmd. This might cause
>> problem when xhci->current_cmd is accessed after that.
>>
>> A real-life
This patch enables ACPI support for leds-pca955x driver.
Signed-off-by: Tin Huynh
---
drivers/leds/leds-pca955x.c | 24 ++--
1 files changed, 22 insertions(+), 2 deletions(-)
Change from V4:
-Using client->name instead of id->name to avoid NULL pointer in ACPI.
Change f
Some of the Broadcom iProc SoCs have FlexRM ring manager
which provides a ring-based programming interface to various
offload engines (e.g. RAID, Crypto, etc).
This patch adds a common mailbox driver for Broadcom FlexRM
ring manager which can be shared by various offload engine
drivers (implemente
This patch adds device tree bindings document for the FlexRM
ring manager found on Broadcom iProc SoCs.
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Signed-off-by: Anup Patel
---
.../bindings/mailbox/brcm,iproc-flexrm-mbox.txt| 60 ++
1 file changed, 60 insertions(+)
The Broadcom FlexRM ring manager provides producer-consumer style
ring interface for offload engines on Broadcom iProc SoCs. We can
have one or more instances of Broadcom FlexRM ring manager in a SoC.
This patchset adds a mailbox driver for Broadcom FlexRM ring manager
which can be used by offload
Hello.
It was noticed during addition of support for the new arch_prctl code constants
to strace that these new constants (ARCH_MAP_VDSO_X32, ARCH_MAP_VDSO_32 and
ARCH_MAP_VDSO_64) are guarded with the CONFIG_CHECKPOINT_RESTORE ifdef.
However, from what I can see (by looking at headers in and arou
On 2016年12月02日 12:22, Balbir Singh wrote:
On Fri, Dec 2, 2016 at 3:15 PM, Michael Ellerman wrote:
yanjiang@windriver.com writes:
diff --git a/arch/powerpc/include/asm/cputime.h
b/arch/powerpc/include/asm/cputime.h
index 4f60db0..4423e97 100644
--- a/arch/powerpc/include/asm/cputime.h
++
Hi Boris,
2016-11-28 0:21 GMT+09:00 Boris Brezillon :
> On Sun, 27 Nov 2016 03:05:55 +0900
> Masahiro Yamada wrote:
>
>> Currently, is_erased() is called against "buf" twice, so the second
>> call is meaningless. The second one should be checked against
>> chip->oob_poi.
>>
>
> IMO, patch 9 to
Hi Boris,
2016-11-28 0:31 GMT+09:00 Boris Brezillon :
> On Sun, 27 Nov 2016 03:05:59 +0900
> Masahiro Yamada wrote:
>
>> Update the number of corrected bit flips when read_page() succeeds.
>>
>> Signed-off-by: Masahiro Yamada
>> ---
>>
>> drivers/mtd/nand/denali.c | 3 +++
>> 1 file changed, 3
Hi Boris,
2016-11-28 0:42 GMT+09:00 Boris Brezillon :
>> + if (err_byte < ECC_SECTOR_SIZE) {
>> + struct mtd_info *mtd =
>> + nand_to_mtd(&denali->nand);
>> + int offset;
>> +
>> +
On Fri, Dec 2, 2016 at 3:15 PM, Michael Ellerman wrote:
> yanjiang@windriver.com writes:
>
>> diff --git a/arch/powerpc/include/asm/cputime.h
>> b/arch/powerpc/include/asm/cputime.h
>> index 4f60db0..4423e97 100644
>> --- a/arch/powerpc/include/asm/cputime.h
>> +++ b/arch/powerpc/include/asm/
This adds two tests, to check that a read or write to LIST_POISON1 and
ZERO_SIZE_PTR are blocked.
The default values for both (256 and 16) typically fall in the range
of valid user space addresses. However in general mmap_min_addr is 64K,
which prevents user space from mapping anything at those ad
Hi all,
Changes since 20161201:
The v4l-dvb tree gained conflicts against the jc_docs tree.
The wireless-drivers-next tree gained a conflict against the net-next
tree.
Non-merge commits (relative to Linus' tree): 9313
8873 files changed, 552758 insertions(+), 202970 dele
On 2 December 2016 at 10:29, Lu Baolu wrote:
> handle_cmd_completion() frees a command structure which might
> be still referenced by xhci->current_cmd. This might cause
> problem when xhci->current_cmd is accessed after that.
>
> A real-life case could be like this. The host takes a very long
> t
yanjiang@windriver.com writes:
> diff --git a/arch/powerpc/include/asm/cputime.h
> b/arch/powerpc/include/asm/cputime.h
> index 4f60db0..4423e97 100644
> --- a/arch/powerpc/include/asm/cputime.h
> +++ b/arch/powerpc/include/asm/cputime.h
> @@ -228,7 +228,8 @@ static inline cputime_t clock_t_t
Hi Bjorn, Duc, Mark,
I switched my brain to the on mode and went and read some specs, and a few
tables, so here's my 2 cents on this...
On 12/01/2016 06:22 PM, Duc Dang wrote:
> On Thu, Dec 1, 2016 at 3:07 PM, Bjorn Helgaas wrote:
>> On Thu, Dec 01, 2016 at 02:10:10PM -0800, Duc Dang wrote:
>>>
Hi,
On 12/02/2016 08:02 AM, zain wang wrote:
We will ignored PSR setting if panel not support it. So, in this case, we should
return from analogix_dp_enable/disable_psr() without any error code.
Let's retrun 0 instead of -EINVAL when panel not support PSR in
analogix_dp_enable/disable_psr().
Si
On Friday, December 02, 2016 8:23 AM Mel Gorman wrote:
> Vlastimil Babka pointed out that commit 479f854a207c ("mm, page_alloc:
> defer debugging checks of pages allocated from the PCP") will allow the
> per-cpu list counter to be out of sync with the per-cpu list contents
> if a struct page is cor
On Sun, Nov 27, 2016 at 12:38:21PM -0800, Olof Johansson wrote:
> On Wed, Nov 16, 2016 at 10:19 AM, Benson Leung wrote:
> > I'll be taking over maintainership of platform/chrome from Olof,
> > so let's add me to the list of maintainers.
> >
> > Signed-off-by: Benson Leung
>
> Acked-by: Olof Joha
On Thu, Dec 01, 2016 at 04:01:35PM +0100, Greg KH wrote:
> First off, this "secure boot support" massive patchset has not gone
> anywhere yet, so why do this now?
Because David ended up with the short straw when distro maintainers
talked about this at LPC.
> Secure boot is a trust that the prev
This adds support for the MediaTek hardware accelerator on
mt7623/mt2701/mt8521p SoC.
This driver currently implement:
- SHA1 and SHA2 family(HMAC) hash alogrithms.
- AES block cipher in CBC/ECB mode with 128/196/256 bits keys.
Signed-off-by: Ryder Lee
---
drivers/crypto/Kconfig
Add DT bindings documentation for the crypto driver
Signed-off-by: Ryder Lee
---
.../devicetree/bindings/crypto/mediatek-crypto.txt | 32 ++
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/mediatek-crypto.txt
diff --git a/Documen
This adds support for the MediaTek hardware accelerator on
mt7623 SoC.
This driver currently implement:
- SHA1 and SHA2 family(HMAC) hash alogrithms.
- AES block cipher in CBC/ECB mode with 128/196/256 bits keys.
Ryder Lee (2):
Add crypto driver support for some MediaTek chips
crypto: media
On 2016/12/2 10:38, Scott Branden wrote:
> Hi Xishi,
>
> Thanks for the reply - please see comments below.
>
> On 16-12-01 05:49 PM, Xishi Qiu wrote:
>> On 2016/12/2 8:19, Scott Branden wrote:
>>
>>> This patchset is sent for comment to add memory hotplug support for ARM64
>>> based platforms.
On 02-12-16, 10:36, Shawn Guo wrote:
> + Viresh, the author of the bindings.
>
> On Thu, Dec 01, 2016 at 08:08:55PM +0800, Baoyou Xie wrote:
> > This patch adds the CPU clock phandle in CPU's node
> > and uses operating-points-v2 to register operating points.
> >
> > So it can be used by cpufreq-
Hi Rob,
(+CC Dinh)
2016-12-02 1:05 GMT+09:00 Rob Herring :
> On Sun, Nov 27, 2016 at 03:06:25AM +0900, Masahiro Yamada wrote:
>> Add two compatible strings for UniPhier SoCs. The revision register
>> on both shows revision 5.0, but they are different hardware.
>>
>> Features:
>> - DMA engine wit
On Thu, Dec 1, 2016 at 10:33 AM, Bjorn Helgaas wrote:
> Hi Duc,
>
> On Wed, Nov 30, 2016 at 03:42:53PM -0800, Duc Dang wrote:
>> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
>> needs to configure additional controller's register to address
>> device at bus:dev:function.
>>
>> Th
On Thu, Dec 01, 2016 at 05:16:15PM -0800, Dmitry Torokhov wrote:
> On Thu, Dec 01, 2016 at 04:42:15PM -0800, Brian Norris wrote:
> > On Thu, Dec 01, 2016 at 04:37:37PM -0800, Dmitry Torokhov wrote:
> > > On Thu, Dec 01, 2016 at 04:31:10PM -0800, Brian Norris wrote:
> > > > On some boards, we need t
On 2 December 2016 at 09:17, Lu Baolu wrote:
> Hi,
>
> On 12/01/2016 04:03 PM, Baolin Wang wrote:
>> On 1 December 2016 at 15:44, Lu Baolu wrote:
>>> Hi,
>>>
>>> On 12/01/2016 03:35 PM, Baolin Wang wrote:
On 1 December 2016 at 14:35, Lu Baolu wrote:
> Hi,
>
> On 12/01/2016 02:04
On 1 December 2016 at 21:28, Mathias Nyman
wrote:
> On 01.12.2016 06:54, Baolin Wang wrote:
>>
>> On 30 November 2016 at 22:09, Mathias Nyman
>> wrote:
>>>
>>> On 30.11.2016 11:02, Baolin Wang wrote:
If the hardware never responds to the stop endpoint command, the
URBs will ne
Hi Xishi,
Thanks for the reply - please see comments below.
On 16-12-01 05:49 PM, Xishi Qiu wrote:
On 2016/12/2 8:19, Scott Branden wrote:
This patchset is sent for comment to add memory hotplug support for ARM64
based platforms. It follows hotplug code added for other architectures
in the l
From: Wu-Cheng Li
This patch uses V4L2_DEC_CMD_STOP to implement flush -- requesting
the remaining images to be returned to userspace. The old unofficial
way was to use a size-0 input buffer and the code is removed.
Tiffany Lin (1):
mtk-vcodec: use V4L2_DEC_CMD_STOP to implement flush
driver
From: Tiffany Lin
Also remove the code using size-0 OUTPUT buffer to flush.
Singed-off-by: Tiffany Lin
Signed-off-by: Wu-Cheng Li
Reviewed-by: Kuang-che Wu
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 151 ++---
.../media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c |
+ Viresh, the author of the bindings.
On Thu, Dec 01, 2016 at 08:08:55PM +0800, Baoyou Xie wrote:
> This patch adds the CPU clock phandle in CPU's node
> and uses operating-points-v2 to register operating points.
>
> So it can be used by cpufreq-dt driver.
>
> Signed-off-by: Baoyou Xie
Just ou
We're going to need to amend this table in board files.
Signed-off-by: Brian Norris
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 66a11d1a
Add the dwc3 usb needed node information for rk3399.
Signed-off-by: Brian Norris
---
Somewhat rewritten from Caesar's reposting (v2) of my patch.
Changes:
* Include USB2 PHY (which is now in -next)
* Don't include USB3 PHY, as extcon support is not ready yet
* Drop non-upstream properties
*
Kevin is part of a family of boards called Gru. As best as possible, the
properties shared by the Gru family are placed in rk3399-gru.dtsi, while
Kevin-specific bits are in rk3399-gru-kevin.dts. This does not add full
support for the base Gru board.
Working and tested (to some extent):
* EC suppo
We haven't enabled eDP support yet, but we might as well describe the
pin now.
Signed-off-by: Brian Norris
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
Hi,
This series adds basic support for Google Kevin, a board in the Gru device
family. I do not add a leaf .dts board file for Gru, but I have retained the
split between "things that apply to the Gru family" (rk3399-gru.dtsi) and
"things that apply to Kevin only" (rk3399-gru-kevin.dtsi).
I've inc
PCIe controllers in X-Gene SoCs is not ECAM compliant: software
needs to configure additional controller's register to address
device at bus:dev:function.
The quirk will discover controller MMIO register space and configure
controller registers to select and address the target secondary device.
T
Used for Gru/Kevin, but they should be conservative enough for all
boards. (And ideally, any board-to-board differences can be represented
via, e.g., describing regulator offsets.)
Signed-off-by: Brian Norris
---
arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi | 145 +++
arc
From: Douglas Anderson
We'd like to be able to use the cros-ec-keyboard.dtsi and
cros-ec-sbs.dtsi snippets for arm64 devices. Currently those files live
in the arm/boot/dts directory.
Let's follow the convention set by commit 8ee57b8182c4 ("ARM64: dts:
vexpress: Use a symlink to vexpress-v2m-rs
We need to add regulators to the CPU nodes, so cpufreq doesn't think it
can crank up the clock speed without changing the voltage. However, we
don't yet have the DT bindings to fully describe the Over Voltage
Protection (OVP) circuits on these boards. Without that description, we
might end up chang
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