Hi,
On 21 December 2016 at 15:58, Chanwoo Choi wrote:
> Hi,
>
> On 2016년 12월 21일 16:53, Baolin Wang wrote:
>> Hi,
>>
>> On 21 December 2016 at 15:20, Chanwoo Choi wrote:
>>> Hi,
>>>
>>> On 2016년 12월 21일 15:10, Baolin Wang wrote:
Current there is both "EXTCON_USB" and "EXTCON_CHG_USB_SDP" wh
On Tue 20-12-16 14:54:35, Mel Gorman wrote:
> On Tue, Dec 20, 2016 at 03:35:02PM +0100, Michal Hocko wrote:
> > On Tue 20-12-16 14:28:45, Mel Gorman wrote:
> > > On Tue, Dec 20, 2016 at 02:26:43PM +0100, Michal Hocko wrote:
> > > > On Tue 20-12-16 13:10:40, Mel Gorman wrote:
> > > > > On Tue, Dec 2
Hi,
On 2016년 12월 21일 16:53, Baolin Wang wrote:
> Hi,
>
> On 21 December 2016 at 15:20, Chanwoo Choi wrote:
>> Hi,
>>
>> On 2016년 12월 21일 15:10, Baolin Wang wrote:
>>> Current there is both "EXTCON_USB" and "EXTCON_CHG_USB_SDP" which
>>> both seem to suggest a standard downstream port. But there
Hi,
On 21 December 2016 at 15:29, Chanwoo Choi wrote:
> Hi,
>
> On 2016년 12월 21일 15:10, Baolin Wang wrote:
>> According to the documentation, we should set the EXTCON_USB when
>> one SDP charger connector was reported.
>>
>> Signed-off-by: Baolin Wang
>> ---
>> drivers/phy/phy-rockchip-inno-usb
Hi,
On 21 December 2016 at 15:22, Chanwoo Choi wrote:
> Hi,
>
> On 2016년 12월 21일 15:10, Baolin Wang wrote:
>> According to the documentation, we should set the EXTCON_USB when
>> one SDP charger connector was reported.
>>
>> Signed-off-by: Baolin Wang
>> ---
>> drivers/extcon/extcon-axp288.c |
Hi,
On 21 December 2016 at 15:20, Chanwoo Choi wrote:
> Hi,
>
> On 2016년 12월 21일 15:10, Baolin Wang wrote:
>> Current there is both "EXTCON_USB" and "EXTCON_CHG_USB_SDP" which
>> both seem to suggest a standard downstream port. But there is no
>> documentation describing how these relate.
>>
>> T
From: Gabor Juhos
These quirks do not effect small small plastic routers. These routers tend
to have very little flash space. This patch adds a new option that allows
us to build a kernel without including the common quirks, thus saving us
valuable flash space.
When building an image for a MIPS/
On Tue 20-12-16 16:48:23, Wei Yang wrote:
> On Mon, Dec 19, 2016 at 04:21:57PM +0100, Michal Hocko wrote:
> >On Sun 18-12-16 14:47:50, Wei Yang wrote:
> >> memblock_reserve() may fail in case there is not enough regions.
> >
> >Have you seen this happenning in the real setups or this is a by-review
On Tue, Dec 20, 2016 at 12:02:27AM -0200, Mauricio Faria de Oliveira wrote:
> When a SCSI command (e.g., read operation) is partially completed
> with good status and residual bytes (i.e., not all the bytes from
> the specified transfer length were transferred) the SCSI midlayer
> will update the r
On Tue 20-12-16 16:35:40, Wei Yang wrote:
> On Mon, Dec 19, 2016 at 04:15:14PM +0100, Michal Hocko wrote:
> >On Sun 18-12-16 14:47:49, Wei Yang wrote:
> >> The base address is already guaranteed to be in the region by
> >> memblock_search().
> >
>
> Hi, Michal
>
> Nice to receive your comment.
>
Hi, Kees and Emese
I just helped to back port the commit here:
https://github.com/acpica/acpica/pull/196/commits/5e64857f
If you can see something wrong in it, please let me know.
Thanks and best regards
Lv
> From: Devel [mailto:devel-boun...@acpica.org] On Behalf Of Zheng, Lv
> Subject: Re: [De
TL;DR
there is another version of the debugging patch. Just revert the
previous one and apply this one instead. It's still not clear what
is going on but I suspect either some misaccounting or unexpeted
pages on the LRU lists. I have added one more tracepoint, so please
enable also mm_vmscan_inacti
On 21/12/2016 08:33, Marek Vasut wrote:
> On 12/21/2016 08:23 AM, John Crispin wrote:
>> From: André Valentin
>>
>> This patch adds support for a new macronix spi flash chip. We have had this
>> patch inside our tree for a while and people are actively using routers
>> with this chip.
>>
>> Sign
On 12/21/2016 08:23 AM, John Crispin wrote:
> From: André Valentin
>
> This patch adds support for a new macronix spi flash chip. We have had this
> patch inside our tree for a while and people are actively using routers
> with this chip.
>
> Signed-off-by: John Crispin
> Signed-off-by: André V
On 12/21/2016 08:23 AM, John Crispin wrote:
> From: Ash Benz
>
> This patch adds support for a new macronix spi flash chip.
> We have had this
> patch inside our tree for a while and people are actively using routers
> with this chip.
I think this information shouldn't be part of the commit me
On Tue, Dec 20, 2016 at 09:24:53AM -0800, Stephen Hemminger wrote:
> On Tue, 20 Dec 2016 18:55:49 +0300
> Roman Kagan wrote:
>
> > Move definitions related to the Hyper-V SynIC event flags to a header
> > where they can be consumed by userspace.
> >
> > While doing so, also clean up their use by
Hi,
On 2016년 12월 21일 15:10, Baolin Wang wrote:
> According to the documentation, we should set the EXTCON_USB when
> one SDP charger connector was reported.
>
> Signed-off-by: Baolin Wang
> ---
> drivers/phy/phy-rockchip-inno-usb2.c |7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(
From: André Valentin
This patch adds support for a new macronix spi flash chip. We have had this
patch inside our tree for a while and people are actively using routers
with this chip.
Signed-off-by: John Crispin
Signed-off-by: André Valentin
---
Changes in V2
* add description
* add SECT_4K
*
From: "Larry D. Pinney"
Add Support for the ESMT_F25L32QA and ESMT_F25L64QA
These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory
Technology
Acked-by: Marek Vasut
Signed-off-by: John Crispin
Signed-off-by: Larry D. Pinney
---
drivers/mtd/spi-nor/spi-nor.c |2 ++
1 file chan
From: Ash Benz
This patch adds support for a new macronix spi flash chip. We have had this
patch inside our tree for a while and people are actively using routers
with this chip.
Signed-off-by: John Crispin
Signed-off-by: Ash Benz
---
Changes in V2
* add description
drivers/mtd/spi-nor/spi-n
These have been lingering inside the owrt and lede trees for a while.
André Valentin (1):
mtd: spi-nor: add support for macronix mx25u3235f
Ash Benz (1):
mtd: spi-nor: add support for macronix mx25u25635f
Larry D. Pinney (1):
mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa
Hi,
On 2016년 12월 21일 15:10, Baolin Wang wrote:
> According to the documentation, we should set the EXTCON_USB when
> one SDP charger connector was reported.
>
> Signed-off-by: Baolin Wang
> ---
> drivers/extcon/extcon-axp288.c |7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
On Tue 20-12-16 14:39:19, Thomas Casey wrote:
> Fixes two instances of EXPORT_SYMBOL not being called immediately after
> the initialization of its argument
What does this fix actually?
> Signed-off-by: Thomas Casey
> ---
> kernel/sys.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions
Hi,
On 2016년 12월 21일 15:10, Baolin Wang wrote:
> Current there is both "EXTCON_USB" and "EXTCON_CHG_USB_SDP" which
> both seem to suggest a standard downstream port. But there is no
> documentation describing how these relate.
>
> Thus add documentation to describe EXTCON_CHG_USB_SDP should alway
On 12/21/2016 4:20 AM, Stephen Boyd wrote:
> On 12/18, Imran Khan wrote:
>>
>> I had discussed this with Bjorn and it was recommended to keep it out of
>> smem.h. If needed I can move it back there.
>
> Ok no worries from me then if this has already been discussed.
>
>>
>> Yes. The numbers used
Hi Sven,
[auto build test ERROR on linus/master]
[also build test ERROR on next-20161221]
[cannot apply to v4.9]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Sven-Schmidt/Update-LZ4-compressor
On Tue, Dec 20, 2016 at 11:44 PM, Andreas Schwab wrote:
> On Dez 20 2016, Geert Uytterhoeven wrote:
>> When I saw this patch, I was already a bit skeptical about it, but I noticed
>> other architectures (e.g. avr32) are doing the same, so I didn't reply.
>>
>> In my experience, "format '%zu' expe
Add a new feature which supports sending the page information
with range array. The current implementation uses PFNs array,
which is not very efficient. Using ranges can improve the
performance of inflating/deflating significantly.
Signed-off-by: Liang Li
Cc: Michael S. Tsirkin
Cc: Paolo Bonzini
Define the flags and head struct for a new host request virtual
queue. Guest can get requests from host and then responds to them on
this new virtual queue.
Host can make use of this virtual queue to request the guest do some
operations, e.g. drop page cache, synchronize file system, etc.
And the h
This patch contains two parts:
One is to add a new API to mm go get the unused page information.
The virtio balloon driver will use this new API added to get the
unused page info and send it to hypervisor(QEMU) to speed up live
migration. During sending the bitmap, some the pages may be modified
a
When doing the inflating/deflating operation, the current virtio-balloon
implementation uses an array to save 256 PFNS, then send these PFNS to
host through virtio and process each PFN one by one. This way is not
efficient when inflating/deflating a large mount of memory because too
many times of t
The implementation of the current virtio-balloon is not very
efficient, the time spends on different stages of inflating
the balloon to 7GB of a 8GB idle guest:
a. allocating pages (6.5%)
b. sending PFNs to host (68.3%)
c. address translation (6.1%)
d. madvise (19%)
It takes about 4126ms for the
This patch set contains two parts of changes to the virtio-balloon.
One is the change for speeding up the inflating & deflating process,
the main idea of this optimization is to use {pfn|length} to present
the page information instead of the PFNs, to reduce the overhead of
virtio data transmissio
Hi Mathias,
I have some comments for the implementation of
xhci_handle_command_timeout() as well.
On 12/20/2016 11:13 PM, Mathias Nyman wrote:
> On 20.12.2016 09:30, Baolin Wang wrote:
> ...
>
> Alright, I gathered all current work related to xhci races and timeouts
> and put them into a branch:
From: Fu Wei
The patch add memory-mapped timer register support by using the
information provided by the new GTDT driver of ACPI.
Signed-off-by: Fu Wei
---
drivers/clocksource/arm_arch_timer.c | 35 ---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --gi
From: Fu Wei
This driver adds support for parsing SBSA Generic Watchdog timer
in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
and creating a platform device with that information.
This allows the operating system to obtain device data from the
resource of platform device. The
From: Fu Wei
The patch introduce two new structs: arch_timer_mem, arch_timer_mem_frame.
And also introduce a new define: ARCH_TIMER_MEM_MAX_FRAMES
These will be used for refactoring the memory-mapped timer init code to
prepare for GTDT
Signed-off-by: Fu Wei
---
include/clocksource/arm_arch_ti
From: Fu Wei
When system init with device-tree, we don't know which node will be
initialized first. And the code in arch_timer_common_init should wait
until per-cpu timer and MMIO timer are both initialized. So we need
arch_timer_needs_probing to detect the init status of system.
But currently t
From: Fu Wei
The patch update arm_arch_timer driver to use the function
provided by the new GTDT driver of ACPI.
By this way, arm_arch_timer.c can be simplified, and separate
all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei
Signed-off-by: Hanjun Guo
Tested-by: Xiongfen
From: Fu Wei
This patch adds support for parsing arch timer info in GTDT,
provides some kernel APIs to parse all the PPIs and
always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and
separate the ACPI GTDT knowledge from it.
Signed-off-by: Fu Wei
Sign
From: Fu Wei
On platforms booting with ACPI, architected memory-mapped timers'
configuration data is provided by firmware through the ACPI GTDT
static table.
The clocksource architected timer kernel driver requires a firmware
interface to collect timer configuration and configure its driver.
thi
From: Fu Wei
The patch refactor original memory-mapped timer init code:
(1) Refactor "arch_timer_mem_init", make it become a common code for
memory-mapped timer init.
(2) Add a new function "arch_timer_mem_of_init" for DT init.
Signed-off-by: Fu Wei
---
drivers/clocksource/arm_
From: Fu Wei
Because arch_timer_needs_of_probing is only for booting with device-tree,
but arch_timer_common_init is a generic init call which shouldn't include
the FW-specific code. It's better to put arch_timer_needs_of_probing into
DT init function.
But for per-cpu timer, the arch_timer_commo
From: Fu Wei
Rename some enums and defines, to unify the format of enums and defines
in arm_arch_timer.h, also update all the users of these enums and defines:
drivers/clocksource/arm_arch_timer.c
virt/kvm/arm/hyp/timer-sr.c
No functional change.
Signed-off-by: Fu Wei
Tested-by: Xiongf
From: Fu Wei
Currently, the counter frequency detection call(arch_timer_detect_rate)
combines all the ways to get counter frequency: device-tree property,
system coprocessor register, MMIO timer. But in the most of use cases,
we don't need all the ways to try:
For example, reading device-tree pro
From: Fu Wei
To support the arm_arch_timer via ACPI we need to share defines and enums
between the driver and the ACPI parser code.
Split out the relevant defines and enums into arm_arch_timer.h, and
change "enum ppi_nr" to "enum arch_timer_ppi_nr" to avoid the potential
name clashes.
Also switc
From: Fu Wei
This patch add a new enum "arch_timer_spi_nr" and use it in the driver.
Just for code's readability, no functional change.
Signed-off-by: Fu Wei
Acked-by: Mark Rutland
---
drivers/clocksource/arm_arch_timer.c | 4 ++--
include/clocksource/arm_arch_timer.h | 6 ++
2 files chan
From: Fu Wei
This patch defines pr_fmt(fmt) for all pr_* functions,
then the pr_* doesn't need to add "arch_timer:" everytime.
According to the suggestion from checkpatch.pl:
(1) delete some Blank Spaces in arch_timer_banner;
(2) delete a redundant Tab in a bland line of arch_timer_init(void)
N
From: Fu Wei
Currently, the arch timer driver uses ARCH_TIMER_PHYS_SECURE_PPI to
mean the driver will use the secure PPI *and* potentialy also use the
non-secure PPI. This is somewhat confusing.
For arm64, where it never makes sense to use the secure PPI, this
means we must always request the us
From: Fu Wei
This patchset:
(1)Preparation for adding GTDT support in arm_arch_timer:
1. Move some enums and marcos to header file;
2. Add a new enum for spi type;
3. Improve printk relevant code;
4. Rename some enums and defines;
5. Rework PPI determin
On Tue, Dec 20, 2016 at 09:25:43AM -0800, Stephen Hemminger wrote:
> On Tue, 20 Dec 2016 18:55:59 +0300
> Roman Kagan wrote:
>
> > Userspace will need them too.
> >
> > Signed-off-by: Roman Kagan
>
> What userspace? I am worried about creating more stable API's that can't
> change.
QEMU in p
On Tue, Dec 20, 2016 at 11:56:51AM +0100, Lukas Wunner wrote:
> On Tue, Dec 20, 2016 at 06:21:28PM +0800, Chen Yu wrote:
> > This is a debug patch to descibe/workaround the issue
> > we encountered recently.
> >
> > Problem and the cause:
> > Currently we are suffering from *extremely* slow CPU on
On Tue, Dec 20, 2016 at 08:57:28PM +, KY Srinivasan wrote:
>
>
> > -Original Message-
> > From: Roman Kagan [mailto:rka...@virtuozzo.com]
> > Sent: Tuesday, December 20, 2016 7:56 AM
> > To: Paolo Bonzini ; Radim Krčmář
> > ; KY Srinivasan ; Vitaly
> > Kuznetsov
> > Cc: Thomas Gleixn
Eric Dumazet wrote:
> On Tue, 2016-12-20 at 22:28 -0500, George Spelvin wrote:
>> Cycles per byte on 1024 bytes of data:
>> Pentium Core 2 Ivy
>> 4 Duo Bridge
>> SipHash-2-4 38.9 8.3 5.8
>> HalfSipHash-2-4 12.7 4.5 3
Hi Jaehoon,
On Monday 19 December 2016 01:47 PM, Jaehoon Chung wrote:
> Removed the duplicated codes.
> It can use the more simply than now.
>
> Signed-off-by: Jaehoon Chung
> ---
> drivers/pci/host/pci-exynos.c | 22 --
> 1 file changed, 8 insertions(+), 14 deletions(-)
>
Hi Jaehoon,
On Monday 19 December 2016 01:47 PM, Jaehoon Chung wrote:
> Just use the bitops api to operate the bit.
>
> Signed-off-by: Jaehoon Chung
> ---
> drivers/pci/host/pci-exynos.c | 24
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
Reviewed-by: Pankaj D
Hi Jaehoon,
On Monday 19 December 2016 01:47 PM, Jaehoon Chung wrote:
> Remove the unnecessary variables(elbi/phy/block_base).
> It needs one resource structure for assigning each resource.
> So it replaces with one 'res' variable.
>
> Signed-off-by: Jaehoon Chung
> ---
> drivers/pci/host/pci-e
Hi Mathias,
I have some comments for the implementation of xhci_abort_cmd_ring() below.
On 12/20/2016 11:13 PM, Mathias Nyman wrote:
> On 20.12.2016 09:30, Baolin Wang wrote:
> ...
>
> Alright, I gathered all current work related to xhci races and timeouts
> and put them into a branch:
>
> git://
Hi Jaehoon,
On Monday 19 December 2016 01:47 PM, Jaehoon Chung wrote:
> There is no reason to maintain *_blk/phy/elbi_* as register accessors.
> It can be replaced to one register accessor.
>
> Signed-off-by: Jaehoon Chung
> ---
Looks fine. Nice cleanup :)
Reviewed-by: Pankaj Dubey
According to the documentation, we should set the EXTCON_USB when
one SDP charger connector was reported.
Signed-off-by: Baolin Wang
---
drivers/phy/phy-rockchip-inno-usb2.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/phy-rockchip-inno-usb2.c
b/drive
Current there is both "EXTCON_USB" and "EXTCON_CHG_USB_SDP" which
both seem to suggest a standard downstream port. But there is no
documentation describing how these relate.
Thus add documentation to describe EXTCON_CHG_USB_SDP should always
appear together with EXTCON_USB, and EXTCON_CHG_USB_ACA
According to the documentation, we should set the EXTCON_USB when
one SDP charger connector was reported.
Signed-off-by: Baolin Wang
---
drivers/extcon/extcon-axp288.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-axp288.c b/drivers/extcon/ext
From: Smitha T Murthy
For some IPs, there may be virtual child devices created and for them its
necessary to set the dma_ops if it's using reserved memory else it will call
the dummy dma_ops during buffer operations for the child devices which will
lead to memory mapping failure.
Signed-off-by:
Hi Marek,
On Tuesday 20 December 2016 05:28 PM, Marek Szyprowski wrote:
> Hi Pankaj
>
>
> On 2016-12-16 12:48, Pankaj Dubey wrote:
>> It has been observed on ARM64 based Exynos SoC, if IOMMU is not enabled
>> and we try to use reserved memory for MFC, reqbufs fails with below
>> mentioned error
On Tue, 2016-12-20 at 22:28 -0500, George Spelvin wrote:
> > I do not see why SipHash, if faster than MD5 and more secure, would be a
> > problem.
>
> Because on 32-bit x86, it's slower.
>
> Cycles per byte on 1024 bytes of data:
> Pentium Core 2 Ivy
>
Here, If devm_ioremap_nocache will fail. It will return NULL.
Kernel can run into a NULL-pointer dereference. This error check
will avoid NULL pointer dereference.
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/sti/sti_vtg.c |4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu
If you have a process that has set itself to be non-dumpable, and it
then undergoes exec(2), any CLOEXEC file descriptors it has open are
"exposed" during a race window between the dumpable flags of the process
being reset for exec(2) and CLOEXEC being applied to the file
descriptors. This can be e
Hi Sven,
[auto build test ERROR on linus/master]
[also build test ERROR on next-20161221]
[cannot apply to v4.9]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Sven-Schmidt/Update-LZ4-compressor
"Luis R. Rodriguez" writes:
> OK -- if userspace messes up again it may be a bit hard to prove
> unless we have a validation debug thing in place, would such a thing
> in debug form be reasonable ?
That makes perfect sense. Untested hack:
diff --git a/fs/filesystems.c b/fs/filesystems.c
index c
Here, If devm_ioremap_nocache will fail. It will return NULL.
Kernel can run into a NULL-pointer dereference. This error check
will avoid NULL pointer dereference.
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/sti/sti_vtac.c |4
1 file changed, 4 insertions(+)
diff --git a/drivers/gp
Hi Sven,
[auto build test ERROR on linus/master]
[also build test ERROR on next-20161221]
[cannot apply to v4.9]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Sven-Schmidt/Update-LZ4-compressor
Hi Sven,
[auto build test ERROR on linus/master]
[also build test ERROR on next-20161221]
[cannot apply to v4.9]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Sven-Schmidt/Update-LZ4-compressor
On 12/19/2016 at 11:23 AM, Baoquan He wrote:
> On 12/09/16 at 03:16pm, Xunlei Pang wrote:
>> On 12/09/2016 at 01:13 PM, zhong jiang wrote:
>>> On 2016/12/8 17:41, Xunlei Pang wrote:
On 12/08/2016 at 10:37 AM, zhongjiang wrote:
> From: zhong jiang
>
> A soft lookup will occur when
@@ -1287,6 +1287,13 @@ void setup_new_exec(struct linux_binprm * bprm)
/* This is the point of no return */
current->sas_ss_sp = current->sas_ss_size = 0;
+ /*
+* We have to apply CLOEXEC before we change whether the process is
+* dumpable to avoid a race wit
On Mon, Dec 19, 2016 at 03:38:35PM +0100, Michael Kerrisk (man-pages) wrote:
> # Some open questions about this patch below.
> #
> One of the rules regarding capabilities is:
>
> A process that resides in the parent of the user namespace and
> whose effective user ID matches the owner of t
On Tue, Dec 20, 2016 at 07:40:24PM -0800, Paul E. McKenney wrote:
[...]
> >
> > Agreed, my intent is to keep this overcare check for couples of releases
> > and if no one shoots his/her foot, we can remove it, if not, it
> > definitely means this part is subtle, and we need to pay more attention
>
To prevent corruption of the stage-1 context pointer field when
updating STEs, rebuild the entire containing dword instead of
clearing individual fields.
Signed-off-by: Nate Watterson
---
drivers/iommu/arm-smmu-v3.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/d
Hi Stafford,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.9 next-20161221]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Stafford-Horne/openrisc-Define-__kernel_size
On Fri, Dec 16, 2016 at 04:59:16PM -0800, Brian Norris wrote:
> In the pattern of many other devices, support a system-sleep pin
> configuration.
>
> Signed-off-by: Brian Norris
> ---
> Documentation/devicetree/bindings/spi/spi-rockchip.txt | 7 +++
> drivers/spi/spi-rockchip.c
On Tue, Dec 20, 2016 at 10:49:25AM -0800, Andy Lutomirski wrote:
> >> FWIW, everywhere I say ioctl(), the bpf() syscall would be okay, too.
> >> It doesn't make a semantic difference, except that I dislike
> >> BPF_PROG_DETACH because that particular command isn't BPF-specific at
> >> all.
> >
> >
On Wed, Dec 21 2016, Baolin Wang wrote:
> Hi,
>
> On 21 December 2016 at 06:07, NeilBrown wrote:
>> On Tue, Dec 20 2016, Baolin Wang wrote:
>>
>>> Hi Neil,
>>>
>>> On 3 November 2016 at 09:25, NeilBrown wrote:
On Tue, Nov 01 2016, Baolin Wang wrote:
>> So I won't be responding
> On Dec 20, 2016, at 9:23 PM, Joe Perches wrote:
>
>> On Tue, 2016-12-20 at 20:58 -0600, Scott Matheina wrote:
>> Fixed indention and space issues to align the code with the linux style
>> guide.
> []
>> diff --git a/drivers/staging/iio/addac/adt7316.c
>> b/drivers/staging/iio/addac/adt7316.
On Fri, Dec 16, 2016 at 04:52:29PM +0100, Bartosz Golaszewski wrote:
> Extend the fixed regulator's device tree bindings with a new
> compatible describing GPIO-driven power load switches.
>
> Signed-off-by: Bartosz Golaszewski
> ---
> Documentation/devicetree/bindings/regulator/fixed-regulator.
On Wed, Dec 21, 2016 at 10:34:56AM +0800, Boqun Feng wrote:
> On Tue, Dec 20, 2016 at 07:23:52AM -0800, Paul E. McKenney wrote:
> > On Tue, Dec 20, 2016 at 01:59:14PM +0800, Boqun Feng wrote:
> > > On Mon, Dec 19, 2016 at 09:09:13PM -0800, Paul E. McKenney wrote:
> > > > On Mon, Dec 19, 2016 at 11:
On 12/20/2016 08:25 PM, John Crispin wrote:
> From: Ash Benz
Looks fine, but please do add a meaningful commit message.
> Signed-off-by: John Crispin
> Signed-off-by: Ash Benz
> ---
> drivers/mtd/spi-nor/spi-nor.c |1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/spi-no
On 12/20/2016 08:25 PM, John Crispin wrote:
> From: André Valentin
>
> Signed-off-by: John Crispin
> Signed-off-by: André Valentin
> ---
> drivers/mtd/spi-nor/spi-nor.c |1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>
On 12/20/2016 09:41 PM, John Crispin wrote:
> From: "Larry D. Pinney"
>
> Add Support for the ESMT_F25L32QA and ESMT_F25L64QA
> These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory
> Technology
>
> Signed-off-by: John Crispin
> Signed-off-by: Larry D. Pinney
It looks OK:
Acked
> I do not see why SipHash, if faster than MD5 and more secure, would be a
> problem.
Because on 32-bit x86, it's slower.
Cycles per byte on 1024 bytes of data:
Pentium Core 2 Ivy
4 Duo Bridge
SipHash-2-4 38.9 8.3 5.8
On Tue, 2016-12-20 at 20:58 -0600, Scott Matheina wrote:
> Fixed indention and space issues to align the code with the linux style guide.
[]
> diff --git a/drivers/staging/iio/addac/adt7316.c
> b/drivers/staging/iio/addac/adt7316.c
[]
> @@ -176,16 +176,16 @@
> */
>
> struct adt7316_chip_info {
> Hi Marcin,
>
> Le 13/12/2016 à 10:46, Krzeminski, Marcin (Nokia - PL/Wroclaw) a écrit :
> >
> >
> >> -Original Message-
> >> From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf
> >> Of Cyrille Pitchen
> >> Sent: Monday, November 21, 2016 3:16 PM
> >> To: computersf
From: Florian Fainelli
Date: Tue, 20 Dec 2016 17:02:37 -0800
> On 12/14/2016 05:13 PM, Florian Fainelli wrote:
>> The Octeon driver calls into PHYLIB which now checks for
>> net_device->dev.parent, so make sure we do set it before calling into
>> any MDIO/PHYLIB related function.
>>
>> Fixes: ec
On 20/12/2016 8:31 PM, Mel Gorman wrote:
On Mon, Dec 12, 2016 at 01:59:07PM +0800, Jia He wrote:
In commit b9f00e147f27 ("mm, page_alloc: reduce branches in
zone_statistics"), it reconstructed codes to reduce the branch miss rate.
Compared with the original logic, it assumed if !(flag & __GFP_
On 20/12/2016 5:18 PM, Michal Hocko wrote:
On Mon 12-12-16 13:59:07, Jia He wrote:
In commit b9f00e147f27 ("mm, page_alloc: reduce branches in
zone_statistics"), it reconstructed codes to reduce the branch miss rate.
Compared with the original logic, it assumed if !(flag & __GFP_OTHER_NODE)
Fixed indention and space issues to align the code with the linux style guide.
Signed-off-by: Scott Matheina
---
drivers/staging/iio/addac/adt7316.c | 603
1 file changed, 266 insertions(+), 337 deletions(-)
diff --git a/drivers/staging/iio/addac/adt7316.c
Hi,
On 21 December 2016 at 06:07, NeilBrown wrote:
> On Tue, Dec 20 2016, Baolin Wang wrote:
>
>> Hi Neil,
>>
>> On 3 November 2016 at 09:25, NeilBrown wrote:
>>> On Tue, Nov 01 2016, Baolin Wang wrote:
>>>
>>>
> So I won't be responding on this topic any further until I see a genuine
>
On 20/12/16 10:34 pm, Pali Rohár wrote:
On Tuesday 20 December 2016 07:00:41 Chris Lapa wrote:
I can generate a patch to fix this issue, however the bigger problem
exists as to which revision fuel gauge the bq27xxx_battery.c driver
is intended to support for each family.
Hi! I think driver sho
These changes where identified by checkpatch.pl as needed changes to
align the code with the linux development coding style. The several
lines of text where aligned with the precending parenthesis.
Signed-off-by: Scott Matheina
---
drivers/staging/fbtft/fb_agm1264k-fl.c | 18 ++
On Tue, Dec 20, 2016 at 07:23:52AM -0800, Paul E. McKenney wrote:
> On Tue, Dec 20, 2016 at 01:59:14PM +0800, Boqun Feng wrote:
> > On Mon, Dec 19, 2016 at 09:09:13PM -0800, Paul E. McKenney wrote:
> > > On Mon, Dec 19, 2016 at 11:15:15PM +0800, Boqun Feng wrote:
> > > > On Thu, Dec 15, 2016 at 02:
On Tue, Dec 20, 2016 at 11:56:51AM +0100, Lukas Wunner wrote:
Hi Lukas,
> On Tue, Dec 20, 2016 at 06:21:28PM +0800, Chen Yu wrote:
> > This is a debug patch to descibe/workaround the issue
> > we encountered recently.
> >
> > Problem and the cause:
> > Currently we are suffering from *extremely* s
On Tue, Dec 20, 2016 at 11:16:31AM -0500, Geoff Lansberry wrote:
> From: Geoff Lansberry
>
> The TRF7970A has configuration options for supporting hardware designs
> with 1.8 Volt or 3.3 Volt IO. This commit adds a device tree option,
> using a fixed regulator binding, for setting the io voltag
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