> I reckon the easiest way forward would be to pass in some flag to
> arch_setup_dma_ops to indicate whether it's an explicitly-configured
> range or not - then simply initialising parent_dma_mask to ~0 for the
> default case *should* keep things working as before.
Tried to do that.
---
Nikita
> I reckon the easiest way forward would be to pass in some flag to
> arch_setup_dma_ops to indicate whether it's an explicitly-configured
> range or not - then simply initialising parent_dma_mask to ~0 for the
> default case *should* keep things working as before.
Tried to do that.
---
Nikita
There are cases when device supports wide DMA addresses wider than
device's connection supports.
In this case driver sets DMA mask based on knowledge of device
capabilities. That must succeed to allow drivers to initialize.
However, swiotlb or iommu still need knowledge about actual device
There are cases when device supports wide DMA addresses wider than
device's connection supports.
In this case driver sets DMA mask based on knowledge of device
capabilities. That must succeed to allow drivers to initialize.
However, swiotlb or iommu still need knowledge about actual device
* Tony Lindgren [170111 08:29]:
> * Linus Walleij [170111 07:34]:
> > On Tue, Jan 10, 2017 at 8:19 PM, Tony Lindgren wrote:
> >
> > > Below is an experimental fix to intorduce pinctrl_start() that I've
> > > tested with
* Tony Lindgren [170111 08:29]:
> * Linus Walleij [170111 07:34]:
> > On Tue, Jan 10, 2017 at 8:19 PM, Tony Lindgren wrote:
> >
> > > Below is an experimental fix to intorduce pinctrl_start() that I've
> > > tested with pinctrl-single. Then we should probably make all pin
> > > controller
> >
On Mon, Dec 12, 2016 at 11:30:20AM -0700, Jason Gunthorpe wrote:
> The PCI core will write to the bridge window config multiple times
> while they are enabled. This can lead to mbus failures like:
>
> mvebu_mbus: cannot add window '4:e8', conflicts with another window
> mvebu-pcie
On Mon, Dec 12, 2016 at 11:30:20AM -0700, Jason Gunthorpe wrote:
> The PCI core will write to the bridge window config multiple times
> while they are enabled. This can lead to mbus failures like:
>
> mvebu_mbus: cannot add window '4:e8', conflicts with another window
> mvebu-pcie
On 11/01/17 12:37, Nikita Yushchenko wrote:
>> I actually have a third variation of this problem involving a PCI root
>> complex which *could* drive full-width (40-bit) addresses, but won't,
>> due to the way its PCI<->AXI interface is programmed. That would require
>> even more complicated
On 11/01/17 12:37, Nikita Yushchenko wrote:
>> I actually have a third variation of this problem involving a PCI root
>> complex which *could* drive full-width (40-bit) addresses, but won't,
>> due to the way its PCI<->AXI interface is programmed. That would require
>> even more complicated
On Mon, Jan 09, 2017 at 05:02:21PM -0800, Andi Kleen wrote:
SNIP
> $(OUTPUT)test-all.bin:
> - $(BUILD) -fstack-protector-all -O2 -D_FORTIFY_SOURCE=2 -ldw -lelf
> -lnuma -lelf -laudit -I/usr/include/slang -lslang $(shell $(PKG_CONFIG)
> --libs --cflags gtk+-2.0 2>/dev/null)
On Mon, Jan 09, 2017 at 05:02:21PM -0800, Andi Kleen wrote:
SNIP
> $(OUTPUT)test-all.bin:
> - $(BUILD) -fstack-protector-all -O2 -D_FORTIFY_SOURCE=2 -ldw -lelf
> -lnuma -lelf -laudit -I/usr/include/slang -lslang $(shell $(PKG_CONFIG)
> --libs --cflags gtk+-2.0 2>/dev/null)
On 01/11/2017 01:03 PM, Jason Gunthorpe wrote:
On Wed, Jan 11, 2017 at 11:00:43AM +0100, Andreas Fuchs wrote:
could we please get an ioctl, that switches the "mode" of the fd entirely.
I'd like to see the write()/read() support still intact.
All my current code uses main-loop based poll on the
On Fri, Dec 16, 2016 at 08:57:26AM +0100, Luis R. Rodriguez wrote:
> On Thu, Dec 15, 2016 at 05:56:19PM +0100, Petr Mladek wrote:
> > On Thu 2016-12-08 11:49:20, Luis R. Rodriguez wrote:
> > > This adds helpers for getting access to the kmod count and limit from
> > > userspace. While at it, this
On 01/11/2017 01:03 PM, Jason Gunthorpe wrote:
On Wed, Jan 11, 2017 at 11:00:43AM +0100, Andreas Fuchs wrote:
could we please get an ioctl, that switches the "mode" of the fd entirely.
I'd like to see the write()/read() support still intact.
All my current code uses main-loop based poll on the
On Fri, Dec 16, 2016 at 08:57:26AM +0100, Luis R. Rodriguez wrote:
> On Thu, Dec 15, 2016 at 05:56:19PM +0100, Petr Mladek wrote:
> > On Thu 2016-12-08 11:49:20, Luis R. Rodriguez wrote:
> > > This adds helpers for getting access to the kmod count and limit from
> > > userspace. While at it, this
On Wed, 2017-01-11 at 10:56 -0700, Jason Gunthorpe wrote:
> On Wed, Jan 11, 2017 at 07:39:53AM -0800, James Bottomley wrote:
>
> > RAW access means the ability to DoS the TPM simply by exhausting
> > handles. Therefore, I think most applications only get RM access.
>
> Re-read what Jarkko is
On Wed, 2017-01-11 at 10:56 -0700, Jason Gunthorpe wrote:
> On Wed, Jan 11, 2017 at 07:39:53AM -0800, James Bottomley wrote:
>
> > RAW access means the ability to DoS the TPM simply by exhausting
> > handles. Therefore, I think most applications only get RM access.
>
> Re-read what Jarkko is
On 01/11/2017 06:29 AM, Kirill A. Shutemov wrote:
> +#define mmap_max_addr() \
> +({ \
> + unsigned long max_addr = min(TASK_SIZE, rlimit(RLIMIT_VADDR)); \
> + /* At the moment, MPX cannot handle addresses above 47-bits */
On 01/11/2017 06:29 AM, Kirill A. Shutemov wrote:
> +#define mmap_max_addr() \
> +({ \
> + unsigned long max_addr = min(TASK_SIZE, rlimit(RLIMIT_VADDR)); \
> + /* At the moment, MPX cannot handle addresses above 47-bits */
On 11/01/17 18:06, Catalin Marinas wrote:
> Some minor comments below, nothing fundamental (as long as you say the
> new sequence doesn't have the speculative TLB load problem I mentioned
> on a previous version).
>
> On Wed, Jan 11, 2017 at 09:41:15AM -0500, Christopher Covington wrote:
>> diff
On 11/01/17 18:06, Catalin Marinas wrote:
> Some minor comments below, nothing fundamental (as long as you say the
> new sequence doesn't have the speculative TLB load problem I mentioned
> on a previous version).
>
> On Wed, Jan 11, 2017 at 09:41:15AM -0500, Christopher Covington wrote:
>> diff
On Wed, Jan 11, 2017 at 12:09 AM, Herbert Xu
wrote:
> On Wed, Jan 11, 2017 at 08:06:54AM +, Ard Biesheuvel wrote:
>>
>> Couldn't we update the __aligned(x) macro to emit 32 if arch == x86
>> and x == 16? All other cases should work just fine afaict
>
> Not
On Wed, Jan 11, 2017 at 12:09 AM, Herbert Xu
wrote:
> On Wed, Jan 11, 2017 at 08:06:54AM +, Ard Biesheuvel wrote:
>>
>> Couldn't we update the __aligned(x) macro to emit 32 if arch == x86
>> and x == 16? All other cases should work just fine afaict
>
> Not everyone uses that macro. You'd
During fixing CRIU bugs on ZDTM tests for 32-bit C/R, I found that
compatible ia32/x32 syscalls mmap() and mmap2() can return address
over 4Gb in x86_64 applications, which results in returning lower
4 bytes of address while dropping the higher bytes.
It happens because mmap() upper limit doesn't
A fix for bug in mmap() that I referenced in [1].
Also selftest for it.
I would like to mark the fix as for stable v4.9 kernel if it'll
be accepted, as I try to support compatible 32-bit C/R
after v4.9 and working compatible mmap() is really wanted there.
[1]:
During fixing CRIU bugs on ZDTM tests for 32-bit C/R, I found that
compatible ia32/x32 syscalls mmap() and mmap2() can return address
over 4Gb in x86_64 applications, which results in returning lower
4 bytes of address while dropping the higher bytes.
It happens because mmap() upper limit doesn't
A fix for bug in mmap() that I referenced in [1].
Also selftest for it.
I would like to mark the fix as for stable v4.9 kernel if it'll
be accepted, as I try to support compatible 32-bit C/R
after v4.9 and working compatible mmap() is really wanted there.
[1]:
We can't just add segfault handler and use addr, returned by compat
mmap() syscall, because the lower 4 bytes can be the same as already
existed VMA. So, the test parses /proc/self/maps file, founds new
VMAs those appeared after compatible sys_mmap() and checks if mmaped
VMA is in that list.
On
We can't just add segfault handler and use addr, returned by compat
mmap() syscall, because the lower 4 bytes can be the same as already
existed VMA. So, the test parses /proc/self/maps file, founds new
VMAs those appeared after compatible sys_mmap() and checks if mmaped
VMA is in that list.
On
On Wed, Jan 11, 2017 at 1:09 AM, Daniel Borkmann wrote:
> Hi Andy,
>
> On 01/11/2017 04:11 AM, Andy Lutomirski wrote:
>>
>> On Tue, Jan 10, 2017 at 4:50 PM, Daniel Borkmann
>> wrote:
>>>
>>> On 01/11/2017 12:24 AM, Andy Lutomirski wrote:
On Wed, Jan 11, 2017 at 1:09 AM, Daniel Borkmann wrote:
> Hi Andy,
>
> On 01/11/2017 04:11 AM, Andy Lutomirski wrote:
>>
>> On Tue, Jan 10, 2017 at 4:50 PM, Daniel Borkmann
>> wrote:
>>>
>>> On 01/11/2017 12:24 AM, Andy Lutomirski wrote:
This makes it easier to add another digest
On Fri, 2017-01-06 at 10:43 +0100, Nicolas Dichtel wrote:
> Regularly, when a new header is created in include/uapi/, the developer
> forgets to add it in the corresponding Kbuild file. This error is usually
> detected after the release is out.
>
> In fact, all headers under uapi directories
On Fri, 2017-01-06 at 10:43 +0100, Nicolas Dichtel wrote:
> Regularly, when a new header is created in include/uapi/, the developer
> forgets to add it in the corresponding Kbuild file. This error is usually
> detected after the release is out.
>
> In fact, all headers under uapi directories
Hi,
Please pull MD update for 4.10-rc3. Basically one fix for raid5 cache which is
merged in this cycle, others are trival fixes.
Thanks,
Shaohua
The following changes since commit 0c744ea4f77d72b3dcebb7a8f2684633ec79be88:
Linux 4.10-rc2 (2017-01-01 14:31:53 -0800)
are available in the git
Hi,
Please pull MD update for 4.10-rc3. Basically one fix for raid5 cache which is
merged in this cycle, others are trival fixes.
Thanks,
Shaohua
The following changes since commit 0c744ea4f77d72b3dcebb7a8f2684633ec79be88:
Linux 4.10-rc2 (2017-01-01 14:31:53 -0800)
are available in the git
On 01/11/2017 08:56 AM, Khalid Aziz wrote:
> On 01/11/2017 09:33 AM, Dave Hansen wrote:
>> On 01/11/2017 08:12 AM, Khalid Aziz wrote:
>>> A userspace task enables ADI through mprotect(). This patch series adds
>>> a page protection bit PROT_ADI and a corresponding VMA flag
>>> VM_SPARC_ADI.
From: "Edward A. James"
Add functions to send SCOM operations over I2C bus. The BMC can
communicate with the Power8 host processor over I2C, but needs to use SCOM
operations in order to access the OCC register space.
Signed-off-by: Edward A. James
On 01/11/2017 08:56 AM, Khalid Aziz wrote:
> On 01/11/2017 09:33 AM, Dave Hansen wrote:
>> On 01/11/2017 08:12 AM, Khalid Aziz wrote:
>>> A userspace task enables ADI through mprotect(). This patch series adds
>>> a page protection bit PROT_ADI and a corresponding VMA flag
>>> VM_SPARC_ADI.
From: "Edward A. James"
Add functions to send SCOM operations over I2C bus. The BMC can
communicate with the Power8 host processor over I2C, but needs to use SCOM
operations in order to access the OCC register space.
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
From: "Edward A. James"
Add functions to parse the data structures that are specific to the OCC on
the POWER8 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."
Signed-off-by: Edward A. James
From: "Edward A. James"
Add functions to parse the data structures that are specific to the OCC on
the POWER8 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
On Wed, Jan 11, 2017 at 7:13 AM, David Laight wrote:
> From: Andy Lutomirski
>> Sent: 10 January 2017 23:25
>> There are some hashes (e.g. sha224) that have some internal trickery
>> to make sure that only the correct number of output bytes are
>> generated. If something
From: "Edward A. James"
Add core support for polling the OCC for it's sensor data and parsing that
data into sensor-specific information.
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
Documentation/hwmon/occ| 40
On Wed, Jan 11, 2017 at 7:13 AM, David Laight wrote:
> From: Andy Lutomirski
>> Sent: 10 January 2017 23:25
>> There are some hashes (e.g. sha224) that have some internal trickery
>> to make sure that only the correct number of output bytes are
>> generated. If something goes wrong, they could
From: "Edward A. James"
Add core support for polling the OCC for it's sensor data and parsing that
data into sensor-specific information.
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
Documentation/hwmon/occ| 40
drivers/hwmon/Kconfig | 2 +
From: "Edward A. James"
Add code to tie the hwmon sysfs code and the POWER8 OCC code together, as
well as probe the entire driver from the I2C bus. I2C is the communication
method between the BMC and the P8 OCC.
Signed-off-by: Edward A. James
From: "Edward A. James"
Add code to tie the hwmon sysfs code and the POWER8 OCC code together, as
well as probe the entire driver from the I2C bus. I2C is the communication
method between the BMC and the P8 OCC.
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
From: "Edward A. James"
Add functions to parse the data structures that are specific to the OCC on
the POWER9 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."
Signed-off-by: Edward A. James
From: "Edward A. James"
Add functions to parse the data structures that are specific to the OCC on
the POWER9 processor. These are the sensor data structures, including
temperature, frequency, power, and "caps."
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
From: "Edward A. James"
Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
Documentation/hwmon/occ | 62 ++
From: "Edward A. James"
Add a generic mechanism to expose the sensors provided by the OCC in
sysfs.
Signed-off-by: Edward A. James
Signed-off-by: Andrew Jeffery
---
Documentation/hwmon/occ | 62 ++
drivers/hwmon/occ/Makefile| 2 +-
drivers/hwmon/occ/occ_sysfs.c | 274
From: "Edward A. James"
This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.
The
From: "Edward A. James"
This patchset adds a hwmon driver to support the OCC (On-Chip Controller)
on the IBM POWER8 and POWER9 processors, from a BMC (Baseboard Management
Controller). The OCC is an embedded processor that provides real time
power and thermal monitoring.
The driver provides an
On Wed, Jan 11, 2017 at 6:29 AM, Kirill A. Shutemov
wrote:
> On Thu, Jan 05, 2017 at 12:49:44PM -0800, Dave Hansen wrote:
>> On 01/05/2017 12:14 PM, Andy Lutomirski wrote:
>> >> I'm not sure I'm comfortable with this. Do other rlimit changes cause
>> >> silent data
On Wed, Jan 11, 2017 at 6:29 AM, Kirill A. Shutemov
wrote:
> On Thu, Jan 05, 2017 at 12:49:44PM -0800, Dave Hansen wrote:
>> On 01/05/2017 12:14 PM, Andy Lutomirski wrote:
>> >> I'm not sure I'm comfortable with this. Do other rlimit changes cause
>> >> silent data corruption? I'm pretty sure
On Wed, Jan 11, 2017 at 03:06:45PM +, Nicholas Mc Guire wrote:
> On Wed, Jan 11, 2017 at 02:59:26PM +, Mark Brown wrote:
> > If you're doing conversions like this I'd expect us to be picking the
> > lower number rather than the higher number - people are saying "wait for
> > at least X
On Wed, Jan 11, 2017 at 03:06:45PM +, Nicholas Mc Guire wrote:
> On Wed, Jan 11, 2017 at 02:59:26PM +, Mark Brown wrote:
> > If you're doing conversions like this I'd expect us to be picking the
> > lower number rather than the higher number - people are saying "wait for
> > at least X
Some minor comments below, nothing fundamental (as long as you say the
new sequence doesn't have the speculative TLB load problem I mentioned
on a previous version).
On Wed, Jan 11, 2017 at 09:41:15AM -0500, Christopher Covington wrote:
> diff --git a/Documentation/arm64/silicon-errata.txt
>
Some minor comments below, nothing fundamental (as long as you say the
new sequence doesn't have the speculative TLB load problem I mentioned
on a previous version).
On Wed, Jan 11, 2017 at 09:41:15AM -0500, Christopher Covington wrote:
> diff --git a/Documentation/arm64/silicon-errata.txt
>
On Wed, Jan 11, 2017 at 11:00:43AM +0100, Andreas Fuchs wrote:
> could we please get an ioctl, that switches the "mode" of the fd entirely.
> I'd like to see the write()/read() support still intact.
> All my current code uses main-loop based poll on the fd and I don't want
> to be force to start
On Wed, Jan 11, 2017 at 11:00:43AM +0100, Andreas Fuchs wrote:
> could we please get an ioctl, that switches the "mode" of the fd entirely.
> I'd like to see the write()/read() support still intact.
> All my current code uses main-loop based poll on the fd and I don't want
> to be force to start
On Wed, Jan 11, 2017 at 12:51 PM, Vitaly Wool wrote:
> On Wed, Jan 11, 2017 at 6:39 PM, Dan Streetman wrote:
>> On Wed, Jan 11, 2017 at 12:27 PM, Vitaly Wool wrote:
>>> On Wed, Jan 11, 2017 at 6:08 PM, Dan Streetman
On Wed, Jan 11, 2017 at 12:51 PM, Vitaly Wool wrote:
> On Wed, Jan 11, 2017 at 6:39 PM, Dan Streetman wrote:
>> On Wed, Jan 11, 2017 at 12:27 PM, Vitaly Wool wrote:
>>> On Wed, Jan 11, 2017 at 6:08 PM, Dan Streetman wrote:
On Wed, Jan 11, 2017 at 10:06 AM, Vitaly Wool wrote:
> With
From: "Huang, Ying"
The patch is to improve the scalability of the swap out/in via using
fine grained locks for the swap cache. In current kernel, one address
space will be used for each swap device. And in the common
configuration, the number of the swap device is very
On 01/10/2017 06:06 PM, Bjorn Helgaas wrote:
> On Tue, Jan 10, 2017 at 12:18:29PM -0500, Murali Karicheri wrote:
>> On 01/10/2017 10:12 AM, Bjorn Helgaas wrote:
>>> Hi Murali,
>>>
>>> On Wed, Jan 04, 2017 at 02:32:30PM -0500, Murali Karicheri wrote:
Recent fixes for iATU unroll support
From: "Huang, Ying"
swap_info_get() is used not only in swap free code path but also in
page_swapcount(), etc. So the original kernel message in
swap_info_get() is not correct now. Fix it via replacing "swap_free" to
"swap_info_get" in the message.
Signed-off-by: "Huang,
On 01/11/2017 05:00 AM, Thomas Gleixner wrote:
> On Tue, 10 Jan 2017, Dave Jiang wrote:
>> +unsigned long simple_strtoul(const char *cp, char **endp, unsigned int
>> base);
>> +long simple_strtol(const char *cp, char **endp, unsigned int base);
>
> What are those functions for? They are not
From: "Huang, Ying"
The patch is to improve the scalability of the swap out/in via using
fine grained locks for the swap cache. In current kernel, one address
space will be used for each swap device. And in the common
configuration, the number of the swap device is very small (one is
typical).
On 01/10/2017 06:06 PM, Bjorn Helgaas wrote:
> On Tue, Jan 10, 2017 at 12:18:29PM -0500, Murali Karicheri wrote:
>> On 01/10/2017 10:12 AM, Bjorn Helgaas wrote:
>>> Hi Murali,
>>>
>>> On Wed, Jan 04, 2017 at 02:32:30PM -0500, Murali Karicheri wrote:
Recent fixes for iATU unroll support
From: "Huang, Ying"
swap_info_get() is used not only in swap free code path but also in
page_swapcount(), etc. So the original kernel message in
swap_info_get() is not correct now. Fix it via replacing "swap_free" to
"swap_info_get" in the message.
Signed-off-by: "Huang, Ying"
Signed-off-by:
On 01/11/2017 05:00 AM, Thomas Gleixner wrote:
> On Tue, 10 Jan 2017, Dave Jiang wrote:
>> +unsigned long simple_strtoul(const char *cp, char **endp, unsigned int
>> base);
>> +long simple_strtol(const char *cp, char **endp, unsigned int base);
>
> What are those functions for? They are not
On Wed, Jan 11, 2017 at 07:39:53AM -0800, James Bottomley wrote:
> RAW access means the ability to DoS the TPM simply by exhausting
> handles. Therefore, I think most applications only get RM access.
Re-read what Jarkko is proposing. He is not making a complete safe &
secure RM in the kernel.
On Wed, Jan 11, 2017 at 07:39:53AM -0800, James Bottomley wrote:
> RAW access means the ability to DoS the TPM simply by exhausting
> handles. Therefore, I think most applications only get RM access.
Re-read what Jarkko is proposing. He is not making a complete safe &
secure RM in the kernel.
Add new functions that free unused swap slots in batches without
the need to reacquire swap info lock. This improves scalability
and reduce lock contention.
Signed-off-by: Tim Chen
Co-developed-by: "Huang, Ying"
---
include/linux/swap.h | 1
Currently, the swap slots are allocated one page at a time,
causing contention to the swap_info lock protecting the swap partition
on every page being swapped.
This patch adds new functions get_swap_pages and scan_swap_map_slots
to request multiple swap slots at once. This will reduces the lock
Add new functions that free unused swap slots in batches without
the need to reacquire swap info lock. This improves scalability
and reduce lock contention.
Signed-off-by: Tim Chen
Co-developed-by: "Huang, Ying"
---
include/linux/swap.h | 1 +
mm/swapfile.c| 155
Currently, the swap slots are allocated one page at a time,
causing contention to the swap_info lock protecting the swap partition
on every page being swapped.
This patch adds new functions get_swap_pages and scan_swap_map_slots
to request multiple swap slots at once. This will reduces the lock
On 01/10/2017 11:00 PM, Keerthy wrote:
> The Davinci GPIO driver is implemented to work with one monolithic
> Davinci GPIO platform device which may have up to Y(144) gpios.
> The Davinci GPIO driver instantiates number of GPIO chips with
> max 32 gpio pins per each during initialization and one
On 01/10/2017 11:00 PM, Keerthy wrote:
> The Davinci GPIO driver is implemented to work with one monolithic
> Davinci GPIO platform device which may have up to Y(144) gpios.
> The Davinci GPIO driver instantiates number of GPIO chips with
> max 32 gpio pins per each during initialization and one
From: "Huang, Ying"
This patch is to reduce the lock contention of swap_info_struct->lock
via using a more fine grained lock in swap_cluster_info for some swap
operations. swap_info_struct->lock is heavily contended if multiple
processes reclaim pages simultaneously.
From: "Huang, Ying"
This patch is to reduce the lock contention of swap_info_struct->lock
via using a more fine grained lock in swap_cluster_info for some swap
operations. swap_info_struct->lock is heavily contended if multiple
processes reclaim pages simultaneously. Because there is only one
Thanks. Pulled, going through my usual allmodconfig test-build before
being pushed out,
Linus
On Wed, Jan 11, 2017 at 7:22 AM, David Miller wrote:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git
Thanks. Pulled, going through my usual allmodconfig test-build before
being pushed out,
Linus
On Wed, Jan 11, 2017 at 7:22 AM, David Miller wrote:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git
This drops the "ti-" prefix from the module name. It makes the module name
consistent with other iio ti-ads* drivers and it makes the driver work
with device tree (the spi subsystem drops the "ti," prefix when matching
compatible strings from device tree).
Tested working on LEGO MINDSTORMS EV3
From: Huang Ying
Because during swap off, a swap entry may have swap_map[] ==
SWAP_HAS_CACHE (for example, just allocated). If we return NULL in
__read_swap_cache_async(), the swap off will abort. So when swap slot
cache is disabled, (for swap off), we will wait for page
Change Log:
v5:
1. Rebase patch series on 4.10-rc3 kernel. Update patch series to remove
usage of obsoleted hot plug functions: cpu_notifier_register_begin(),
cpu_notifier_register_done(), and __register_hotcpu_notifier()
2. Fix a bug returning uninitialized swap slot when we run
out of swap
We can avoid needlessly allocating page for swap slots that
are not used by anyone. No pages have to be read in for
these slots.
Signed-off-by: Tim Chen
Co-developed-by: "Huang, Ying"
---
include/linux/swap.h | 6 ++
mm/swap_state.c |
We add per cpu caches for swap slots that can be allocated and freed
quickly without the need to touch the swap info lock.
Two separate caches are maintained for swap slots allocated and swap
slots returned. This is to allow the swap slots to be returned to the
global pool in a batch so they
Initialize swap slots cache and enable it on swap on.
Drain all swap slots on swap off.
Signed-off-by: Tim Chen
---
mm/swapfile.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/mm/swapfile.c b/mm/swapfile.c
index e6c30ed..14d9ea2 100644
---
This drops the "ti-" prefix from the module name. It makes the module name
consistent with other iio ti-ads* drivers and it makes the driver work
with device tree (the spi subsystem drops the "ti," prefix when matching
compatible strings from device tree).
Tested working on LEGO MINDSTORMS EV3
From: Huang Ying
Because during swap off, a swap entry may have swap_map[] ==
SWAP_HAS_CACHE (for example, just allocated). If we return NULL in
__read_swap_cache_async(), the swap off will abort. So when swap slot
cache is disabled, (for swap off), we will wait for page to be put
into swap
Change Log:
v5:
1. Rebase patch series on 4.10-rc3 kernel. Update patch series to remove
usage of obsoleted hot plug functions: cpu_notifier_register_begin(),
cpu_notifier_register_done(), and __register_hotcpu_notifier()
2. Fix a bug returning uninitialized swap slot when we run
out of swap
We can avoid needlessly allocating page for swap slots that
are not used by anyone. No pages have to be read in for
these slots.
Signed-off-by: Tim Chen
Co-developed-by: "Huang, Ying"
---
include/linux/swap.h | 6 ++
mm/swap_state.c | 4
mm/swapfile.c| 47
We add per cpu caches for swap slots that can be allocated and freed
quickly without the need to touch the swap info lock.
Two separate caches are maintained for swap slots allocated and swap
slots returned. This is to allow the swap slots to be returned to the
global pool in a batch so they
Initialize swap slots cache and enable it on swap on.
Drain all swap slots on swap off.
Signed-off-by: Tim Chen
---
mm/swapfile.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/mm/swapfile.c b/mm/swapfile.c
index e6c30ed..14d9ea2 100644
--- a/mm/swapfile.c
+++ b/mm/swapfile.c
@@
This changes the reference voltage regulator matching string from "refin"
to "vref". This is to be consistent with other A/DC chips that also use
"vref-supply" in their device tree bindings.
Signed-off-by: David Lechner
---
drivers/iio/adc/ti-ads7950.c | 6 +++---
1 file
This changes the reference voltage regulator matching string from "refin"
to "vref". This is to be consistent with other A/DC chips that also use
"vref-supply" in their device tree bindings.
Signed-off-by: David Lechner
---
drivers/iio/adc/ti-ads7950.c | 6 +++---
1 file changed, 3
This series adds device tree bindings for the TI ADS7950 family of A/DC chips.
The series includes the bindings documentation and some fixes to the iio driver
to make it work with the device tree bindings.
FYI, the ads7950 driver has not made it into mainline yet, so no worries about
breaking
This series adds device tree bindings for the TI ADS7950 family of A/DC chips.
The series includes the bindings documentation and some fixes to the iio driver
to make it work with the device tree bindings.
FYI, the ads7950 driver has not made it into mainline yet, so no worries about
breaking
701 - 800 of 1868 matches
Mail list logo