On Tue, Mar 21, 2017 at 07:04:45PM -0700, l...@pengaru.com wrote:
> On Thu, Mar 16, 2017 at 08:13:40PM +, Bowers, AndrewX wrote:
> > Tested this on a Thinkpad T420i, after verifying it also has an e1000e NIC,
> > unable to reproduce. Might be limited to that particular model/firmware
> > ver
On Thu, Mar 16, 2017 at 08:13:40PM +, Bowers, AndrewX wrote:
> Tested this on a Thinkpad T420i, after verifying it also has an e1000e NIC,
> unable to reproduce. Might be limited to that particular model/firmware
> version you're using, which I was not able to track down here although there
percpu_ref_switch_to_atomic_sync() schedules the switch
to atomic mode, then waits for it to complete.
Also export percpu_ref_switch_to_* so they can be used from modules.
This will be used in md/raid to count the number of pending write
requests to an array.
We occasionally need to check if the
On Tue, 2017-03-21 at 16:51 -0700, Kees Cook wrote:
> Am I understanding you correctly that you'd want something like:
>
> refcount.h:
> #ifdef UNPROTECTED_REFCOUNT
> #define refcount_inc(x) atomic_inc(x)
> ...
> #else
> void refcount_inc(...
> ...
> #endif
>
> some/net.c:
> #define UNPROTECTE
For RK3399, the grf clock should be controlled by dw-mipi-dsi driver,
add the description for this clock.
Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
---
Changes in v4:
- remove "additional"
Changes in v3: None
Changes in v2: None
.../devicetree/bindings/display/rockchip/dw_mipi_dsi_ro
Dear Kernel Hackers,
I'm Jason Cai, a kernel developer from Dell EMC. I hit the same issue as the
one Lennart Sorensen sent at Dec 19, 2016.
I narrow down the issue now. It seems that an unexpected DNA
(Device not Available) may be triggered in the `execve` code path.
Specifically, it exists bet
For RK3399, the grf clk should be enabled before writing grf registers,
otherwise the register value can not be changed.
Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
---
Changes in v4:
- print the err after clk_prepare_enable(dsi->grf_clk)
Changes in v3:
- add a DW_MIPI_NEEDS_GRF_CLK for
For RK3399, the phy_cfg_clk is a required clock, if phy_cfg_clk is
disabled, MIPI phy can not work. Let's return a error if there is no
phy_cfg_clk in dts property, when the pdata match RK3399.
Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
---
Changes in v4: None
Changes in v3:
- add a DW_M
For the RK3399, the grf_switch_reg name should be RK3399_GRF_SOC_CON20,
not RK3399_GRF_SOC_CON19.
Signed-off-by: Chris Zhong
Reviewed-by: Brian Norris
Reviewed-by: Sean Paul
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++--
1 fil
Hi all
This series set the phy_cfg_clk to be a required clock for RK3399, and
add a grf clock control in dw-mipi-dsi driver. And then correct a
register name.
Changes in v4:
- remove "additional"
- print the err after clk_prepare_enable(dsi->grf_clk)
Changes in v3:
- add a DW_MIPI_NEEDS_PHY_CFG
The Innolux P079ZCA is a 7.85" panel with a 768X1024 resolution and
connected to DSI using four lanes.
Signed-off-by: Chris Zhong
Reviewed-by: Brian Norris
---
Changes in v3: None
Changes in v2: None
.../bindings/display/panel/innolux,p079zca.txt | 23 ++
1 file change
Support Innolux P079ZCA 7.85" 768x1024 TFT LCD panel, it is a MIPI DSI
panel.
Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
Tested-by: Brian Norris
---
Changes in v3:
- printk err after regulator_disable(innolux->supply)
Changes in v2:
- add some error check
- always use Low power mode to
Bah, I forgot to add the "v4" in the subject (like I did for this
email).
-- Steve
On Tue, 21 Mar 2017 21:35:02 -0400
Steven Rostedt wrote:
> [
> Ingo, Thomas or H.Peter,
>
> I believe this is all set to go now. I updated those patches that
> Linus commented on and I don't believe there ar
From: "Steven Rostedt (VMware)"
The function hook ftrace_caller does not create its own stack frame, and
this causes the ftrace stack trace to miss the first function when doing
stack traces.
# echo schedule:stacktrace > /sys/kernel/tracing/set_ftrace_filter
Before:
-0 [002] .N..
From: "Steven Rostedt (VMware)"
Currently ftrace_32.S and ftrace_64.S are compiled even when
CONFIG_FUNCTION_TRACER is not set. This means there's an unnecessary #ifdef
to protect the code. Instead of using preprocessor directives, only compile
those files when FUNCTION_TRACER is defined.
Link:
From: "Steven Rostedt (VMware)"
The function tracing hook code for ftrace is not an entry point from
userspace and does not belong in the entry_*.S files. It has already been
moved out of entry_64.S. This moves it out of entry_32.S into its own
ftrace_32.S file.
Signed-off-by: Steven Rostedt (VM
[
Ingo, Thomas or H.Peter,
I believe this is all set to go now. I updated those patches that Linus
commented on and I don't believe there are any more issues. I ran this
through several tests (although some of my tests are failing due to
bugs introduced by others in 4.11-rc2). You can take th
From: "Steven Rostedt (VMware)"
When ftrace_regs_caller was created, it was designed to preserve flags as
much as possible as it needed to act just like a breakpoint triggered on the
same location. But the design is over complicated as it treated all
operations as modifying flags. But push, mov a
Hi inki,
Could you check the this patch?
For reference, patch 1/5 and 2/5 have already been applied to Krzysztof
tree.
Best regards,
Hoegeun
On 03/08/2017 01:54 PM, Hoegeun Kwon wrote:
The dsi + panel is a parental relationship, so OF grpah is not needed.
Therefore, the current dsi_parse_dt
From: "Steven Rostedt (VMware)"
With the advent of -mfentry that uses the new "fentry" hook over mcount, the
mcount name is obsolete. Having the code file that ftrace hooks into called
"mcount*.S" is rather misleading. Rename it to ftrace_64.S
Signed-off-by: Steven Rostedt (VMware)
---
arch/x8
From: "Steven Rostedt (VMware)"
x86_64 has had fentry support for some time. I did not add support to x86_32
as I was unsure if it will be used much in the future. It is still very much
used, and there's issues with function graph tracing with gcc playing around
with the mcount frames, causing fu
From: Wanpeng Li
This can be reproduced by running L2 on L1, and disable VPID on L0 if w/o
commit "KVM: nVMX: Fix nested VPID vmx exec control", the L2 crash as below:
KVM: entry failed, hardware error 0x7
EAX= EBX= ECX= EDX=000306c3
ESI= EDI= EBP=000
Hi,
On 2017년 03월 22일 03:37, Andy Shevchenko wrote:
> The commit 942c7924a51e introduced a check for ACPI handle for the
> device that never appears on any ACPI-enabled platform so far. It seems
> a confusion with extcon-intel-int3496 which does support ACPI-enabled
> platforms.
Only for the reaso
On Wednesday, March 22, 2017 09:01:48 AM Lee, Chun-Yi wrote:
> Just checking the state of container is not enough to confirm that
> the whole container is offlined.
And why is that so?
> Kernel should checks all children's
> offline state as the logic in acpi_container_offline().
>
> Cc: "Rafael
Add method for getting and setting tiocm.
Signed-off-by: Sebastian Reichel
---
Changes since PATCHv2:
* fix serdev_device_set_tiocm inline definition for disabled SERDEV
* use instead of
---
drivers/tty/serdev/core.c | 22 ++
drivers/tty/serdev/serdev-ttyport.c
From: Rafael J. Wysocki
sugov_update_commit() calls trace_cpu_frequency() to record the
current CPU frequency if it has not changed in the fast switch case
to prevent utilities from getting confused (they may report that the
CPU is idle if the frequency has not been recorded for too long, for
exa
Just checking the state of container is not enough to confirm that
the whole container is offlined. Kernel should checks all children's
offline state as the logic in acpi_container_offline().
Cc: "Rafael J. Wysocki"
Cc: Len Brown
Cc: Michal Hocko
Cc: Jiri Kosina
Signed-off-by: "Lee, Chun-Yi"
Hi,
I already replied the some comment from v2 patch[1]
[1] https://patchwork.kernel.org/patch/9630101/
--
Best Regards,
Chanwoo Choi
Samsung Electronics
On 2017년 03월 21일 06:30, Hans de Goede wrote:
> Add a driver for charger detection / control on the Intel Cherrytrail
> Whiskey Cove PMIC.
>
On Mon, 20 Mar 2017 09:04:25 -0500
Josh Poimboeuf wrote:
> On Sat, Mar 18, 2017 at 05:09:29PM -0400, Steven Rostedt wrote:
> > From: "Steven Rostedt (VMware)"
> >
> > Currently ftrace_32.S and ftrace_64.S are compiled even when
> > CONFIG_FUNCTION_TRACER is not set. This means there's an
> > un
From: Andreas Gruenbacher
Date: Sat, 18 Mar 2017 00:36:15 +0100
> Add rhashtable_lookup_get_insert_fast for fixed keys, similar to
> rhashtable_lookup_get_insert_key for explicit keys.
>
> Signed-off-by: Andreas Gruenbacher
> Acked-by: Herbert Xu
Applied to net-next, thanks.
0a6b76dd23fa ("mm: workingset: make shadow node shrinker memcg aware")
enabled cgroup-awareness in the shadow node shrinker, but forgot to
also enable cgroup-awareness in the list_lru the shadow nodes sit on.
Consequently, all shadow nodes are sitting on a global (per-NUMA node)
list, while the sh
Huge pages are accounted as single units in the memcg's "file_mapped"
counter. Account the correct number of base pages, like we do in the
corresponding node counter.
Signed-off-by: Johannes Weiner
---
include/linux/memcontrol.h | 6 ++
mm/rmap.c | 4 ++--
2 files changed, 8
On Tue, Mar 21, 2017 at 4:51 PM, Andy Lutomirski wrote:
> On Tue, Mar 21, 2017 at 3:32 PM, Andy Lutomirski wrote:
>> On Tue, Mar 21, 2017 at 2:11 PM, Linus Torvalds
>> wrote:
>>> On Tue, Mar 21, 2017 at 1:25 PM, Thomas Garnier wrote:
The issue seems to be related to exceptions happening in
On Tue, Mar 14, 2017 at 11:52:08AM +0100, Alexandre Belloni wrote:
> Arnd, Olof,
>
> Here are two fixes for 4.11. The revert is reverting a DT patch that
> went through the USB tree but should have never been applied.
>
> The second patch fixes an issue were the SoC hangs when using
> at91_cpuidl
This was broken in commit cd979883b9ede90643e019f33cb317933eb867b4.
do_suspend (from xen/manage.c) and thus xen_resume_notifier never get
called on the initial-domain at resume (it is if running as guest.)
The rationale for the breaking change was that upload_pm_data()
potentially does blocking wo
Motorola CPCAP is a PMIC (power management integrated circuit) found
in multiple smartphones. This driver adds support for the chip's LED
controllers. This introduces support for all controllers used by the
Droid 4. According to Motorola's driver (no datasheets available)
there a couple of more LED
This fixes compilation for files, that try to include the
cpcap header in alphabetically sorted #include lists.
Signed-off-by: Sebastian Reichel
---
This patch is new, since PATCHv1 did not order the includes
in the led driver alphabetically.
---
include/linux/mfd/motorola-cpcap.h | 3 +++
1 fil
From: Hayes Wang
Date: Fri, 17 Mar 2017 11:20:13 +0800
> Check hw version first in probe(). Do nothing if the driver doesn't
> support the chip.
>
> Signed-off-by: Hayes Wang
Applied, thanks.
Hello,
So Rob, how do you see this going? Shall we introduce a serdev_device
*tty_port_register_serdev_device(tty, device)? Will you work on it or
should I give it a try?
Samuel
Samuel Thibault, on mer. 15 mars 2017 16:03:23 +0100, wrote:
> Rob Herring, on mer. 15 mars 2017 09:45:59 -0500, wrot
Dear Josh,
On 2017-03-21 21:44, Paul Menzel wrote:
On 2017-03-16 14:56, Josh Poimboeuf wrote:
Paul Menzel reported a warning:
WARNING: CPU: 0 PID: 774 at
/build/linux-ROBWaj/linux-4.9.13/kernel/trace/trace_functions_graph.c:233
ftrace_return_to_handler+0x1aa/0x1e0
Bad frame pointer: expe
On Tue, Mar 21, 2017 at 3:32 PM, Andy Lutomirski wrote:
> On Tue, Mar 21, 2017 at 2:11 PM, Linus Torvalds
> wrote:
>> On Tue, Mar 21, 2017 at 1:25 PM, Thomas Garnier wrote:
>>> The issue seems to be related to exceptions happening in close pages
>>> to the fixmap GDT remapping.
>>>
>>> The origi
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/i915/i915_gem_shrinker.c
between commit:
3d3d18f086cd ("drm/i915: Avoid rcu_barrier() from reclaim paths (shrinker)")
from the drm-intel-fixes tree and commit:
519d52498156 ("drm/i915: i915_gem_shrink_a
On Thu, Mar 16, 2017 at 11:46:38AM +0900, js1...@gmail.com wrote:
> From: Joonsoo Kim
>
> Benefit of deduplication is dependent on the workload so it's not
> preferable to always enable. Therefore, make it optional.
Please make it to Kconfig, too. And write down the description to impress
"help
> On Mar 21, 2017, at 3:51 PM, Gabriel Somlo wrote:
>
> And I get the exact same results on the MacBookAir4,2 (which exhibits
> no freezing or extreme sluggishness when running OS X 10.7 smp with
> Michael's KVM MWAIT-in-L1 patch)...
Sorry for my confusion. I didn’t read the entire thread and t
Hi Arnd, Olof,
I forgot to add [GIT PULL] tag,
I am re-sending. Sorry.
Here are UniPhier DT (64bit) updates for the v4.12 merge window.
Please pull!
The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
are available in the
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/i915/i915_gem_context.c
between commit:
590379aef2e3 ("drm/i915: make context status notifier head be per engine")
from the drm-intel-fixes tree and commits:
2355cf088d46 ("drm/i915: Create context desc
On Tue, Mar 21, 2017 at 2:23 PM, Eric Dumazet wrote:
> On Tue, 2017-03-21 at 13:49 -0700, Kees Cook wrote:
>
>> Yeah, this is exactly what I'd like to find as well. Just comparing
>> cycles between refcount implementations, while interesting, doesn't
>> show us real-world performance changes, whic
The 104-idi-48 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kerne
On 03/21/2017 04:27 AM, Russell King - ARM Linux wrote:
On Mon, Mar 20, 2017 at 06:23:24PM +0100, Philipp Zabel wrote:
@@ -1173,15 +1196,8 @@ static void csi_try_fmt(struct csi_priv *priv,
incc = imx_media_find_mbus_format(infmt->code,
Hi Arnd, Olof,
Here are UniPhier DT (64bit) updates for the v4.12 merge window.
Please pull!
The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/k
Changes since v1[1]:
- Dropped already applied patches in pinctrl, gpio, and mux trees.
- Gained three new patches destined for gpio tree, due to loosening
constraints in
the semantic patch.
The following patchset introduces a new coccinelle patch,
irq_chip_raw_spinlock.cocci, which is used
On Tue, Mar 21, 2017 at 09:40:47PM +0200, bod...@mellanox.com wrote:
>From: Bodong Wang
>
>Sometimes it is not desirable to probe the virtual functions after
>SRIOV is enabled. This can save host side resource usage by VF
>instances which would be eventually probed to VMs.
>
>Added a new PCI sysfs
On Tue, Mar 21, 2017 at 11:05 AM, Cyrill Gorcunov wrote:
> /I renamed the mail's subject/
>
> On Tue, Mar 21, 2017 at 10:45:57AM -0700, Andy Lutomirski wrote:
>> >> + task_pt_regs(current)->orig_ax |= __X32_SYSCALL_BIT;
>> >> current->thread.status &= ~TS_COMPAT;
>> >
>>
From: Dmitry Torokhov
For GPIO-backed pins that are not configured as wakeup sources, we may
miss change in their state that happens while system is suspended. Let's
use PM notifier to refresh their state upon resume.
Signed-off-by: Dmitry Torokhov
---
include/sound/soc.h | 1 +
sound/soc/so
Hi Neil,
Quoting Neil Armstrong (2017-03-13 06:26:42)
> @@ -821,6 +893,7 @@ struct pll_params_table gxbb_gp0_params_table[] = {
> &gxbb_hdmi_pll,
> &gxbb_sys_pll,
> &gxbb_gp0_pll,
> + &gxl_gp0_pll,
Is there a reason for adding the pointer to this array here? It seems
On Tue, Mar 21, 2017 at 02:34:46PM +, Eli Cohen wrote:
>> If we want to talk about the ABI, I would suggest drawing from existing
>> ABIs. We already have
>> drivers_autoprobe as part of the standard sysfs ABI, so if we want a binary
>> switch, then
>>sriov_drivers_autoprobe might be a logi
The 104-idio-16 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kern
On Tue, Mar 21, 2017 at 08:23:29AM -0600, Alex Williamson wrote:
>On Tue, 21 Mar 2017 20:25:18 +1100
>Gavin Shan wrote:
>> On Tue, Mar 21, 2017 at 12:01:58AM -0600, Alex Williamson wrote:
>> >On Tue, 21 Mar 2017 16:43:05 +1100
>> >Gavin Shan wrote:
>> >> On Mon, Mar 20, 2017 at 10:57:08PM -0600
Hi Arnd, Olof,
Here are UniPhier DT (32bit) updates for the v4.12 merge window.
Please pull!
The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/k
Hi Russell,
On 03/19/2017 03:49 AM, Russell King wrote:
Add frame size and frame interval enumeration to CSI.
CSI can scale the image independently horizontally and vertically by a
factor of two, which enumerates to four different frame sizes.
CSI can also drop frames, resulting in frame rate
On Wed, Mar 22, 2017 at 07:29:50AM +1300, Derek Robson wrote:
> On Tue, Mar 21, 2017 at 08:56:25AM +0100, Greg KH wrote:
> > On Sun, Mar 19, 2017 at 01:07:17PM +1300, Derek Robson wrote:
> > > Fixed style of all block comments across whole driver
> > > Found by checkpatch
> > >
> > > Signed-off-by
Hi Joonsoo,
On Thu, Mar 16, 2017 at 11:46:37AM +0900, js1...@gmail.com wrote:
> From: Joonsoo Kim
>
> This patch implements deduplication feature in zram. The purpose
> of this work is naturally to save amount of memory usage by zram.
>
> Android is one of the biggest users to use zram as swap
Quoting Neil Armstrong (2017-03-13 06:26:40)
> In recent Amlogic GXBB, GXL and GXM SoCs, the GP0 PLL needs some specific
> parameters in order to initialize and lock correctly.
>
> This patch adds an optional PARAM table used to initialize the PLL to a
> default value with it's parameters in order
2017-03-12 0:36 GMT+09:00 Masahiro Yamada :
> The eMMC devices on UniPhier boards are generally used in the 8-bit
> mode. So, DAT4-7 pins should be controlled.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> arch/arm/boot/dts/uniphier-pinctrl.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletio
2017-03-12 0:38 GMT+09:00 Masahiro Yamada :
> Now everything is ready to enable this pinctrl.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 2 ++
> arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++
> 2 files changed, 4 insertions(+)
Appli
This patch series re-enables the upload of PM data from initial-domain
to Xen. This was broken in commit cd979883b9ede90643e019f33cb317933eb867b4.
The upload now happens post-resume in workqueue context. From the
POV of Xen, the PM upload might be delayed a little but should be
fine -- Xen falls-b
The alpha/marvel code currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, i
Quoting Jerome Brunet (2017-03-09 02:41:51)
> Use read/write operations for the mpll clocks instead of the
> read-only ones.
>
> Signed-off-by: Jerome Brunet
Looks good to me.
Regards,
Mike
> ---
> drivers/clk/meson/gxbb.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> dif
Hi Philipp, Russell,
On 03/20/2017 10:23 AM, Philipp Zabel wrote:
Hi Steve, Russell,
What do you think of this:
--8<--
From 2830aebc404bdfc9d7fc1ec94e5282d0b668e8f6 Mon Sep 17 00:00:00 2001
From: Philipp Zabel
Date: Mon, 20 Mar 2017 17:10:21 +0100
Subject: [PATCH] media: im
Hi Neil,
Quoting Neil Armstrong (2017-03-09 04:53:46)
> The Mali is clocked by two identical clock paths behind a glitch free mux
> to safely change frequency while running.
>
> The two "mali_0" and "mali_1" clocks are composed of a mux, divider and gate.
> Expose these two clocks trees using gen
Quoting Jerome Brunet (2017-03-09 02:41:52)
> Signed-off-by: Jerome Brunet
Hmm, even for obvious patches like this it is still better to have some
sort of changelog :-/
Otherwise patch appears fine to me.
Regards,
Mike
> ---
> drivers/clk/meson/meson8b.c | 103
> +
Quoting Jerome Brunet (2017-03-09 02:41:48)
> Until now, there was only 1 divider and 1 mux declared for the meson8b
> platform. With the ongoing work on various system, including audio, this
> is about to change. Use the same approach as gates for dividers and muxes,
> putting them in tables to fi
Quoting Jerome Brunet (2017-03-09 02:41:50)
> This patch adds new callbacks to the meson-mpll driver to control
> and set the pll rate. For this, we also need to add the enable bit and
> sdm enable bit. The corresponding parameters are added to mpll data
> structure.
>
> Signed-off-by: Jerome Brun
Quoting Neil Armstrong (2017-03-09 04:53:45)
> Add missing MALI clock IDs and expose the muxes and gates in the dt-bindings.
>
> Signed-off-by: Neil Armstrong
Looks good to me.
Regards,
Mike
> ---
> drivers/clk/meson/gxbb.h | 9 -
> include/dt-bindings/clock/gxbb-clkc.h |
Quoting Jerome Brunet (2017-03-09 02:41:49)
> Until now, there was only 2 dividers and 2 muxes declared for the gxbb
> platform. With the ongoing work on various subsystem, including audio,
> this is about to change. Use the same approach as gates for dividers and
> muxes, putting them in tables to
On Tue, 21 Mar 2017 23:28:45 +0100
Linus Lüssing wrote:
> However, the IP code drops it in the beginning of ip_input.c/ip_rcv()
> as the dnat target did not update the skb->pkt_type. If after
> dnat'ing the packet is now destined to us then the skb->pkt_type
> needs to be updated from PACKET_OTHE
The t7l66xb mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels,
The mpc52xx_gpt code currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it
The calculation of the global physical address (GPA) on UV4 is
incorrect. The gnode_extra/upper global offset should only be
applied for fixed address space systems (UV1..3).
Signed-off-by: Mike Travis
Tested-by: John Estabrook
---
arch/x86/include/asm/uv/uv_hub.h |8 +---
arch/x86/k
From: Rafael J. Wysocki
The way the schedutil governor uses the PELT metric causes it to
underestimate the CPU utilization in some cases.
That can be easily demonstrated by running kernel compilation on
a Sandy Bridge Intel processor, running turbostat in parallel with
it and looking at the valu
From: Oliver Neukum
Date: Tue, 21 Mar 2017 12:33:03 +0100
> Am Donnerstag, den 16.03.2017, 23:18 +0100 schrieb Philippe Reynes:
>> The ethtool api {get|set}_settings is deprecated.
>> We add the new api {get|set}_link_ksettings to this driver.
>>
>> As I don't have the hardware, I'd be very plea
On Tue, 21 Mar 2017 11:10:49 -0300
Arnaldo Carvalho de Melo wrote:
> Em Tue, Feb 07, 2017 at 10:52:17AM +0530, Ravi Bangoria escreveu:
> > Thanks Masami for the review.
> >
> > On Tuesday 07 February 2017 08:41 AM, Masami Hiramatsu wrote:
> > > On Thu, 2 Feb 2017 16:41:41 +0530
> > > Ravi Bango
From: Philippe Reynes
Date: Thu, 16 Mar 2017 23:18:46 +0100
> The ethtool api {get|set}_settings is deprecated. On usbnet, it
> was often implemented with usbnet_{get|set}_settings.
>
> In this serie, I add usbnet_{get|set}_link_ksettings
> in the first patch, then I update all the driver to
> u
Replace hard coded "ACPI0007" with ACPI_PROCESSOR_DEVICE_HID
Reviewed-by: Konrad Rzeszutek Wilk
Signed-off-by: Ankur Arora
---
drivers/xen/xen-acpi-processor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/xen/xen-acpi-processor.c b/drivers/xen/xen-acpi-processor.c
The tc6393xb mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels,
On Tue, Mar 21, 2017 at 12:29 PM, Diego Viola wrote:
> On Tue, Mar 21, 2017 at 10:04 AM, Diego Viola wrote:
>> On Mon, Mar 20, 2017 at 8:15 PM, Diego Viola wrote:
>>> On Mon, Mar 20, 2017 at 3:27 PM, Diego Viola wrote:
On Mon, Mar 20, 2017 at 1:32 PM, Mathias Nyman
wrote:
> On 20
CPCAP can sense if IRQ is currently set or not. This
functionality is required for a few subdevices, such
as the power button and usb phy modules.
Acked-by: Tony Lindgren
Signed-off-by: Sebastian Reichel
---
Changes since PATCHv2:
- Collect Acked-by/Tested-by
- Fix typo in EXPORT_SYMBOL_GPL
--
Motorola CPCAP is a PMIC found in multiple smartphones.
This driver adds support for the power/on button and has
been tested in Droid 4.
Acked-by: Rob Herring
Acked-by: Dmitry Torokhov
Tested-by: Tony Lindgren
Signed-off-by: Sebastian Reichel
---
Changes since PATCHv2:
- Collect Acked-by/Test
On Tue, Mar 21, 2017 at 08:22:39PM +0100, Radim Krčmář wrote:
> 2017-03-21 10:29-0700, Nadav Amit:
> >
> > > On Mar 21, 2017, at 9:58 AM, Radim Krčmář wrote:
> >
> > > In '-smp 2', the writing VCPU always does 1 wakeups by writing into
> > > monitored memory, but the mwaiting VCPU can be als
The pci-idio-16 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kern
Add support for ARM Common Platform Error Record (CPER).
UEFI 2.6 specification adds support for ARM specific
processor error information to be reported as part of the
CPER records. This provides more detail on for processor error logs.
Signed-off-by: Tyler Baicar
CC: Jonathan (Zhixiong) Zhang
R
The asic3 mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it
UEFI spec allows for non-standard section in Common Platform Error
Record. This is defined in section N.2.3 of UEFI version 2.5.
Currently if the CPER section's type (UUID) does not match with
any section type that the kernel knows how to parse, trace event
is not generated for such section. And t
Currently there are trace events for the various RAS
errors with the exception of ARM processor type errors.
Add a new trace event for such errors so that the user
will know when they occur. These trace events are
consistent with the ARM processor error section type
defined in UEFI 2.6 spec section
Currently external aborts are unsupported by the guest abort
handling. Add handling for SEAs so that the host kernel reports
SEAs which occur in the guest kernel.
Signed-off-by: Tyler Baicar
---
arch/arm/include/asm/kvm_arm.h | 10 +
arch/arm/include/asm/system_misc.h | 5 +
On PREEMPT_RT, the spinlock_t type becomes an object which sleeps under
contention. The codepaths used to support scheduling (irq dispatching, arch
code, the scheduler, timers) therefore must make use of the
raw_spin_lock{,_irq,_irqsave}() variations which preserve the non-sleeping
spinlock behavi
UEFI spec allows for non-standard section in Common Platform Error
Record. This is defined in section N.2.3 of UEFI version 2.5.
Currently if the CPER section's type (UUID) does not match with
one of the section types that the kernel knows how to parse, the
section is skipped. Therefore, user is n
ARM APEI extension proposal added SEA (Synchronous External Abort)
notification type for ARMv8.
Add a new GHES error source handling function for SEA. If an error
source's notification type is SEA, then this function can be registered
into the SEA exception handler. That way GHES will parse and rep
From: "Jonathan (Zhixiong) Zhang"
Even if an error status block's severity is fatal, the kernel does not
honor the severity level and panic.
With the firmware first model, the platform could inform the OS about a
fatal hardware error through the non-NMI GHES notification type. The OS
should pani
SEA exceptions are often caused by an uncorrected hardware
error, and are handled when data abort and instruction abort
exception classes have specific values for their Fault Status
Code.
When SEA occurs, before killing the process, report the error
in the kernel logs.
Update fault_info[] with spec
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