The Allwinner SoCs all have an ADC that can also act as a touchscreen
controller and a thermal sensor. The first four channels can be used
either for the ADC or the touchscreen and the fifth channel is used for
the thermal sensor. We currently have a driver for the two latter
functions in
The Allwinner SoCs all have an ADC that can also act as a touchscreen
controller and a thermal sensor. The first four channels can be used
either for the ADC or the touchscreen and the fifth channel is used for
the thermal sensor. We currently have a driver for the two latter
functions in
backlight: Add support for Arctic Sand LED backlight driver chips
This driver provides support for the Arctic Sand arc2c0608 chip,
and provides a framework to support future devices.
Reviewed-by: Daniel Thompson
Signed-off-by: Olimpiu Dejeu
backlight: Add devicetree bindings for the Arctic Sand backlight driver
This patch provides devicetree bindings for the Arctic Sand
driver submitted in the previous patch
Acked-by: Rob Herring
Acked-by: Daniel Thompson
Signed-off-by: Olimpiu Dejeu
backlight: Add support for Arctic Sand LED backlight driver chips
This driver provides support for the Arctic Sand arc2c0608 chip,
and provides a framework to support future devices.
Reviewed-by: Daniel Thompson
Signed-off-by: Olimpiu Dejeu
---
v8 => v9:
- Addressing kbuild test robot
backlight: Add devicetree bindings for the Arctic Sand backlight driver
This patch provides devicetree bindings for the Arctic Sand
driver submitted in the previous patch
Acked-by: Rob Herring
Acked-by: Daniel Thompson
Signed-off-by: Olimpiu Dejeu
---
v8 => v9:
- Version updated to match
2017-03-21 05:22+0200, Michael S. Tsirkin:
> On Fri, Mar 17, 2017 at 09:23:56AM -0400, Gabriel L. Somlo wrote:
>> OK, now on to Radim's test, on the MacPro1,1:
>>
>> [kvm-unit-tests]$ time TIMEOUT=20 ./x86-run x86/mwait.flat -append '240 1 1'
>> timeout -k 1s --foreground 20 qemu-kvm -nodefaults
2017-03-21 05:22+0200, Michael S. Tsirkin:
> On Fri, Mar 17, 2017 at 09:23:56AM -0400, Gabriel L. Somlo wrote:
>> OK, now on to Radim's test, on the MacPro1,1:
>>
>> [kvm-unit-tests]$ time TIMEOUT=20 ./x86-run x86/mwait.flat -append '240 1 1'
>> timeout -k 1s --foreground 20 qemu-kvm -nodefaults
On 21 March 2017 at 15:58, Peter Zijlstra wrote:
>
> On Tue, Mar 21, 2017 at 03:16:19PM +0100, Vincent Guittot wrote:
> > On 21 March 2017 at 15:03, Peter Zijlstra wrote:
> >
> > > On Tue, Mar 21, 2017 at 02:37:08PM +0100, Vincent Guittot wrote:
> > >
On 21 March 2017 at 15:58, Peter Zijlstra wrote:
>
> On Tue, Mar 21, 2017 at 03:16:19PM +0100, Vincent Guittot wrote:
> > On 21 March 2017 at 15:03, Peter Zijlstra wrote:
> >
> > > On Tue, Mar 21, 2017 at 02:37:08PM +0100, Vincent Guittot wrote:
> > > > On 21 March 2017 at 14:22, Peter Zijlstra
On Tue, Mar 21, 2017 at 10:18 PM, Alison Schofield wrote:
> On Mon, Mar 20, 2017 at 01:36:21AM +0530, simran singhal wrote:
>
> Hi Simran,
>
> I going to ask for a v7 without looking at the code ;)
> Subject line needs subsystem and driver.
> Subject and log message can be
On Tue, Mar 21, 2017 at 10:18 PM, Alison Schofield wrote:
> On Mon, Mar 20, 2017 at 01:36:21AM +0530, simran singhal wrote:
>
> Hi Simran,
>
> I going to ask for a v7 without looking at the code ;)
> Subject line needs subsystem and driver.
> Subject and log message can be improved.
Hi Alison,
I
On 21 March 2017 at 18:00, Vincent Guittot wrote:
> On 21 March 2017 at 15:58, Peter Zijlstra wrote:
>>
>> On Tue, Mar 21, 2017 at 03:16:19PM +0100, Vincent Guittot wrote:
>> > On 21 March 2017 at 15:03, Peter Zijlstra
On 21 March 2017 at 18:00, Vincent Guittot wrote:
> On 21 March 2017 at 15:58, Peter Zijlstra wrote:
>>
>> On Tue, Mar 21, 2017 at 03:16:19PM +0100, Vincent Guittot wrote:
>> > On 21 March 2017 at 15:03, Peter Zijlstra wrote:
>> >
>> > > On Tue, Mar 21, 2017 at 02:37:08PM +0100, Vincent Guittot
On 21/03/17 16:57, Alexey Klimov wrote:
> It is allowed by code to register mailbox controller that sets txdone_poll
> flag to request timer-based polling with missed ->last_tx_done() method.
> If such thing happens and since presence of last_tx_done() is not checked
> it will fail in hrtimer
On 21/03/17 16:57, Alexey Klimov wrote:
> It is allowed by code to register mailbox controller that sets txdone_poll
> flag to request timer-based polling with missed ->last_tx_done() method.
> If such thing happens and since presence of last_tx_done() is not checked
> it will fail in hrtimer
On Tue, Mar 21, 2017 at 05:39:38PM +0100, Julia Lawall wrote:
>
>
> On Tue, 21 Mar 2017, Arushi Singhal wrote:
>
> > On Tue, Mar 21, 2017 at 9:33 PM, Alison Schofield
> > wrote:
> > On Tue, Mar 21, 2017 at 07:00:17PM +0530, Arushi Singhal wrote:
> > >
On Tue, Mar 21, 2017 at 05:39:38PM +0100, Julia Lawall wrote:
>
>
> On Tue, 21 Mar 2017, Arushi Singhal wrote:
>
> > On Tue, Mar 21, 2017 at 9:33 PM, Alison Schofield
> > wrote:
> > On Tue, Mar 21, 2017 at 07:00:17PM +0530, Arushi Singhal wrote:
> > > Patchseries of IIO coding
On Tue, Mar 21, 2017 at 04:18:52PM +0100, Rafael J. Wysocki wrote:
> +static bool sugov_cpu_is_busy(struct sugov_cpu *sg_cpu)
> +{
> + unsigned long idle_calls = tick_nohz_get_idle_calls();
> + bool not_idle = idle_calls == sg_cpu->saved_idle_calls;
> +
> + sg_cpu->saved_idle_calls =
On Tue, Mar 21, 2017 at 04:18:52PM +0100, Rafael J. Wysocki wrote:
> +static bool sugov_cpu_is_busy(struct sugov_cpu *sg_cpu)
> +{
> + unsigned long idle_calls = tick_nohz_get_idle_calls();
> + bool not_idle = idle_calls == sg_cpu->saved_idle_calls;
> +
> + sg_cpu->saved_idle_calls =
backlight: Add arc to vendor prefixes
Signed-off-by: Olimpiu Dejeu
---
v8 => v9:
- Version updated to match other patch in set. No other changes.
v8:
- Version to match other patches in set
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1
backlight: Add arc to vendor prefixes
Signed-off-by: Olimpiu Dejeu
---
v8 => v9:
- Version updated to match other patch in set. No other changes.
v8:
- Version to match other patches in set
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
It is allowed by code to register mailbox controller that sets txdone_poll
flag to request timer-based polling with missed ->last_tx_done() method.
If such thing happens and since presence of last_tx_done() is not checked
it will fail in hrtimer callback function txdone_hrtimer() when first
It is allowed by code to register mailbox controller that sets txdone_poll
flag to request timer-based polling with missed ->last_tx_done() method.
If such thing happens and since presence of last_tx_done() is not checked
it will fail in hrtimer callback function txdone_hrtimer() when first
Hello,
On Tue, Mar 21, 2017 at 02:08:26PM +0530, Sekhar Nori wrote:
> > Looks fine to me from libata side. Once it gets tested, how should
> > the patches be routed? I don't think it'd make sense to route them
> > separately.
>
> Hi Tejun, I can take the series through ARM-SoC tree with your
Hello,
On Tue, Mar 21, 2017 at 02:08:26PM +0530, Sekhar Nori wrote:
> > Looks fine to me from libata side. Once it gets tested, how should
> > the patches be routed? I don't think it'd make sense to route them
> > separately.
>
> Hi Tejun, I can take the series through ARM-SoC tree with your
On Tue, Mar 21, 2017 at 03:26:36PM +, Lorenzo Pieralisi wrote:
> I assumed that in plain terms, the difference between MT_DEVICE and
> MT_UNCACHED is write posting (aka bufferable) behaviour (across CPU
> architecture versions) and that does not affect write ordering rules.
Having looked it
On Tue, Mar 21, 2017 at 03:26:36PM +, Lorenzo Pieralisi wrote:
> I assumed that in plain terms, the difference between MT_DEVICE and
> MT_UNCACHED is write posting (aka bufferable) behaviour (across CPU
> architecture versions) and that does not affect write ordering rules.
Having looked it
This patch replaces spaces with tabs for indentation as per kernel
coding standards.
Signed-off-by: Prasant Jalan
---
drivers/staging/vt6656/rf.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/vt6656/rf.c
This patch replaces spaces with tabs for indentation as per kernel
coding standards.
Signed-off-by: Prasant Jalan
---
drivers/staging/vt6656/rf.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/vt6656/rf.c b/drivers/staging/vt6656/rf.c
index
On Fri, Mar 10, 2017 at 01:28:31AM -0500, Anurup M wrote:
> + * This code is based on the uncore PMU's like arm-cci and
> + * arm-ccn.
Nit: s/PMU's/PMUs/
[...]
> +struct hisi_l3c_hwcfg {
> + u32 module_id;
> + u32 bank_select;
> + u32 bank_id;
> +};
> +/* hip05/06 chips L3C bank
On Fri, Mar 10, 2017 at 01:28:31AM -0500, Anurup M wrote:
> + * This code is based on the uncore PMU's like arm-cci and
> + * arm-ccn.
Nit: s/PMU's/PMUs/
[...]
> +struct hisi_l3c_hwcfg {
> + u32 module_id;
> + u32 bank_select;
> + u32 bank_id;
> +};
> +/* hip05/06 chips L3C bank
Às 4:50 PM de 3/21/2017, Joao Pinto escreveu:
> Às 4:42 PM de 3/21/2017, Thierry Reding escreveu:
>> On Tue, Mar 21, 2017 at 03:23:00PM +, Joao Pinto wrote:
>>> Às 3:12 PM de 3/21/2017, Thierry Reding escreveu:
From: Thierry Reding
Prior to the recent
Às 4:50 PM de 3/21/2017, Joao Pinto escreveu:
> Às 4:42 PM de 3/21/2017, Thierry Reding escreveu:
>> On Tue, Mar 21, 2017 at 03:23:00PM +, Joao Pinto wrote:
>>> Às 3:12 PM de 3/21/2017, Thierry Reding escreveu:
From: Thierry Reding
Prior to the recent multi-queue changes the
This adds almost all operating points allowed for the A33 as defined by
fex files available at:
https://github.com/linux-sunxi/sunxi-boards/tree/master/sys_config/a33
There are more possible frequencies in this patch than there are in the
fex files because the fex files only give an interval of
This adds almost all operating points allowed for the A33 as defined by
fex files available at:
https://github.com/linux-sunxi/sunxi-boards/tree/master/sys_config/a33
There are more possible frequencies in this patch than there are in the
fex files because the fex files only give an interval of
On Mon, Mar 20, 2017 at 01:36:21AM +0530, simran singhal wrote:
Hi Simran,
I going to ask for a v7 without looking at the code ;)
Subject line needs subsystem and driver.
Subject and log message can be improved.
> The IIO subsystem is redefining iio_dev->mlock to be used by
> the IIO core
On Mon, Mar 20, 2017 at 01:36:21AM +0530, simran singhal wrote:
Hi Simran,
I going to ask for a v7 without looking at the code ;)
Subject line needs subsystem and driver.
Subject and log message can be improved.
> The IIO subsystem is redefining iio_dev->mlock to be used by
> the IIO core
Às 4:42 PM de 3/21/2017, Thierry Reding escreveu:
> On Tue, Mar 21, 2017 at 03:23:00PM +, Joao Pinto wrote:
>> Às 3:12 PM de 3/21/2017, Thierry Reding escreveu:
>>> From: Thierry Reding
>>>
>>> Prior to the recent multi-queue changes the driver would configure the
>>>
On 03/21/2017 09:19 AM, Rob Herring wrote:
> This series syncs dtc with current mainline. The primary motivation is
> to pull in the new checks I've worked on. This gives lots of new
> warnings which are turned off by default.
>
> Arm-soc folks, I've left the PCI checks enabled as they are
Às 4:42 PM de 3/21/2017, Thierry Reding escreveu:
> On Tue, Mar 21, 2017 at 03:23:00PM +, Joao Pinto wrote:
>> Às 3:12 PM de 3/21/2017, Thierry Reding escreveu:
>>> From: Thierry Reding
>>>
>>> Prior to the recent multi-queue changes the driver would configure the
>>> queues to use the AVB
On 03/21/2017 09:19 AM, Rob Herring wrote:
> This series syncs dtc with current mainline. The primary motivation is
> to pull in the new checks I've worked on. This gives lots of new
> warnings which are turned off by default.
>
> Arm-soc folks, I've left the PCI checks enabled as they are
On Tue, Mar 21, 2017 at 09:03:40AM -0500, Josh Poimboeuf wrote:
> On Fri, Mar 17, 2017 at 10:19:19PM +0100, Peter Zijlstra wrote:
> > +/*
> > + * Since some emulators terminate on UD2, we cannot use it for WARN.
> > + * Since various instruction decoders disagree on the length of UD1,
> > + * we
On Tue, Mar 21, 2017 at 09:03:40AM -0500, Josh Poimboeuf wrote:
> On Fri, Mar 17, 2017 at 10:19:19PM +0100, Peter Zijlstra wrote:
> > +/*
> > + * Since some emulators terminate on UD2, we cannot use it for WARN.
> > + * Since various instruction decoders disagree on the length of UD1,
> > + * we
From: Colin Ian King
The allocation of dname is short by 1 byte, so increase the allocation
size.
Detected with CoverityScan, CID#711628 ("Out-of-bounds-access (OVERRUN)")
Signed-off-by: Colin Ian King
---
usr/gen_init_cpio.c | 2 +-
1 file
From: Colin Ian King
The allocation of dname is short by 1 byte, so increase the allocation
size.
Detected with CoverityScan, CID#711628 ("Out-of-bounds-access (OVERRUN)")
Signed-off-by: Colin Ian King
---
usr/gen_init_cpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Fu Wei
The patch update arm_arch_timer driver to use the function
provided by the new GTDT driver of ACPI.
By this way, arm_arch_timer.c can be simplified, and separate
all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei
From: Fu Wei
The patch update arm_arch_timer driver to use the function
provided by the new GTDT driver of ACPI.
By this way, arm_arch_timer.c can be simplified, and separate
all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei
Signed-off-by: Hanjun Guo
Tested-by:
From: Fu Wei
On platforms booting with ACPI, architected memory-mapped timers'
configuration data is provided by firmware through the ACPI GTDT
static table.
The clocksource architected timer kernel driver requires a firmware
interface to collect timer configuration and
From: Fu Wei
On platforms booting with ACPI, architected memory-mapped timers'
configuration data is provided by firmware through the ACPI GTDT
static table.
The clocksource architected timer kernel driver requires a firmware
interface to collect timer configuration and configure its driver.
From: Fu Wei
This patch adds support for parsing arch timer info in GTDT,
provides some kernel APIs to parse all the PPIs and
always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and
separate the ACPI GTDT knowledge from it.
On Tue, Mar 21, 2017 at 03:23:00PM +, Joao Pinto wrote:
> Às 3:12 PM de 3/21/2017, Thierry Reding escreveu:
> > From: Thierry Reding
> >
> > Prior to the recent multi-queue changes the driver would configure the
> > queues to use the AVB mode, but the mode then got
From: Fu Wei
This patch adds support for parsing arch timer info in GTDT,
provides some kernel APIs to parse all the PPIs and
always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and
separate the ACPI GTDT knowledge from it.
Signed-off-by: Fu Wei
On Tue, Mar 21, 2017 at 03:23:00PM +, Joao Pinto wrote:
> Às 3:12 PM de 3/21/2017, Thierry Reding escreveu:
> > From: Thierry Reding
> >
> > Prior to the recent multi-queue changes the driver would configure the
> > queues to use the AVB mode, but the mode then got switched to DCB. The
> >
On Tue, Mar 21, 2017 at 08:41:22AM -0700, Tony Lindgren wrote:
> * Charles Keepax [170321 02:24]:
> > On Mon, Mar 20, 2017 at 08:33:42AM -0700, Tony Lindgren wrote:
> > > * Charles Keepax [170320 08:15]:
> > > > On Thu,
On Tue, Mar 21, 2017 at 08:41:22AM -0700, Tony Lindgren wrote:
> * Charles Keepax [170321 02:24]:
> > On Mon, Mar 20, 2017 at 08:33:42AM -0700, Tony Lindgren wrote:
> > > * Charles Keepax [170320 08:15]:
> > > > On Thu, Mar 16, 2017 at 05:36:30PM -0700, Tony Lindgren wrote:
> > That sounds a lot
On 03/21/2017 03:50 PM, Dmitry Safonov wrote:
On 03/21/2017 03:49 PM, Thomas Gleixner wrote:
On Tue, 21 Mar 2017, Adam Borowski wrote:
On Tue, Mar 21, 2017 at 07:45:39AM +0100, Ingo Molnar wrote:
* Andrei Vagin wrote:
# first bad commit:
On 03/21/2017 03:50 PM, Dmitry Safonov wrote:
On 03/21/2017 03:49 PM, Thomas Gleixner wrote:
On Tue, 21 Mar 2017, Adam Borowski wrote:
On Tue, Mar 21, 2017 at 07:45:39AM +0100, Ingo Molnar wrote:
* Andrei Vagin wrote:
# first bad commit: [45fc8757d1d2128e342b4e7ef39adedf7752faac] x86:
Make
When looking at this and trying to adapt it to MSM8660/APQ8060
like Neil did with MDM9615 I get pretty confused.
On Tue, Jan 20, 2015 at 3:05 AM, Stephen Boyd wrote:
> Add an LCC driver for MSM8960/APQ8064 that supports the i2s,
> slimbus, and pcm clocks.
>
> Change-Id:
When looking at this and trying to adapt it to MSM8660/APQ8060
like Neil did with MDM9615 I get pretty confused.
On Tue, Jan 20, 2015 at 3:05 AM, Stephen Boyd wrote:
> Add an LCC driver for MSM8960/APQ8064 that supports the i2s,
> slimbus, and pcm clocks.
>
> Change-Id:
On Tue 21-03-17 11:38:49, J. Bruce Fields wrote:
> On Sun, Mar 19, 2017 at 11:19:43AM +0100, Jan Kara wrote:
> > On Tue 14-03-17 13:18:01, Amir Goldstein wrote:
> > > On Tue, Mar 14, 2017 at 1:03 AM, Filip Štědronský
> > > wrote:
> > > > Besause fanotify requires `struct
On Tue 21-03-17 11:38:49, J. Bruce Fields wrote:
> On Sun, Mar 19, 2017 at 11:19:43AM +0100, Jan Kara wrote:
> > On Tue 14-03-17 13:18:01, Amir Goldstein wrote:
> > > On Tue, Mar 14, 2017 at 1:03 AM, Filip Štědronský
> > > wrote:
> > > > Besause fanotify requires `struct path`, the event cannot
From: Fu Wei
The patch add memory-mapped timer register support by using the
information provided by the new GTDT driver of ACPI.
Signed-off-by: Fu Wei
Reviewed-by: Hanjun Guo
---
drivers/clocksource/arm_arch_timer.c | 35
After my changes to mmap(), its code now relies on the bitness of
performing syscall. According to that, it chooses the base of allocation:
mmap_base for 64-bit mmap() and mmap_compat_base for 32-bit syscall.
It was done by:
commit 1b028f784e8c ("x86/mm: Introduce mmap_compat_base() for
32-bit
After my changes to mmap(), its code now relies on the bitness of
performing syscall. According to that, it chooses the base of allocation:
mmap_base for 64-bit mmap() and mmap_compat_base for 32-bit syscall.
It was done by:
commit 1b028f784e8c ("x86/mm: Introduce mmap_compat_base() for
32-bit
From: Fu Wei
The patch add memory-mapped timer register support by using the
information provided by the new GTDT driver of ACPI.
Signed-off-by: Fu Wei
Reviewed-by: Hanjun Guo
---
drivers/clocksource/arm_arch_timer.c | 35 ---
1 file changed, 32 insertions(+),
From: Fu Wei
This driver adds support for parsing SBSA Generic Watchdog timer
in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
and creating a platform device with that information.
This allows the operating system to obtain device data from the
resource of
From: Fu Wei
This driver adds support for parsing SBSA Generic Watchdog timer
in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT,
and creating a platform device with that information.
This allows the operating system to obtain device data from the
resource of platform device.
On Tue, Mar 21, 2017 at 05:03:25PM +0200, Daniel Baluta wrote:
> WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8
> clocking register (See WM8960 datasheet, page 71).
>
> There are use cases, like this:
> aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm
>
>
On Tue, Mar 21, 2017 at 05:03:25PM +0200, Daniel Baluta wrote:
> WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8
> clocking register (See WM8960 datasheet, page 71).
>
> There are use cases, like this:
> aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm
>
>
On Tue, Mar 21, 2017 at 03:18:20PM +, Joao Pinto wrote:
> Às 3:12 PM de 3/21/2017, Thierry Reding escreveu:
> > From: Thierry Reding
> >
> > The MAC RX queues always need to be enabled in order to receive network
> > packets. Remove the condition that this only needs to
On Tue, 21 Mar 2017, Arushi Singhal wrote:
> On Tue, Mar 21, 2017 at 9:33 PM, Alison Schofield
> wrote:
> On Tue, Mar 21, 2017 at 07:00:17PM +0530, Arushi Singhal wrote:
> > Patchseries of IIO coding tasks
>
> This wouldn't be a patchset. Although they
On Tue, Mar 21, 2017 at 03:18:20PM +, Joao Pinto wrote:
> Às 3:12 PM de 3/21/2017, Thierry Reding escreveu:
> > From: Thierry Reding
> >
> > The MAC RX queues always need to be enabled in order to receive network
> > packets. Remove the condition that this only needs to be done for multi-
>
On Tue, 21 Mar 2017, Arushi Singhal wrote:
> On Tue, Mar 21, 2017 at 9:33 PM, Alison Schofield
> wrote:
> On Tue, Mar 21, 2017 at 07:00:17PM +0530, Arushi Singhal wrote:
> > Patchseries of IIO coding tasks
>
> This wouldn't be a patchset. Although they touch the same
>
i386 glibc is buggy and calls the sigaction syscall incorrectly.
This is asymptomatic for normal programs, but it blows up on
programs that do evil things with segmentation. ldt_gdt an example
of such an evil program.
This doesn't appear to be a regression -- I think I just got lucky
with the
i386 glibc is buggy and calls the sigaction syscall incorrectly.
This is asymptomatic for normal programs, but it blows up on
programs that do evil things with segmentation. ldt_gdt an example
of such an evil program.
This doesn't appear to be a regression -- I think I just got lucky
with the
The OPP are declared as shared but no operating points are declared for
cpu1, 2 and 3. Thus, the following error happens during the boot:
cpu cpu1: dev_pm_opp_of_get_sharing_cpus: Couldn't find tcpu_dev node.
This patch applies the operating points to each cpu of the A33.
Signed-off-by: Quentin
The OPP are declared as shared but no operating points are declared for
cpu1, 2 and 3. Thus, the following error happens during the boot:
cpu cpu1: dev_pm_opp_of_get_sharing_cpus: Couldn't find tcpu_dev node.
This patch applies the operating points to each cpu of the A33.
Signed-off-by: Quentin
On Tue, Mar 21, 2017 at 8:59 AM, Dmitry Safonov wrote:
> On 03/21/2017 03:50 PM, Dmitry Safonov wrote:
>>
>> On 03/21/2017 03:49 PM, Thomas Gleixner wrote:
>>>
>>> On Tue, 21 Mar 2017, Adam Borowski wrote:
On Tue, Mar 21, 2017 at 07:45:39AM +0100, Ingo Molnar
On Tue, Mar 21, 2017 at 8:59 AM, Dmitry Safonov wrote:
> On 03/21/2017 03:50 PM, Dmitry Safonov wrote:
>>
>> On 03/21/2017 03:49 PM, Thomas Gleixner wrote:
>>>
>>> On Tue, 21 Mar 2017, Adam Borowski wrote:
On Tue, Mar 21, 2017 at 07:45:39AM +0100, Ingo Molnar wrote:
>
> * Andrei
On 03/21/2017 06:55 PM, Dmitry Safonov wrote:
After my changes to mmap(), its code now relies on the bitness of
performing syscall. According to that, it chooses the base of allocation:
mmap_base for 64-bit mmap() and mmap_compat_base for 32-bit syscall.
It was done by:
commit 1b028f784e8c
On 03/21/2017 06:55 PM, Dmitry Safonov wrote:
After my changes to mmap(), its code now relies on the bitness of
performing syscall. According to that, it chooses the base of allocation:
mmap_base for 64-bit mmap() and mmap_compat_base for 32-bit syscall.
It was done by:
commit 1b028f784e8c
From: Fu Wei
Currently the code to probe MMIO architected timers mixes DT parsing with
actual poking of hardware. This makes the code harder than necessary to
understand, and makes it difficult to add support for probing via ACPI.
This patch factors all the DT-specific logic
From: Fu Wei
The patch introduce two new structs: arch_timer_mem, arch_timer_mem_frame.
And also introduce a new define: ARCH_TIMER_MEM_MAX_FRAMES
These will be used for refactoring the memory-mapped timer init code to
prepare for GTDT
Signed-off-by: Fu Wei
From: Fu Wei
Currently the code to probe MMIO architected timers mixes DT parsing with
actual poking of hardware. This makes the code harder than necessary to
understand, and makes it difficult to add support for probing via ACPI.
This patch factors all the DT-specific logic out of
From: Fu Wei
The patch introduce two new structs: arch_timer_mem, arch_timer_mem_frame.
And also introduce a new define: ARCH_TIMER_MEM_MAX_FRAMES
These will be used for refactoring the memory-mapped timer init code to
prepare for GTDT
Signed-off-by: Fu Wei
Reviewed-by: Hanjun Guo
---
From: Fu Wei
When system init with device-tree, we don't know which node will be
initialized first. And the code in arch_timer_common_init should wait
until per-cpu timer and MMIO timer are both initialized. So we need
arch_timer_needs_probing to detect the init status of
From: Fu Wei
When system init with device-tree, we don't know which node will be
initialized first. And the code in arch_timer_common_init should wait
until per-cpu timer and MMIO timer are both initialized. So we need
arch_timer_needs_probing to detect the init status of system.
But currently
From: Fu Wei
Currently, the counter frequency detection call(arch_timer_detect_rate)
includes getting the frequency from the device-tree property, the per-cpu
arch-timer and the memory-mapped (MMIO) timer interfaces.
But reading device-tree property will be needed only when
From: Fu Wei
Currently, the counter frequency detection call(arch_timer_detect_rate)
includes getting the frequency from the device-tree property, the per-cpu
arch-timer and the memory-mapped (MMIO) timer interfaces.
But reading device-tree property will be needed only when system boot with
From: Fu Wei
Because arch_timer_needs_of_probing is only for booting with device-tree,
but arch_timer_common_init is a generic init call which shouldn't include
the FW-specific code. It's better to put arch_timer_needs_of_probing into
DT init function.
But for per-cpu timer,
From: Fu Wei
Because arch_timer_needs_of_probing is only for booting with device-tree,
but arch_timer_common_init is a generic init call which shouldn't include
the FW-specific code. It's better to put arch_timer_needs_of_probing into
DT init function.
But for per-cpu timer, the
On 03/21/2017 02:04 AM, Niklas Cassel wrote:
> On 03/20/2017 11:07 PM, Florian Fainelli wrote:
>>
>> (snip)
>>>
>>> However, it is kind of sad that drivers are so inconsistent of what goes
>>> in probe and what goes in ndo_open...which is tied together with the
>>> whole mess of when certain
On 03/21/2017 02:04 AM, Niklas Cassel wrote:
> On 03/20/2017 11:07 PM, Florian Fainelli wrote:
>>
>> (snip)
>>>
>>> However, it is kind of sad that drivers are so inconsistent of what goes
>>> in probe and what goes in ndo_open...which is tied together with the
>>> whole mess of when certain
From: Fu Wei
The patch introduce a new functions: arch_timer_mem_get_cntfrq, and applies
it in arch_timer_detect_rate.
This function will be used for getting the frequency from mmio to prepare
for reworking counter frequency detection.
Signed-off-by: Fu Wei
On Tue, Mar 21, 2017 at 06:45:00AM -0700, Christoph Hellwig wrote:
> On Mon, Mar 20, 2017 at 05:43:27PM -0400, J. Bruce Fields wrote:
> > To me, the interesting question is whether this allows us to turn on
> > i_version updates by default on xfs and ext4.
>
> XFS v5 file systems have it on by
From: Fu Wei
This patchset:
(1)Preparation for adding GTDT support in arm_arch_timer:
1. Introduce a wrapper function to get the frequency from mmio.
2. separate out device-tree code from arch_timer_detect_rate
3. remove arch_timer_detect_rate use
From: Fu Wei
The patch introduce a new functions: arch_timer_mem_get_cntfrq, and applies
it in arch_timer_detect_rate.
This function will be used for getting the frequency from mmio to prepare
for reworking counter frequency detection.
Signed-off-by: Fu Wei
---
On Tue, Mar 21, 2017 at 06:45:00AM -0700, Christoph Hellwig wrote:
> On Mon, Mar 20, 2017 at 05:43:27PM -0400, J. Bruce Fields wrote:
> > To me, the interesting question is whether this allows us to turn on
> > i_version updates by default on xfs and ext4.
>
> XFS v5 file systems have it on by
From: Fu Wei
This patchset:
(1)Preparation for adding GTDT support in arm_arch_timer:
1. Introduce a wrapper function to get the frequency from mmio.
2. separate out device-tree code from arch_timer_detect_rate
3. remove arch_timer_detect_rate use
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