From: Herbert Xu
Date: Thu, 15 Jun 2017 17:42:10 +0800
> On Thu, Jun 15, 2017 at 06:04:44PM +0900, Linus Torvalds wrote:
>> There's a fair number of SHASH_DESC_ON_STACK users, are all the others
>> safe for some random reason that just happens to be about code
>> generation? Did people actually v
On Wed 14-06-17 11:22:11, Ross Zwisler wrote:
> When servicing mmap() reads from file holes the current DAX code allocates
> a page cache page of all zeroes and places the struct page pointer in the
> mapping->page_tree radix tree. This has two major drawbacks:
>
> 1) It consumes memory unnecessa
Hi Will,
Sorry for the delay on this review; it's taken me a while to ingest DDI
0586A and get a feel for how profiling PMUs work.
I have a number of comments below.
On Mon, Jun 05, 2017 at 04:22:56PM +0100, Will Deacon wrote:
> +/* ID registers */
> +#define PMSIDR_EL1 sys_reg
On 6/15/2017 4:41 AM, Borislav Petkov wrote:
On Wed, Jun 14, 2017 at 03:40:28PM -0500, Tom Lendacky wrote:
I was trying to keep all the logic for it here in the SME related files
rather than put it in the iommu code itself. But it is easy enough to
move if you think it's worth it.
Yes please -
On Wed 2017-06-14 18:11:28, Sergey Senozhatsky wrote:
> On (06/13/17 14:54), Petr Mladek wrote:
>
> > This patch modifies the code that enables the configured consoles.
> > It sets the CON_CONSDEV flag also when we register the first
> > console. It causes that one of the registered consoles will
On 6/2/2017 3:25 PM, David Gstir wrote:
> Hi!
>
> While testing fscrypt's filename encryption, I noticed that the implementation
> of cts(cbc(aes)) is broken when the CAAM hardware crypto driver is enabled.
> Some digging showed that the refactoring of crypto/cts.c in v4.8
> (commit 0605c41cc53ca
Arnd Bergmann writes:
> With KASAN and a couple of other patches applied, this driver is one
> of the few remaining ones that actually use more than 2048 bytes of
> kernel stack:
>
> broadcom/brcm80211/brcmsmac/phy/phy_n.c: In function
> 'wlc_phy_workarounds_nphy_gainctrl':
> broadcom/brcm80211/
We need an atomic way to setup pmd page table entry, avoiding races with
CPU setting dirty/accessed bits. This is required to implement
pmdp_invalidate() that doesn't loose these bits.
On PAE we have to use cmpxchg8b as we cannot assume what is value of new pmd and
setting it up half-by-half can e
Hi,
Vlastimil noted that pmdp_invalidate() is not atomic and we can loose
dirty and access bits if CPU sets them after pmdp dereference, but
before set_pmd_at().
The bug doesn't lead to user-visible misbehaviour in current kernel, but
fixing this would be critical for future work on THP: both hug
Vlastimil noted that pmdp_invalidate() is not atomic and we can loose
dirty and access bits if CPU sets them after pmdp dereference, but
before set_pmd_at().
The bug doesn't lead to user-visible misbehaviour in current kernel.
Loosing access bit can lead to sub-optimal reclaim behaviour for THP,
This patch uses modifed pmdp_invalidate(), that return previous value of pmd,
to transfer dirty and accessed bits.
Signed-off-by: Kirill A. Shutemov
---
fs/proc/task_mmu.c | 8
mm/huge_memory.c | 29 -
2 files changed, 16 insertions(+), 21 deletions(-)
di
On 6/15/2017 1:30 PM, Xiaoguang Chen wrote:
> Here we defined a new ioctl to create a fd for a vfio device based on
> the input type. Now only one type is supported that is a dma-buf
> management fd.
> Two ioctls are defined for the dma-buf management fd: query the vfio
> vgpu's plane information
Some Opensource Songs, Including one on GRSecurity's copyright Violation
This song is about GRSecurity's violation of Linus et al's copyright**:
www.youtube.com/watch?v=CYnhI3wUej8
(A Boat Sails Away 2016 17)
Here's a synthwave song with a kind-of beat:
www.youtube.com/watch?v=RCbeOsqwUEE
(KMS2
On Tue, 13 Jun 2017, Stephen Rothwell wrote:
> After merging the block tree, today's linux-next build (s390x
> s390-defconfig) failed like this:
>
> drivers/s390/block/scm_blk.c:293:10: error: 'BLK_MQ_RQ_QUEUE_BUSY' undeclared
> (first use in this function)
> drivers/s390/block/scm_blk.c:327:9: e
Hi Vinod,
On 6/15/2017 9:40 AM, Vinod Koul wrote:
> On Wed, Jun 07, 2017 at 05:59:07PM +0530, Sricharan R wrote:
>> The bam dmaengine has a circular FIFO to which we
>> add hw descriptors that describes the transaction.
>> The FIFO has space for about 4096 hw descriptors.
>>
>> Currently we add on
Al Viro wrote:
> > + if (ctx->ipc_ns != ns) {
>
> How could they possibly be equal? You are setting that ns up here, right?
> How could it be in any process' nsproxy?
Fair point.
> Ugh, again... Is there any reason for dynamic allocation of that thing in
> this particular case? AFAICS, th
On Wed, Jun 14, 2017 at 4:33 PM, Alan Cox wrote:
>> That would cut it, but TIOCPKT is too coupled with having a linked tty.
>> I could make acm behave like a pty (accept TIOCPKT and issue the
>> ctrl_status bits), but for that I need n_tty to know that packet does
>> not always mean a linked tty i
Hi Krzysztof,
Another Oops on S3C6410.
[2.842434] Unable to handle kernel NULL pointer dereference at virtual
address 0900
[2.848477] pgd = c0004000
[2.851165] [0900] *pgd=
[2.854738] Internal error: Oops: 5 [#1] PREEMPT ARM
[2.859669] Modules linked in:
[
On Wed 14-06-17 11:22:09, Ross Zwisler wrote:
> To be able to use the common 4k zero page in DAX we need to have our PTE
> fault path look more like our PMD fault path where a PTE entry can be
> marked as dirty and writeable as it is first inserted, rather than waiting
> for a follow-up dax_pfn_mkw
On Thursday 15 June 2017 08:00 PM, Steven Rostedt wrote:
On Thu, 15 Jun 2017 19:56:40 +0530
Pratyush Anand wrote:
From: Steven Rostedt
Hi Steve,
Is there any plan for next revision of this patchset.
Heh, I forgot about this. Actually, I didn't. I was just thinking
about the issue of
On 15 June 2017 at 04:30, Suzuki K Poulose wrote:
> On 14/06/17 19:22, Mathieu Poirier wrote:
>>
>> On Mon, Jun 12, 2017 at 03:36:48PM +0100, Suzuki K Poulose wrote:
>>>
>>> This patch adds description of the capabilities of a given TMC.
>>> This will help us to handle different versions of the TM
On Thursday 15 June 2017 07:56 PM, Pratyush Anand wrote:
From: Steven Rostedt
Sorry, Please ignore this. I did not had this patch in my inbox and replied
through patchwork mailbox. Forgot to change the "from" field. Here is the
patch link, which could resolve issues with trace filtering of
On 06/14/2017 05:03 PM, Stefano Stabellini wrote:
> On Mon, 12 Jun 2017, Boris Ostrovsky wrote:
>>> +
>>> static void pvcalls_back_work(struct work_struct *work)
>>> {
>>> + struct pvcalls_fedata *priv = container_of(work,
>>> + struct pvcalls_fedata, register_work);
>>> + int notif
On 06/14/2017 10:18 PM, Andy Lutomirski wrote:
> Dave, why is XINUSE exposed at all to userspace?
You need it for XSAVEOPT when it is using the init optimization to be
able to tell which state was written and which state in the XSAVE buffer
is potentially stale with respect to what's in the regist
On 15 June 2017 at 04:25, Suzuki K Poulose wrote:
> On 14/06/17 18:59, Mathieu Poirier wrote:
>>
>> On Mon, Jun 12, 2017 at 03:36:47PM +0100, Suzuki K Poulose wrote:
>>>
>>> Coresight SoC 600 defines a new configuration for TMC, Embedded Trace
>>> Streamer (ETS), indicated by 0x3 in MODE:CONFIG_TY
On Thu, 15 Jun 2017 19:56:40 +0530
Pratyush Anand wrote:
> From: Steven Rostedt
>
>
> Hi Steve,
>
> Is there any plan for next revision of this patchset.
>
Heh, I forgot about this. Actually, I didn't. I was just thinking
about the issue of SyS vs sys, but forgot I had patches to fix it.
From: Steven Rostedt
Hi Steve,
Is there any plan for next revision of this patchset.
Regards
Pratyush
Hi all,
In update_cpu_capacity(), it will calculate CPU's capacity with RT
utilization in mind. Which is introduced in commit
e9e9250bc78e7f6342517214c0178a529807964b
(https://lkml.org/lkml/2009/8/27/209).
rq->rt_avg and rq->age_stamp are introduced for tracing RT utilization in
a) update_curr
On 15/06/17, Jani Nikula wrote:
> On Thu, 15 Jun 2017, Dawid Kurek wrote:
> > Smaller scope reduces visibility of variable and makes usage of
> > uninitialized variable less possible.
> > ---
> > drivers/gpu/drm/drm_atomic.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > d
On 15 June 2017 at 04:13, Suzuki K Poulose wrote:
> On 14/06/17 18:49, Mathieu Poirier wrote:
>>
>> On Mon, Jun 12, 2017 at 03:36:44PM +0100, Suzuki K Poulose wrote:
>>>
>>> Coresight TMC splits 64bit registers into a pair of 32bit registers
>>> (e.g DBA, RRP, RWP). Provide helpers to read/write t
Commit c0c0d9eeeb8d ("drm/msm: hdmi audio support") uses logical
OR operators to build up a value to be written in the
REG_HDMI_AUDIO_INFO0 and REG_HDMI_AUDIO_INFO1 registers when it
should have used bitwise operators.
Signed-off-by: Liviu Dudau
Fixes: c0c0d9eeeb8d ("drm/msm: hdmi audio support")
On Thu, 15 Jun 2017, Kai-Heng Feng wrote:
> On Wed, Jun 14, 2017 at 1:28 AM, Bjorn Helgaas wrote:
> >
> > The lspci output [1] shows:
> >
> > 00:12.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI
> > Controller (rev 39) (prog-if 20 [EHCI])
> > Capabilities: [c0] Power Man
Hi Baoquan,
[auto build test WARNING on tip/auto-latest]
[also build test WARNING on next-20170615]
[cannot apply to tip/x86/core v4.12-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits
Smaller scope reduces visibility of variable and makes usage of
uninitialized variable less possible.
Changes in v2:
- separate declaration and initialization
---
drivers/gpu/drm/drm_atomic.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_atomic.
Hi Bjorn,
On Fri, Apr 07, 2017 at 04:32:18PM +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> ATS is broken on this hardware and causes IOMMU stalls and
> system failure. Disable ATS on these devices to make them
> usable again with IOMMU enabled.
>
> Note that the commit in the Fixes-tag is
Mario, are you able to check if instance number passed to
wmi_evaluate_method in following dell WMI drivers is correct and should
be really 1?
I suspect that it should be zero, as instance number is indexed from
zero.
There is no comment in those dell WMI drivers why it is 1, nor what 1
means.
I
This patchs adds a new sample record type called
PERF_SAMPLE_SKID_IP. The goal is to record
the unmodified interrupted instruction pointer (IP) as seen by
the kernel and reflected in the machine state.
On some architectures, it is possible to avoid the IP skid using
hardware support. For instance,
This patch adds support for SKID_IP to Intel x86 processors
in PEBS mode. In that case, the off-by-1 IP from PEBS is returned in
the SKID_IP field.
Signed-off-by: Stephane Eranian
---
arch/x86/events/intel/ds.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/events/intel/ds.c
On Fri, Jun 09, 2017 at 12:29:12PM +0200, Arnd Bergmann wrote:
> The newly added support for the pcc mailbox fails to build
> in some configurations:
>
> drivers/i2c/busses/i2c-xgene-slimpro.c: In function 'xgene_slimpro_i2c_probe':
> drivers/i2c/busses/i2c-xgene-slimpro.c:516:25: error: implicit
This patch adds a new --skid-ip option to perf record
to capture the unmodified interrupted instruction pointer in
each sample. With this option, the perf tool can request that
the kernel records both the ip and skid IP in each sample.
Unless precise mode is enabled both IPis are the same. They may
This patch adds a skid_ip field to perf script
to dump the raw value of the PERF_SAMPLE_SKID_IP
field in each sample.
$ perf script -F ip,skid_ip ..
Signed-off-by: Stephane Eranian
---
tools/perf/builtin-script.c | 12 +++-
tools/perf/util/session.c | 2 +-
2 files changed, 12 in
This patch adds the support code to handle the PERF_SAMPLE_SKID_IP
record type.
Signed-off-by: Stephane Eranian
---
tools/include/uapi/linux/perf_event.h | 4 +++-
tools/perf/perf.h | 1 +
tools/perf/util/event.h | 1 +
tools/perf/util/evsel.c |
This patchs adds a new sample record type called
PERF_SAMPLE_SKID_IP. The goal is to record
the interrupted instruction pointer (IP) as seen by the
kernel and reflected in the machine state.
On some architectures, it is possible to avoid the IP skid using
hardware support. For instance, on Intel x
Hi Shaohua,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.12-rc5]
[cannot apply to driver-core/driver-core-testing block/for-next next-20170615]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com
On Tue, Jun 13, 2017 at 12:59:53AM -0400, Song liwei wrote:
> From: Liwei Song
>
> Fix the following kernel bug:
>
> kernel BUG at drivers/iommu/intel-iommu.c:3260!
> invalid opcode: [#5] PREEMPT SMP
> Hardware name: Intel Corp. Harcuvar/Server, BIOS
> HAVLCRB0.X64.0013.D39.1608311820 08/3
On Thursday 15 June 2017 10:34:27 Jan Kara wrote:
> On Wed 14-06-17 21:36:45, Pali Rohár wrote:
> > On Tuesday 13 June 2017 14:59:55 Jan Kara wrote:
> > > Hi,
> > >
> > > On Mon 12-06-17 22:40:14, Pali Rohár wrote:
> > > > Hi! I found that following UDF patch was included into linus tree:
> > > >
On Thu, Jun 15, 2017 at 12:59:43PM +0200, Petr Mladek wrote:
> On Wed 2017-06-14 09:57:56, Josh Poimboeuf wrote:
> > On Wed, Jun 14, 2017 at 04:21:02PM +0200, Petr Mladek wrote:
> > > But it is racy in general. The question is if the API
> > > could help here. A possibility might be to allow to
> >
On Thu, 15 Jun 2017, Hans de Goede wrote:
> From: Arnd Bergmann
>
> I ran into a build error on ARM with a platform that has a non-standard
> clk implementation:
>
> drivers/clk/clk.o: In function `clk_disable':
> clk.c:(.text.clk_disable+0x0): multiple definition of `clk_disable'
> arch/arm/ma
On Thu, 15 Jun 2017, Hans de Goede wrote:
> From: Arnd Bergmann
>
> I ran into a build error on ARM with a platform that has a non-standard
> clk implementation:
>
> drivers/clk/clk.o: In function `clk_disable':
> clk.c:(.text.clk_disable+0x0): multiple definition of `clk_disable'
> arch/arm/ma
When a kthread makes a call_usermodehelper() call the steps are:
a. allocates current->mm
b. load_elf_binary()
c. populates current->thread.regs
While doing this, interrupts are not disabled. If there is a perf
interrupt in the middle of this process (i.e. step 'a' has completed
but not yet rea
Hi,
On Thu, Jun 08, 2017 at 10:14:19AM +0530, Ganapatrao Kulkarni wrote:
> Add code to parse proximity domain in SMMUv3 IORT table to
> set numa node mapping for smmuv3 devices.
>
> Signed-off-by: Ganapatrao Kulkarni
> ---
> drivers/acpi/arm64/iort.c | 28 ++--
> 1 file
On Wed, Jun 14, 2017 at 10:24:11AM +0530, Oza Oza wrote:
> On Tue, Jun 13, 2017 at 5:13 AM, Bjorn Helgaas wrote:
> > On Sun, Jun 11, 2017 at 09:35:38AM +0530, Oza Pawandeep wrote:
> >> PERST# must be asserted around ~500ms before
> >> the reboot is applied.
> >>
> >> During soft reset (e.g., "rebo
On Jun 15 2017 or thereabouts, Daniel Stone wrote:
> Setting these bits causes libinput to fail to initialize the device;
> setting BTN_TOUCH and BTN_TOOL_FINGER causes it to treat the mouse as a
> touchpad, and it then refuses to continue when it discovers ABS_X is not
> set.
>
> This breaks all
Instead of unconditionally expiring the timer and calling a long
mt_release_contacts(), we can check if some slots are used when the
timer expires.
We can also remove the timer if we happen to receive all the releases.
The logic behind the MT_IO_FLAGS_PENDING_SLOTS could be implemented by
countin
This patch implements the hardware triggers support and buffer management
for sama5d2.
The DT modifications ( [PATCH v5 1/4] ARM: dts: at91: sama5d2_xplained:
enable ADTRG pin) are for demonstration purposes of the feature,
setting the pinctrl for the ADC hw trigger pin,should go through
at91 maint
(1 << X) is wrong. We should use BIT(X)
Signed-off-by: Benjamin Tissoires
---
drivers/hid/hid-multitouch.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
index 24d5b6d..45be218 100
Instead of blindly trusting the hardware to send us release, we should
consider some events can get lost and release them when we judge time has
come.
The Windows 8 spec allows to be confident in the fact that the device
will continuously report events when a finger touches the surface.
This has b
It looks like the Microsft certification misses one case of released fingers.
The (only) solution we can have against that is to wait for a hundred of ms,
and if no input report comes in, consider that the touches should have been
released. The spec, as I read it, enforces that.
Arek, can you ple
Added support for the external hardware trigger on pin ADTRG,
integrated the three possible edges into the driver
and created buffer management for data retrieval
Signed-off-by: Eugen Hristev
Acked-by: Ludovic Desroches
---
Changes in v5:
- Moved DRDY ack in tryreenable function
- Used PTR_E
Add property for the edge type of the hardware trigger pin ADTRG
Signed-off-by: Eugen Hristev
Acked-by: Rob Herring
Acked-by: Ludovic Desroches
---
Changes in v4:
- Modified bindings to be similar with interrupts
Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt | 6 ++
1
Added ADTRG edge type property as interrupt edge type value
Signed-off-by: Eugen Hristev
Acked-by: Ludovic Desroches
---
Changes in v4:
- Modified bindings to be similar with interrupts
arch/arm/boot/dts/sama5d2.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sama
Enable pinctrl for ADTRG pin (PD31) for ADC hardware trigger support.
Signed-off-by: Eugen Hristev
Acked-by: Ludovic Desroches
---
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xpla
Part of the perf / ETR SG work I have been doing use the HI bits -
which makes these additions useful for that too.
I'd be aiming to use these as part of the re-spin
Mike
On 15 June 2017 at 11:13, Suzuki K Poulose wrote:
> On 14/06/17 18:49, Mathieu Poirier wrote:
>>
>> On Mon, Jun 12, 2017 at 03
On 6/15/2017 4:08 AM, Borislav Petkov wrote:
On Wed, Jun 14, 2017 at 02:49:02PM -0500, Tom Lendacky wrote:
I guess I don't need the sme_active() check since the second part of the
if statement can only ever be true if SME is active (since mask is
unsigned).
... and you can define sme_me_mask a
On Thu, Jun 15, 2017 at 03:02:25PM +0800, Kai-Heng Feng wrote:
> On Thu, Jun 15, 2017 at 2:55 AM, Alan Stern wrote:
> > On Tue, 13 Jun 2017, Bjorn Helgaas wrote:
> >
> >> [+cc Rafael, linux-pm]
> >>
> >> On Tue, Jun 13, 2017 at 12:21:15PM +0800, Kai-Heng Feng wrote:
> >> > On Mon, Jun 12, 2017 at
On Thu 15-06-17 22:01:33, Tetsuo Handa wrote:
> Michal Hocko wrote:
> > On Thu 15-06-17 14:03:35, Michal Hocko wrote:
> > > On Thu 15-06-17 20:32:39, Tetsuo Handa wrote:
> > > > @@ -556,25 +553,21 @@ static void oom_reap_task(struct task_struct *tsk)
> > > > struct mm_struct *mm = tsk->sign
From: Kees Cook
CONFIG_FORTIFY_SOURCE implements fortify_panic() as a __noreturn function,
so objtool needs to know about it too.
Suggested-by: Daniel Micay
Signed-off-by: Kees Cook
Tested-by: Stephen Rothwell
Signed-off-by: Josh Poimboeuf
---
tools/objtool/builtin-check.c | 3 ++-
1 file c
On Wed, Jun 14, 2017 at 02:03:05PM +0100, Tvrtko Ursulin wrote:
>
> On 13/06/2017 14:47, Colin King wrote:
> > From: Colin Ian King
> >
> > The function cnl_ddi_dp_set_dpll_hw_state does not need to be in global
> > scope, so make it static.
> >
> > Cleans up sparse warning:
> > "symbol 'cnl_dd
On Thu, Jun 15, 2017 at 1:21 PM, Shawn Guo wrote:
> On Thu, Jun 15, 2017 at 01:01:22PM +0530, Jagan Teki wrote:
>> > I feel the abstraction is wrong from the beginning. Ideally, we should
>> > have something like below.
>> >
>> > - imx6ul-isiot.dtsi
>> > - imx6ul-isiot-kit.dts and imx6ul-isiot-
Thanks Ralf.
On 15/06/17 12:41, Ralf Baechle wrote:
> On Thu, Jun 15, 2017 at 10:31:05AM +0800, Huacai Chen wrote:
>
>> With this patch we can set irq affinity via procfs, so as to improve
>> network performance.
>>
>> Signed-off-by: Huacai Chen
>> ---
>> arch/mips/include/asm/irq.h |
On Wed, Jun 14, 2017 at 07:18:51PM -0700, Kees Cook wrote:
> CONFIG_FORTIFY_SOURCE implements fortify_panic() as a __noreturn function,
> so objtool needs to know about it too.
>
> Suggested-by: Daniel Micay
> Signed-off-by: Kees Cook
> Cc: Josh Poimboeuf
> ---
> tools/objtool/builtin-check.c
From: Joerg Roedel
The iommu_group_get_for_dev() function also attaches the
device to its group, so this code doesn't need to be in the
iommu driver.
Further by using this function the driver can make use of
default domains in the future.
Signed-off-by: Joerg Roedel
---
drivers/iommu/s390-iom
Hey,
here are two patches for the s390 iommu driver. The first
one optimizes iommu-group creation by making use of
iommu_group_get_for_dev().
The second one adds support for the iommu_device_register
interface and with that also sysfs support.
Any comments and testing appreciated.
Thanks,
From: Joerg Roedel
Add support for the iommu_device_register interface to make
the s390 hardware iommus visible to the iommu core and in
sysfs.
Signed-off-by: Joerg Roedel
---
arch/s390/include/asm/pci.h | 7 +++
arch/s390/pci/pci.c | 5 +
drivers/iommu/s390-iommu.c | 35 +++
From: Arnd Bergmann
I ran into a build error on ARM with a platform that has a non-standard
clk implementation:
drivers/clk/clk.o: In function `clk_disable':
clk.c:(.text.clk_disable+0x0): multiple definition of `clk_disable'
arch/arm/mach-omap1/clock.o:clock.c:(.text.clk_disable+0x0): first def
Hi,
On 15-06-17 10:09, Lee Jones wrote:
On Fri, 09 Jun 2017, Arnd Bergmann wrote:
I ran into a build error on ARM with a platform that has a non-standard
clk implementation:
drivers/clk/clk.o: In function `clk_disable':
clk.c:(.text.clk_disable+0x0): multiple definition of `clk_disable'
arch/
From: Arnd Bergmann
I ran into a build error on ARM with a platform that has a non-standard
clk implementation:
drivers/clk/clk.o: In function `clk_disable':
clk.c:(.text.clk_disable+0x0): multiple definition of `clk_disable'
arch/arm/mach-omap1/clock.o:clock.c:(.text.clk_disable+0x0): first def
Michal Hocko wrote:
> On Thu 15-06-17 14:03:35, Michal Hocko wrote:
> > On Thu 15-06-17 20:32:39, Tetsuo Handa wrote:
> > > @@ -556,25 +553,21 @@ static void oom_reap_task(struct task_struct *tsk)
> > > struct mm_struct *mm = tsk->signal->oom_mm;
> > >
> > > /* Retry the down_read_trylock(mma
This patch selects IRQ_BYPASS_MANAGER and HAVE_KVM_IRQ_BYPASS
configs for ARM/ARM64.
kvm_arch_has_irq_bypass() now is implemented and returns true.
As a consequence the irq bypass consumer will be registered for
ARM/ARM64 with Direct EOI/IRQ forwarding callbacks:
- stop/start: halt/resume guest e
On ARM, we are about to introduce a vfio-platform producer. The
associated architecture specific consumer only is compatible with
this producer and does not work with the dummy vfio-pci msi producer.
Adding a type to the producer allows to easily discriminate between
producers instead of complexif
Currently, the line level of unmapped level sensitive SPIs is
toggled down by the maintenance IRQ handler/resamplefd mechanism.
As mapped SPI completion is not trapped, we cannot rely on this
mechanism and the line level needs to be observed at distributor
level instead.
This patch handles the ph
Implements kvm_vgic_[set|unset]_forwarding.
Handle low-level VGIC programming and consistent irqchip
programming.
Signed-off-by: Eric Auger
---
v1 -> v2:
- change the parameter names used in the declaration
- use kvm_vgic_map/unmap_phys_irq and handle their returned value
---
include/kvm/arm_
We want to reuse the core of the map/unmap functions for IRQ
forwarding. Let's move the computation of the hwirq in
kvm_vgic_map_phys_irq and pass the linux IRQ as parameter.
the host_irq is added to struct vgic_irq.
We introduce kvm_vgic_map/unmap_irq which take a struct vgic_irq
handle as a para
This patch adds the registration/unregistration of an
irq_bypass_producer for vfio platform device interrupts.
Its callbacks handle the direct EOI modality on VFIO side.
- stop/start: disable/enable the host irq
- add/del consumer: set the VFIO Direct EOI mode, ie. select the
adapted physical I
We add two new fields in vfio_platform_irq: deoi and handler.
If deoi is set, this means the physical IRQ attached to the virtual
IRQ is directly deactivated by the guest and the VFIO driver does
not need to disable the physical IRQ and mask it at VFIO level.
The handler pointer points to either
For direct EOI modality we will need to differentiate a userspace
masking from the IRQ handler auto-masking.
The level sensitive IRQ handler sets the automasked flag while
VFIO_DEVICE_SET_IRQS with VFIO_IRQ_SET_ACTION_MASK sets the
usermasked flag. VFIO_IRQ_SET_ACTION_UNMASK resets both flags.
Si
This series allows to optimize the deactivation of virtual interrupts
associated to vfio platform device interrupts.
This is a revival of "[PATCH v4 00/13] ARM IRQ forward control based on
IRQ bypass manager" (https://lkml.org/lkml/2015/11/19/351) whose development
was stalled due to dependency on
Signed-off-by: Thomas Meyer
---
include/linux/extable.h | 3 ++-
kernel/extable.c| 2 +-
kernel/module.c | 2 +-
lib/extable.c | 38 +++---
4 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/include/linux/extable.h b/inclu
Setting these bits causes libinput to fail to initialize the device;
setting BTN_TOUCH and BTN_TOOL_FINGER causes it to treat the mouse as a
touchpad, and it then refuses to continue when it discovers ABS_X is not
set.
This breaks all known Wayland compositors, as well as Xorg when the
libinput dr
On Thu, Jun 15, 2017 at 03:08:40PM +0300, Yury Norov wrote:
> Hi all,
>
> Today's linux next falls into panic in init_IRQ():
> arch/arm64/kernel/irq.c:
> 53 void __init init_IRQ(void)
> 54 {
> 55 irqchip_init();
> 56 if (!handle_arch_irq)
> 57 panic("No interru
On Wed, Jun 14, 2017 at 3:56 PM, Joe Perches wrote:
> On Wed, 2017-06-14 at 15:30 -0500, Rob Herring wrote:
>> From: Pantelis Antoniou
>
> I think the commit subject is wrong.
> It adds an "of" specific bit to vsprintf.c.
> The subject should be
> 'vsprintf: Add %p extension "%pO" for device tre
Signed-off-by: Finn Thain
---
drivers/scsi/g_NCR5380.c | 61 ++--
1 file changed, 28 insertions(+), 33 deletions(-)
diff --git a/drivers/scsi/g_NCR5380.c b/drivers/scsi/g_NCR5380.c
index 784913193ea5..e9a942d86865 100644
--- a/drivers/scsi/g_NCR5380.c
From: Ondrej Zary
When an IRQ arrives during PDMA transfer, pread() and pwrite() return
without waiting for the 53C80 registers to be ready and this ends up
messing up the chip state. This was observed with SONY CDU-55S which is
slow enough to disconnect during 4096-byte reads.
IRQ during PDMA i
Ondrej, would you please test this patch series? One of your patches
has been modified slightly and the two I wrote are untested.
Finn Thain (2):
g_NCR5380: Limit sg_tablesize to avoid PDMA read overruns on DTC436
g_NCR5380: Cleanup comments and whitespace
Ondrej Zary (2):
g_NCR5380: Fix P
Back-to-back DMA receive transfers can lose a byte due to a 5380
flaw. This makes scatter-receive difficult or impossible on affected
hardware, so limit the scatter/gather tablesize to 1.
Signed-off-by: Finn Thain
---
drivers/scsi/g_NCR5380.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/d
From: Ondrej Zary
generic_NCR5380_dma_xfer_len() incorrectly uses cmd->transfersize
which causes rescan-scsi-bus and CD-ROM access to hang the system.
Use cmd->SCp.this_residual instead, like other NCR5380 drivers.
Signed-off-by: Ondrej Zary
Signed-off-by: Finn Thain
---
drivers/scsi/g_NCR538
On Thu 15-06-17 13:01:19, Michal Hocko wrote:
> On Thu 15-06-17 19:53:24, Tetsuo Handa wrote:
> > Michal Hocko wrote:
> > > On Wed 14-06-17 16:43:03, David Rientjes wrote:
> > > > If mm->mm_users is not incremented because it is already zero by the oom
> > > > reaper, meaning the final refcount has
On Thu, Jun 01, 2017 at 12:24:41PM +0200, Paolo Bonzini wrote:
> Porting PPC to libdw only needs an architecture-specific hook to move
> the register state from perf to libdw.
>
> The ARM and x86 architectures already use libdw, and it is useful to
> have as much common code for the unwinder as po
On Thu 15-06-17 14:03:35, Michal Hocko wrote:
> On Thu 15-06-17 20:32:39, Tetsuo Handa wrote:
> > Michal Hocko wrote:
> [...]
> > > An alternative would be to allow reaping and exit_mmap race. The unmap
> > > part should just work I guess. We just have to be careful to not race
> > > with free_pgta
Hi all,
Today's linux next falls into panic in init_IRQ():
arch/arm64/kernel/irq.c:
53 void __init init_IRQ(void)
54 {
55 irqchip_init();
56 if (!handle_arch_irq)
57 panic("No interrupt controller found.");
58 }
Bisecting points to the patch 6fedb069def034 (
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