This patchadds the clock binding entry for the CEC 32K AO Clock.
Signed-off-by: Neil Armstrong
---
include/dt-bindings/clock/gxbb-aoclkc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/gxbb-aoclkc.h
This patchadds the clock binding entry for the CEC 32K AO Clock.
Signed-off-by: Neil Armstrong
---
include/dt-bindings/clock/gxbb-aoclkc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/gxbb-aoclkc.h
b/include/dt-bindings/clock/gxbb-aoclkc.h
index
Switch the aoclk driver to use the new bindings and switch all the
registers access to regmap only.
Signed-off-by: Neil Armstrong
---
drivers/clk/meson/Makefile| 2 +-
drivers/clk/meson/gxbb-aoclk-regmap.c | 46 +++
Switch the aoclk driver to use the new bindings and switch all the
registers access to regmap only.
Signed-off-by: Neil Armstrong
---
drivers/clk/meson/Makefile| 2 +-
drivers/clk/meson/gxbb-aoclk-regmap.c | 46 +++
drivers/clk/meson/gxbb-aoclk.c
These codecs have a variable number of I/O lines each of which
is individually selectable to a wide range of possible functions.
The functionality is slightly different from the traditional muxed
GPIO since most of the functions can be mapped to any pin (and even
the same function to multiple
These codecs have a variable number of I/O lines each of which
is individually selectable to a wide range of possible functions.
The functionality is slightly different from the traditional muxed
GPIO since most of the functions can be mapped to any pin (and even
the same function to multiple
On Fri, Jul 28, 2017 at 11:19:04AM +0200, Michal Hocko wrote:
> From: Michal Hocko
>
> GFP_TEMPORARY has been introduced by e12ba74d8ff3 ("Group short-lived
> and reclaimable kernel allocations") along with __GFP_RECLAIMABLE. It's
> primary motivation was to allow users to tell
On Fri, Jul 28, 2017 at 11:19:04AM +0200, Michal Hocko wrote:
> From: Michal Hocko
>
> GFP_TEMPORARY has been introduced by e12ba74d8ff3 ("Group short-lived
> and reclaimable kernel allocations") along with __GFP_RECLAIMABLE. It's
> primary motivation was to allow users to tell that an
This adds support for the GPIOs on Cirrus Logic Madera class codecs.
Any pins not used for special functions (see the pinctrl driver) can be
used as general single-bit input or output lines. The number of available
GPIOs varies between codecs.
Signed-off-by: Nariman Poushin
This adds support for the GPIOs on Cirrus Logic Madera class codecs.
Any pins not used for special functions (see the pinctrl driver) can be
used as general single-bit input or output lines. The number of available
GPIOs varies between codecs.
Signed-off-by: Nariman Poushin
Signed-off-by:
The Cirrus Logic CS47L35, CS47L85, CS47L90/91 codecs are complex audio SoC
devices. In addition to the core audio capability they have onboard GPIO,
regulators, DSPs and interrupt controller and a large register map space
accessed over SPI or I2C. This family of codecs is based around common IP
The Cirrus Logic CS47L35, CS47L85, CS47L90/91 codecs are complex audio SoC
devices. In addition to the core audio capability they have onboard GPIO,
regulators, DSPs and interrupt controller and a large register map space
accessed over SPI or I2C. This family of codecs is based around common IP
Adds the codec driver for the CS47L85 SmartCodec. This is a
multi-functional codec based on the Cirrus Logic Madera platform.
Signed-off-by: Nariman Poushin
Signed-off-by: Charles Keepax
Signed-off-by: Richard Fitzgerald
Regmap configuration tables for Cirrus Logic CS47L35 codecs.
Signed-off-by: Piotr Stankiewicz
Signed-off-by: Richard Fitzgerald
Signed-off-by: Charles Keepax
---
Changes since V3:
- fixed
Adds the codec driver for the CS47L85 SmartCodec. This is a
multi-functional codec based on the Cirrus Logic Madera platform.
Signed-off-by: Nariman Poushin
Signed-off-by: Charles Keepax
Signed-off-by: Richard Fitzgerald
---
Changes since V3:
- Fixed errors in the routing of ISRC3/4 to clock
Regmap configuration tables for Cirrus Logic CS47L35 codecs.
Signed-off-by: Piotr Stankiewicz
Signed-off-by: Richard Fitzgerald
Signed-off-by: Charles Keepax
---
Changes since V3:
- fixed missing FLL1_EFS2 register
- converted EQ registers to a case range because registers.h has been
Adds the codec driver for the CS47L35 SmartCodec. This is a
multi-functional codec based on the Cirrus Logic Madera platform.
Signed-off-by: Piotr Stankiewicz
Signed-off-by: Richard Fitzgerald
Signed-off-by: Charles Keepax
Adds the codec driver for the CS47L35 SmartCodec. This is a
multi-functional codec based on the Cirrus Logic Madera platform.
Signed-off-by: Piotr Stankiewicz
Signed-off-by: Richard Fitzgerald
Signed-off-by: Charles Keepax
---
No changes since V3
sound/soc/codecs/Kconfig |6 +
The Cirrus Logic Madera codecs are a family of related codecs with
extensive digital and analogue I/O, digital mixing and routing,
signal processing and programmable DSPs.
Signed-off-by: Richard Fitzgerald
Acked-by: Rob Herring
---
Changes
The Cirrus Logic Madera codecs are a family of related codecs with
extensive digital and analogue I/O, digital mixing and routing,
signal processing and programmable DSPs.
Signed-off-by: Richard Fitzgerald
Acked-by: Rob Herring
---
Changes since V3:
- include-dt-bindings/sound/madera.h moved
This is the binding description of the pinctrl driver for Cirru Logic
Madera codecs. The binding uses the generic pinctrl binding so the main
purpose here is to describe the device-specific names for groups and
functions.
Signed-off-by: Richard Fitzgerald
On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
wrote:
> The current way to find if the phy is internal is to compare DT phy-mode
> and emac_variant/internal_phy.
> But it will negate a possible future SoC where an external PHY use the
> same phy mode than the internal
This is the binding description of the pinctrl driver for Cirru Logic
Madera codecs. The binding uses the generic pinctrl binding so the main
purpose here is to describe the device-specific names for groups and
functions.
Signed-off-by: Richard Fitzgerald
Acked-by: Rob Herring
---
No changes
On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
wrote:
> The current way to find if the phy is internal is to compare DT phy-mode
> and emac_variant/internal_phy.
> But it will negate a possible future SoC where an external PHY use the
> same phy mode than the internal one.
>
> This patch adds a
Regmap configuration tables for Cirrus Logic CS47L90 and CS47L91 codecs.
Signed-off-by: Nikesh Oswal
Signed-off-by: Richard Fitzgerald
Signed-off-by: Charles Keepax
---
Changes since V3:
Regmap configuration tables for Cirrus Logic CS47L90 and CS47L91 codecs.
Signed-off-by: Nikesh Oswal
Signed-off-by: Richard Fitzgerald
Signed-off-by: Charles Keepax
---
Changes since V3:
- converted EQ and GPIO registers to a case range because registers.h
has been stripped to only define
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 0b5477d9dabd96ded4c5ef7a5f08b00188fc1dec
commit: dd55d44f408419278c00887bfcb2261d0caae350 staging: vboxvideo: Add
vboxvideo to drivers/staging
date: 11 days ago
config: x86_64-randconfig-ws0-07281558
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 0b5477d9dabd96ded4c5ef7a5f08b00188fc1dec
commit: dd55d44f408419278c00887bfcb2261d0caae350 staging: vboxvideo: Add
vboxvideo to drivers/staging
date: 11 days ago
config: x86_64-randconfig-ws0-07281558
Adds the codec driver for the CS47L90 SmartCodec. This is a
multi-functional codec based on the Cirrus Logic Madera platform.
Signed-off-by: Nikesh Oswal
Signed-off-by: Charles Keepax
Signed-off-by: Richard Fitzgerald
Adds the codec driver for the CS47L90 SmartCodec. This is a
multi-functional codec based on the Cirrus Logic Madera platform.
Signed-off-by: Nikesh Oswal
Signed-off-by: Charles Keepax
Signed-off-by: Richard Fitzgerald
---
Changes since V3:
- Fixed errors in the routing of ISRC3/4 to clock
This adds the generic core support for Cirrus Logic "Madera" class codecs.
These are complex audio codec SoCs with a variety of digital and analogue
I/O, onboard audio processing and DSPs, and other features.
These codecs are all based off a common set of hardware IP so can be
supported by a core
This adds the generic core support for Cirrus Logic "Madera" class codecs.
These are complex audio codec SoCs with a variety of digital and analogue
I/O, onboard audio processing and DSPs, and other features.
These codecs are all based off a common set of hardware IP so can be
supported by a core
The Cirrus Logic Madera codecs are a family of related codecs with
extensive digital and analogue I/O, digital mixing and routing,
signal processing and programmable DSPs.
This patch adds common support code shared by all Madera codecs.
Signed-off-by: Charles Keepax
The Cirrus Logic Madera codecs are a family of related codecs with
extensive digital and analogue I/O, digital mixing and routing,
signal processing and programmable DSPs.
This patch adds common support code shared by all Madera codecs.
Signed-off-by: Charles Keepax
Signed-off-by: Nariman
On Fri, Jul 28, 2017 at 2:34 PM, Jassi Brar wrote:
> On Fri, Jul 28, 2017 at 2:19 PM, Anup Patel wrote:
>> On Thu, Jul 27, 2017 at 5:23 PM, Jassi Brar wrote:
>>> On Thu, Jul 27, 2017 at 11:20 AM, Anup Patel
On Fri, Jul 28, 2017 at 2:34 PM, Jassi Brar wrote:
> On Fri, Jul 28, 2017 at 2:19 PM, Anup Patel wrote:
>> On Thu, Jul 27, 2017 at 5:23 PM, Jassi Brar wrote:
>>> On Thu, Jul 27, 2017 at 11:20 AM, Anup Patel
>>> wrote:
On Thu, Jul 27, 2017 at 10:29 AM, Jassi Brar
wrote:
>>>
于 2017年7月28日 GMT+08:00 下午5:44:51, Chen-Yu Tsai 写到:
>On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
> wrote:
>> This patch adds the sun8i-h3-ephy compatible to the internal PHY.
>>
>> Signed-off-by: Corentin Labbe
>> ---
>>
于 2017年7月28日 GMT+08:00 下午5:44:51, Chen-Yu Tsai 写到:
>On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
> wrote:
>> This patch adds the sun8i-h3-ephy compatible to the internal PHY.
>>
>> Signed-off-by: Corentin Labbe
>> ---
>> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
>
>To avoid repeating the
This adds a new driver identity "madera-ldo1" and probe function
so that this driver can be used to control the LDO1 regulator on
some Cirrus Logic Madera codecs.
Signed-off-by: Richard Fitzgerald
---
No changes since V3
drivers/regulator/Kconfig| 8
This adds a new driver identity "madera-ldo1" and probe function
so that this driver can be used to control the LDO1 regulator on
some Cirrus Logic Madera codecs.
Signed-off-by: Richard Fitzgerald
---
No changes since V3
drivers/regulator/Kconfig| 8 ++--
On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
wrote:
> This patch adds the sun8i-h3-ephy compatible to the internal PHY.
>
> Signed-off-by: Corentin Labbe
> ---
> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
To avoid repeating the past,
On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
wrote:
> This patch adds the sun8i-h3-ephy compatible to the internal PHY.
>
> Signed-off-by: Corentin Labbe
> ---
> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
To avoid repeating the past, this patch, if approved, will be merged
through the sunxi
Add support for Microchip sst26vf064b QSPI memory.
Signed-off-by: Claudiu Beznea
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 196b52f..796aac4 100644
---
Add support for Microchip sst26vf064b QSPI memory.
Signed-off-by: Claudiu Beznea
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 196b52f..796aac4 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
On Fri, Jul 28, 2017 at 11:19:33AM +0200, Peter Zijlstra wrote:
On Fri, Jul 28, 2017 at 12:46:40AM +, Mathieu Desnoyers wrote:
> This is a new one on me. What do we do to fix it?
Apparently (see below) the answer is, we ignore this.
I would suspect this might be caused by moving
On Fri, Jul 28, 2017 at 11:19:33AM +0200, Peter Zijlstra wrote:
On Fri, Jul 28, 2017 at 12:46:40AM +, Mathieu Desnoyers wrote:
> This is a new one on me. What do we do to fix it?
Apparently (see below) the answer is, we ignore this.
I would suspect this might be caused by moving
On 2017-07-28 00:14, Stephen Boyd wrote:
On 07/27/2017 04:10 AM, Abhishek Sahu wrote:
The current driver hardcodes the RCG2 register offsets. Some of
the RCG2’s use different offsets from the default one.
This patch adds the support to provide the register offsets array in
RCG2 clock node. If
On 2017-07-28 00:14, Stephen Boyd wrote:
On 07/27/2017 04:10 AM, Abhishek Sahu wrote:
The current driver hardcodes the RCG2 register offsets. Some of
the RCG2’s use different offsets from the default one.
This patch adds the support to provide the register offsets array in
RCG2 clock node. If
On Mon, Jul 24, 2017 at 04:44:45PM +0200, Borislav Petkov wrote:
> On Mon, Jul 24, 2017 at 09:14:18PM +0700, Suravee Suthikulpanit wrote:
> > Actually, this is not totally accurate. My apology. This patch is
> > mainly fix to incorrect core ID in /proc/cpuinfo.
>
> So you're "fixing" only some
On Mon, Jul 24, 2017 at 04:44:45PM +0200, Borislav Petkov wrote:
> On Mon, Jul 24, 2017 at 09:14:18PM +0700, Suravee Suthikulpanit wrote:
> > Actually, this is not totally accurate. My apology. This patch is
> > mainly fix to incorrect core ID in /proc/cpuinfo.
>
> So you're "fixing" only some
On 20/07/17 13:04, Punit Agrawal wrote:
> On systems that are not booted as a Xen domain, the xenfs driver prints
> the following message during boot.
>
> [3.460595] xenfs: not registering filesystem on non-xen platform
>
> As the user chose not to boot a Xen domain, this message does not
>
On 20/07/17 13:04, Punit Agrawal wrote:
> On systems that are not booted as a Xen domain, the xenfs driver prints
> the following message during boot.
>
> [3.460595] xenfs: not registering filesystem on non-xen platform
>
> As the user chose not to boot a Xen domain, this message does not
>
On 04/07/17 20:34, Gustavo A. R. Silva wrote:
> Remove unnecessary static on local variables last_frontswap_pages and
> tgt_frontswap_pages. Such variables are initialized before being used,
> on every execution path throughout the function. The statics have no
> benefit and, removing them reduce
On 04/07/17 20:34, Gustavo A. R. Silva wrote:
> Remove unnecessary static on local variables last_frontswap_pages and
> tgt_frontswap_pages. Such variables are initialized before being used,
> on every execution path throughout the function. The statics have no
> benefit and, removing them reduce
Hello
The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.
This patchs series adds a new way to find if the PHY is internal, via its
Hello
The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.
This patchs series adds a new way to find if the PHY is internal, via its
This patch adds the sun8i-h3-ephy compatible to the internal PHY.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
The internal PHYs for H3 ans V3S now need to have their own compatible.
This patch rename them in the binding documentation.
Signed-off-by: Corentin Labbe
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
1 file changed, 2 insertions(+), 2
This patch adds the sun8i-h3-ephy compatible to the internal PHY.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index
The internal PHYs for H3 ans V3S now need to have their own compatible.
This patch rename them in the binding documentation.
Signed-off-by: Corentin Labbe
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.
This patch adds a new way to find if the PHY is internal, via its
compatible.
Since
The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.
This patch adds a new way to find if the PHY is internal, via its
compatible.
Since
On Fri, Jul 28, 2017 at 09:45:16AM +0200, Vlastimil Babka wrote:
> [+CC PeterZ]
>
> On 07/27/2017 06:46 PM, Dima Zavin wrote:
> > In codepaths that use the begin/retry interface for reading
> > mems_allowed_seq with irqs disabled, there exists a race condition that
> > stalls the patch process
On Fri, Jul 28, 2017 at 09:45:16AM +0200, Vlastimil Babka wrote:
> [+CC PeterZ]
>
> On 07/27/2017 06:46 PM, Dima Zavin wrote:
> > In codepaths that use the begin/retry interface for reading
> > mems_allowed_seq with irqs disabled, there exists a race condition that
> > stalls the patch process
On Thu, Jul 27, 2017 at 06:10:34PM -0700, Vikram Mulukutla wrote:
> On 2017-07-26 18:29, qiaozhou wrote:
> >On 2017年07月26日 22:16, Thomas Gleixner wrote:
> >>On Wed, 26 Jul 2017, qiaozhou wrote:
> >>For that particular timer case we can clear base->running_timer w/o the
> >>lock held (see patch
On Thu, Jul 27, 2017 at 06:10:34PM -0700, Vikram Mulukutla wrote:
> I think we should have this discussion now - I brought this up earlier [1]
> and I promised a test case that I completely forgot about - but here it
> is (attached). Essentially a Big CPU in an acquire-check-release loop
> will
On Thu, Jul 27, 2017 at 06:10:34PM -0700, Vikram Mulukutla wrote:
> On 2017-07-26 18:29, qiaozhou wrote:
> >On 2017年07月26日 22:16, Thomas Gleixner wrote:
> >>On Wed, 26 Jul 2017, qiaozhou wrote:
> >>For that particular timer case we can clear base->running_timer w/o the
> >>lock held (see patch
On Thu, Jul 27, 2017 at 06:10:34PM -0700, Vikram Mulukutla wrote:
> I think we should have this discussion now - I brought this up earlier [1]
> and I promised a test case that I completely forgot about - but here it
> is (attached). Essentially a Big CPU in an acquire-check-release loop
> will
Hi Daniel,
Thanks for your reply.
Currently I am using connector type 'Unknown' , and functionally it serves my
need.
Intention for sending this patch is that userspace tools should recognize SDI
drivers as SDI only.
Also, I see there are number of 'SDI' drivers getting developed 'under the
Hi Daniel,
Thanks for your reply.
Currently I am using connector type 'Unknown' , and functionally it serves my
need.
Intention for sending this patch is that userspace tools should recognize SDI
drivers as SDI only.
Also, I see there are number of 'SDI' drivers getting developed 'under the
If the buffer pass to msg_print_text is not big enough to put both all
prefixes and log_text(msg), kernel will quietly break.
That means the user may not have the chance to know whether the
log_text(msg) is fully printed into buffer or not.
In this patch, once above case happened, we try to
If the buffer pass to msg_print_text is not big enough to put both all
prefixes and log_text(msg), kernel will quietly break.
That means the user may not have the chance to know whether the
log_text(msg) is fully printed into buffer or not.
In this patch, once above case happened, we try to
Hi Mark,
Am Mittwoch, 26. Juli 2017, 14:19:35 CEST schrieb Mark Yao:
> Signed-off-by: Mark Yao
> Acked-by: Rob Herring
> ---
> Changes in v5:
> - clean document commit title
> - move changes description out of docummit commit msg
>
> Changes in v2:
> -
On Thu, Jul 27, 2017 at 02:12:03PM -0400, Geneviève Bastien wrote:
> The field perf_callchain, if available, is added to the sampling
> events during the CTF conversion. It is an array of u64 values.
> The perf_callchain_size field contains the size of the array.
>
> It will allow the analysis of
Hi Mark,
Am Mittwoch, 26. Juli 2017, 14:19:35 CEST schrieb Mark Yao:
> Signed-off-by: Mark Yao
> Acked-by: Rob Herring
> ---
> Changes in v5:
> - clean document commit title
> - move changes description out of docummit commit msg
>
> Changes in v2:
> - rename rk322x to rk3228
> - correct some
On Thu, Jul 27, 2017 at 02:12:03PM -0400, Geneviève Bastien wrote:
> The field perf_callchain, if available, is added to the sampling
> events during the CTF conversion. It is an array of u64 values.
> The perf_callchain_size field contains the size of the array.
>
> It will allow the analysis of
Am Freitag, 28. Juli 2017, 14:06:25 CEST schrieb Mark Yao:
> Grouping the vop registers facilitates make register
> definition clearer, and also is useful for different vop
> reuse the same group register.
>
> Signed-off-by: Mark Yao
> Reviewed-by: Jeffy Chen
Am Freitag, 28. Juli 2017, 14:06:25 CEST schrieb Mark Yao:
> Grouping the vop registers facilitates make register
> definition clearer, and also is useful for different vop
> reuse the same group register.
>
> Signed-off-by: Mark Yao
> Reviewed-by: Jeffy Chen
on rk3036 and rk3288
Tested-by:
Hello!
On 7/27/2017 9:38 AM, Ryder Lee wrote:
Add DT bindings for the onboard SATA controller present on the MediaTek
SoCs.
Signed-off-by: Ryder Lee
---
Documentation/devicetree/bindings/ata/ahci-mtk.txt | 48 ++
1 file changed, 48 insertions(+)
Hello!
On 7/27/2017 9:38 AM, Ryder Lee wrote:
Add DT bindings for the onboard SATA controller present on the MediaTek
SoCs.
Signed-off-by: Ryder Lee
---
Documentation/devicetree/bindings/ata/ahci-mtk.txt | 48 ++
1 file changed, 48 insertions(+)
create mode 100644
On Fri, Jul 28, 2017 at 12:46:40AM +, Mathieu Desnoyers wrote:
> > This is a new one on me. What do we do to fix it?
Apparently (see below) the answer is, we ignore this.
> I would suspect this might be caused by moving membarrier.c from kernel/
> to kernel/sched/. Perhaps Peter knows ?
On Fri, Jul 28, 2017 at 12:46:40AM +, Mathieu Desnoyers wrote:
> > This is a new one on me. What do we do to fix it?
Apparently (see below) the answer is, we ignore this.
> I would suspect this might be caused by moving membarrier.c from kernel/
> to kernel/sched/. Perhaps Peter knows ?
From: Michal Hocko
GFP_TEMPORARY has been introduced by e12ba74d8ff3 ("Group short-lived
and reclaimable kernel allocations") along with __GFP_RECLAIMABLE. It's
primary motivation was to allow users to tell that an allocation is
short lived and so the allocator can try to place
From: Michal Hocko
GFP_TEMPORARY has been introduced by e12ba74d8ff3 ("Group short-lived
and reclaimable kernel allocations") along with __GFP_RECLAIMABLE. It's
primary motivation was to allow users to tell that an allocation is
short lived and so the allocator can try to place such allocations
On Thu, Jul 27, 2017 at 12:41 AM, Linus Torvalds
wrote:
> This is wrong. The sparse version of __compiletime_object_size()
> should just be fixed to take a 'const' pointer without complaints.
The underlying __builtin_object_size() has been fixed in the sparse tree
On Thu, Jul 27, 2017 at 12:41 AM, Linus Torvalds
wrote:
> This is wrong. The sparse version of __compiletime_object_size()
> should just be fixed to take a 'const' pointer without complaints.
The underlying __builtin_object_size() has been fixed in the sparse tree
6 months ago or so.
-- Luc
On Fri, Jul 28, 2017 at 3:30 AM, Mani, Rajmohan wrote:
>> On Wed, Jul 26, 2017 at 11:23 AM, Lee Jones wrote:
>> > On Tue, 25 Jul 2017, Andy Shevchenko wrote:
>> >> On Tue, Jul 25, 2017 at 12:10 PM, Lee Jones wrote:
>>
>> >> I
On Fri, Jul 28, 2017 at 3:30 AM, Mani, Rajmohan wrote:
>> On Wed, Jul 26, 2017 at 11:23 AM, Lee Jones wrote:
>> > On Tue, 25 Jul 2017, Andy Shevchenko wrote:
>> >> On Tue, Jul 25, 2017 at 12:10 PM, Lee Jones wrote:
>>
>> >> I briefly checked few ->read() and ->write() implementations and
>> >>
Am 28.07.2017 um 03:43 schrieb Alex Deucher:
On Tue, Jul 25, 2017 at 5:47 PM, Kees Cook wrote:
As done for vega10 in commit 3ddd396f6b57 ("drm/amd/powerplay: Use
designated initializers") mark other tableFunction entries with designated
initializers. The randstruct
Am 28.07.2017 um 03:43 schrieb Alex Deucher:
On Tue, Jul 25, 2017 at 5:47 PM, Kees Cook wrote:
As done for vega10 in commit 3ddd396f6b57 ("drm/amd/powerplay: Use
designated initializers") mark other tableFunction entries with designated
initializers. The randstruct plugin requires designated
Setting the frequency higher than 528Mhz actually sets the ARM
clock to 528MHz. That's because PLL2 is used as the root clock when the
frequency is higher than 396MHz.
cpupower frequency-set -f 792000
arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz.
[ 61.606383] cpu cpu0: 396
Setting the frequency higher than 528Mhz actually sets the ARM
clock to 528MHz. That's because PLL2 is used as the root clock when the
frequency is higher than 396MHz.
cpupower frequency-set -f 792000
arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz.
[ 61.606383] cpu cpu0: 396
On 07/27/17 at 05:58pm, Joerg Roedel wrote:
> On Fri, Jul 21, 2017 at 04:59:11PM +0800, Baoquan He wrote:
> > From: root
>
> You probaly need to reset the author on this one.
Oops, sorry. I made this patch on a testing machine. Will correct it.
Thanks a
On 07/27/17 at 05:58pm, Joerg Roedel wrote:
> On Fri, Jul 21, 2017 at 04:59:11PM +0800, Baoquan He wrote:
> > From: root
>
> You probaly need to reset the author on this one.
Oops, sorry. I made this patch on a testing machine. Will correct it.
Thanks a lot for all these comments and great
On Fri, 28 Jul 2017 08:36:03 +0200
Ingo Molnar wrote:
>
> * Masami Hiramatsu wrote:
>
> > Introduce CONFIG_IRQENTRY to simplify generating
> > irqentry and softirqentry text sections.
> > Currently generating those sections depends on
> >
On Fri, 28 Jul 2017 08:36:03 +0200
Ingo Molnar wrote:
>
> * Masami Hiramatsu wrote:
>
> > Introduce CONFIG_IRQENTRY to simplify generating
> > irqentry and softirqentry text sections.
> > Currently generating those sections depends on
> > CONFIG_FUNCTION_GRAPH_TRACER and/or CONFIG_KASAN, in
>
2017-07-28 16:24 GMT+08:00 Mike Galbraith :
> On Fri, 2017-07-28 at 09:03 +0200, Paolo Bonzini wrote:
>> With these two patches, KVM does not blindly pass the exit interruption
>> info and exit qualification from the vmcs02 and vmcs12 when injecting
>> an exception. There were two
2017-07-28 16:24 GMT+08:00 Mike Galbraith :
> On Fri, 2017-07-28 at 09:03 +0200, Paolo Bonzini wrote:
>> With these two patches, KVM does not blindly pass the exit interruption
>> info and exit qualification from the vmcs02 and vmcs12 when injecting
>> an exception. There were two spots where
On 07/27/17 at 05:57pm, Joerg Roedel wrote:
> On Fri, Jul 21, 2017 at 04:59:09PM +0800, Baoquan He wrote:
> > When iommu is pre_enabled in kdump kernel, if a device is set up with
> > guest translations (DTE.GV=1), then don't copy GCR3 table root pointer
> > but move the device over to an empty
On 07/27/17 at 05:57pm, Joerg Roedel wrote:
> On Fri, Jul 21, 2017 at 04:59:09PM +0800, Baoquan He wrote:
> > When iommu is pre_enabled in kdump kernel, if a device is set up with
> > guest translations (DTE.GV=1), then don't copy GCR3 table root pointer
> > but move the device over to an empty
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