Matthew Garrett writes:
> Distributions may wish to provide kernels that permit loading of
> unsigned modules based on certain policy decisions.
Sorry, that's way too vague to accept this patch.
So I'm guessing a binary module is behind this vagueness. If you want
some other method than signing
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by work with
const usb_device_id. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
sound/usb/caiaq/device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by work with
const usb_device_id. So mark the non-const structs as const.
Arvind Yadav (7):
[PATCH 1/7] ALSA: 6fire: constify usb_device_id.
[PATCH 2/7] ALSA: bcd2000: constify usb_device_id
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by work with
const usb_device_id. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
sound/usb/card.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by work with
const usb_device_id. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
sound/usb/usx2y/usbusx2y.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by work with
const usb_device_id. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
sound/usb/misc/ua101.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by work with
const usb_device_id. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
sound/usb/usx2y/us122l.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by work with
const usb_device_id. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
sound/usb/bcd2000/bcd2000.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
dif
Make c_can_pci_data structures const as they are only used during
a copy operation.
Signed-off-by: Bhumika Goyal
---
drivers/net/can/c_can/c_can_pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/can/c_can/c_can_pci.c
b/drivers/net/can/c_can/c_can_pci.c
in
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by work with
const usb_device_id. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
sound/usb/6fire/chip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
From: Markus Elfring
Date: Sat, 5 Aug 2017 22:30:04 +0200
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The script “checkpatch.pl” pointed information out like the following.
Comparison to NULL could be written !…
Thus fix the affected source code pla
From: Markus Elfring
Date: Sat, 5 Aug 2017 22:10:41 +0200
Omit extra messages for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Link:
http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signe
From: Markus Elfring
Date: Sat, 5 Aug 2017 21:39:06 +0200
The script "checkpatch.pl" pointed information out like the following.
ERROR: do not use assignment in if condition
Thus fix affected source code places.
Signed-off-by: Markus Elfring
---
drivers/atm/iphase.c | 57
From: Markus Elfring
Date: Sun, 6 Aug 2017 08:18:28 +0200
A few update suggestions were taken into account
from static source code analysis.
Markus Elfring (3):
Adjust 11 function calls together with a variable assignment
Delete five error messages for a failed memory allocation
Adjust fou
On Thu, Aug 3, 2017 at 4:49 PM, Joe Perches wrote:
> On Thu, 2017-08-03 at 17:09 +0800, kbuild test robot wrote:
>> Hi Joe,
>>
>> [auto build test WARNING on staging/staging-testing]
>> [also build test WARNING on next-20170803]
>> [cannot apply to v4.13-rc3]
>> [if your patch is applied to the wr
I'm adding hot-plug support for the above arch and ran into performance issue
with execution of
partition_sched_domains () - About 0.5 sec per cpu, which is unacceptable with
the arch supported 4k cpus.
To my limited understanding, on the plat-eznps arch, where each cpu is always
running a sin
Declare cca_public_sec and cca_token_hdr structures as const as they are
only used during copy operations.
Signed-off-by: Bhumika Goyal
---
drivers/s390/crypto/zcrypt_cca_key.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/s390/crypto/zcrypt_cca_key.h
b/drive
Michel Dänzer writes:
> [...]
>
>> +#define DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x0002 /* Use
>> next sequence if we've missed */
>
> Do you have userspace making use of DRM_CRTC_SEQUENCE_NEXT_ON_MISS? If
> not, drop it.
I added this so that the new ioctl would be compatible wi
Daniel Vetter writes:
> Since I missed all the details Michel spotted, so I'll defer to his r-b.
> Also, before merging we need the userspace user. Do we have e.g.
> -modesetting patch for this, fully reviewed&ready for merging, just as
> demonstration?
Well, given that we'll have to keep the ol
On Mon, Jul 17, 2017 at 11:37:44AM +0530, Maninder Singh wrote:
> Error reported by static tool for copy paste
> issue, fixing the same.
>
> Signed-off-by: Maninder Singh
> Signed-off-by: Vaneet Narang
Thanks, applied.
- Ted
Hi Jerome,
[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.13-rc3 next-20170804]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Jerome-Brunet/ARM64-dts-meson-gx-Use-correct
On Fri, Aug 04, 2017 at 02:00:23PM +0200, Michal Simek wrote:
> From: Naga Sureshkumar Relli
That subject:
Subject: [PATCH 1/5] edac: synopsys: Add platform specific structures ddrc
controller
doesn't read like a proper sentence to me.
> This patch adds platform specific structures, so that w
Hi Ian,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 0fdd951c9bef93637d5af036851e7a5632fbd6c3
commit: c7acec713d14c6ce8a20154f9dfda258d6bcad3b kernel.h: handle pointers to
arrays better in container_of()
date:
Hi Lorenzo,
[auto build test ERROR on pm/linux-next]
[also build test ERROR on v4.13-rc3 next-20170804]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Lorenzo-Pieralisi/ACPICA-resource_mgr-Allow
It appears as though the addition of the PID namespace did not update
the output code for /proc/*/sched, which resulted in it providing PIDs
that were not self-consistent with the /proc mount. This additionally
made it trivial to detect whether a process was inside &init_pid_ns from
userspace (maki
On Sun, Jul 16, 2017 at 11:20:12PM -0700, Tahsin Erdogan wrote:
> ext4_xattr_inode_read() currently reads each block sequentially while
> waiting for io operation to complete before moving on to the next
> block. This prevents request merging in block layer.
>
> Add a ext4_bread_batch() function t
Hi Daniel,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 0fdd951c9bef93637d5af036851e7a5632fbd6c3
commit: dc11bae78529526605c5c45c369c9512fd012093 clocksource/drivers: Add
timer-of common init routine
date: 8 we
Aleksa Sarai writes:
> On 2017-08-06 02:52, Aleksa Sarai wrote:
>> It appears as though the addition of the PID namespace did not update
>> the output code for /proc/$pid/sched, which made it trivial to figure
>> out whether a process was inside &init_pid_ns from userspace (making
>> container de
> I guess these two functions are small enough that they could be merged
> into one, saving a few lines. Then again, fs/aio.c seems to generally use
> fairly short functions doing not too much at once, so your approach maybe
> fits better with the style of the subsystem.
I don't see a problem with
Hi Herbert,
This still applies fine on 4.13-rc3, any chance to get it merged through
one of your trees?
--
Stefan
On 2017-04-19 20:40, Stefan Agner wrote:
> Use just @ to denote comments which works with gcc and clang.
> Otherwise clang reports an escape sequence error:
> error: invalid % esc
There is nothing impossible COW for mapped files, but it is not a good match
for the expected usage model for DAX.
The idea is that programs can mmap files and the build interesting data
structures in them, just like they do in DRAM. This means lots of small
updatEs, and that would be very s
于 2017年8月6日 GMT+08:00 上午10:39:54, Chen-Yu Tsai 写到:
>On Sat, Aug 05, 2017 at 05:35:55AM +0800, Icenowy Zheng wrote:
>> The configuration struct of A64 EMMC(MMC2) compatible used to
>> have the needs_new_timings variable missing, which lead to NULL
>> pointer dereference now when trying to set up
Hi Arnd,
2017-08-05 7:10 GMT+09:00 Arnd Bergmann :
> On Fri, Aug 4, 2017 at 3:34 PM, Masahiro Yamada
> wrote:
>> Include mmci_qcom_dml.h from mmci_qcom_dml.c to fix the following
>> sparse warnings:
>>
>> CHECK drivers/mmc/host/mmci_qcom_dml.c
>> drivers/mmc/host/mmci_qcom_dml.c:57:6: warni
On Sat, Jul 15, 2017 at 02:49:05AM -0700, Andreas Dilger wrote:
> On Jul 14, 2017, at 5:25 PM, Tahsin Erdogan wrote:
> >
> > When an xattr block has a single reference, block is updated inplace
> > and it is reinserted to the cache. Later, a cache lookup is performed
> > to see whether an existin
This SoC is too old. It is difficult to maintain any longer.
Signed-off-by: Masahiro Yamada
---
.../devicetree/bindings/reset/uniphier-reset.txt | 2 -
drivers/reset/reset-uniphier.c | 48 --
2 files changed, 16 insertions(+), 34 deletions(-)
diff --
This macro turned out not so useful as I had expected.
Hardware engineers said they would change reset bit assignments for
every SoC going forward. This means we can not share the macros
among SoCs. Just use primitive macros.
Signed-off-by: Masahiro Yamada
---
drivers/reset/reset-uniphier.c
Hi Philipp,
Here are UniPhier SoCs updates for v4.14.
- Remove old SoC support
- Remove useless macros
Masahiro Yamada (2):
reset: uniphier: remove sLD3 SoC support
reset: uniphier: do not use per-SoC macro for system reset block
.../devicetree/bindings/reset/uniphier-reset.txt | 2
On Sat, Aug 05, 2017 at 05:35:55AM +0800, Icenowy Zheng wrote:
> The configuration struct of A64 EMMC(MMC2) compatible used to
> have the needs_new_timings variable missing, which lead to NULL
> pointer dereference now when trying to set up the old timings mode, as
> the old timings mode doesn't ex
On Fri, 2017-08-04 at 22:49 +0100, Graeme Gregory wrote:
> A couple of patches to build on the SPCR quirks support already upstreamed.
>
> 1 - Moonshot m400 cartridge has the same soc but ACPI tables have different
> HPe specific headers so extend quirk to understand those too.
>
> 2 - Relevant v
On Thu, Jul 20, 2017 at 02:40:37AM -0700, Tahsin Erdogan wrote:
> ext4_alloc_file_blocks() does not use its mode parameter. Remove it.
>
> Signed-off-by: Tahsin Erdogan
Thanks, applied.
- Ted
Hi Honghui,
If you plan to send next version, then I would suggest some minor
changes.
On Fri, 2017-08-04 at 20:06 +0800, honghui.zh...@mediatek.com wrote:
> +#define PCIE_CRSTB BIT(3)
> +#define PCIE_PERSTB BIT(8)
> +#define PCI_LINKDOWN_RST_EN GENMASK(15, 13)
PCIE_LINKDOWN_
On Sat, Aug 5, 2017 at 5:35 AM, Icenowy Zheng wrote:
> The A83T MMC support code introduces the timings mode switch, however
> such a switch doesn't exist on new SoCs with only new timings mode.
>
> Only execute the switch if the SoC really have the timings mode switch,
> to fix the regression sho
On Tue, Aug 01, 2017 at 02:04:03PM +0200, Arnd Bergmann wrote:
> There is one remaining issue with the function that I'm not addressing
> here: With s_blocksize_bits==16, we don't actually print the last two
> members of the array, as we loop though just the first 14 members.
> This could be easily
Allow any number of command line arguments to match either the
section header or the section contents and create new files.
Create MAINTAINERS.new and SECTION.new.
This allows scripting of the movement of various sections from
MAINTAINERS.
Signed-off-by: Joe Perches
---
scripts/parse-maintaine
Instead of reading STDIN and writing STDOUT, use specific filenames of
MAINTAINERS and MAINTAINERS.new.
Use hash references instead of global hash %hash so future modifications
can read and write specific hashes to split up MAINTAINERS into multiple
files using a script.
Signed-off-by: Joe Perche
Section [A-Z]: patterns are not currently in any required sorting order.
Add a specific sorting sequence to MAINTAINERS entries.
Sort F: and X: patterns in alphabetic order.
The preferred section ordering is:
SECTION HEADER
M: Maintainers
R: Reviewers
P: Named persons without email
Move MAINTAINERS into a separate directory and reorder it.
Separate various blocks of MAINTAINER sections into separate files.
Signed-off-by: Joe Perches
---
scripts/move_maintainer_sections.bash | 87 +++
1 file changed, 87 insertions(+)
create mode 100755 scrip
MAINTAINERS is a very large file.
Update the parse-maintainer script to use specific filenames to
allow scripting of the moving of various bits into separate files.
Add a bash script to move various bits into multiple files.
Joe Perches (4):
parse-maintainers: Add section pattern sorting
par
Hello and good evening,my name is Titi,i am a young and single girl looking for
friends,
and i will like to be your pen friend. Please get back to me through
( kambo4t...@gmail.com ),so that we can get to know each other with picture
exchange and introduction.
Hi Al,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 0fdd951c9bef93637d5af036851e7a5632fbd6c3
commit: 468138d78510688fb5476f98d23f11ac6a63229a binfmt_flat:
flat_{get,put}_addr_from_rp() should be able to fail
date
Andreas, Emoly,
I'd appreciate your thoughts; what do you think about Tahsin's patch.
Could you give it a try on a file system created with Lustre and let
me know how it works for you?
Many thanks!!
- Ted
On Mon, Jul 24, 2017 at 01:13:08PM -0700, Tahsin E
On Saturday, August 5, 2017 10:57:53 PM CEST Darren Hart wrote:
> On Sat, Aug 05, 2017 at 01:30:20AM +0200, Rafael Wysocki wrote:
> > On Friday, August 4, 2017 7:29:53 PM CEST Darren Hart wrote:
> > > On Fri, Aug 04, 2017 at 12:00:06PM -0500, Mario Limonciello wrote:
> > > > This fixes a problem wh
On 08/04/2017 08:18 PM, Brendan Higgins wrote:
This patchset introduces IPMI Block Transfer over I2C (BT-I2C), which has the
same semantics as IPMI Block Transfer except it done over I2C.
For the OpenBMC people, this is based on an RFC:
https://lists.ozlabs.org/pipermail/openbmc/2016-September/0
On Thu, Aug 03, 2017 at 08:50:06AM -0700, Darren Hart wrote:
> On Wed, Aug 02, 2017 at 06:06:20PM -0700, Linus Torvalds wrote:
> > On Wed, Aug 2, 2017 at 5:28 PM, Stephen Rothwell
> > wrote:
> > >
> > > I would say that if you rebase someone's commit(s), then you are on the
> > > "patch's deliver
On Sat, Aug 5, 2017 at 10:34 AM, Lukas Wunner wrote:
> Just an innocent question from a bystander, what's the downside of
> unconditionally requesting that memory be overwritten? Does it
> prolong reboot noticeably?
Yes, it's just to avoid stalling reboot for as long as it takes to clear RAM.
>
Hi Brendan,
[auto build test ERROR on char-misc/char-misc-testing]
[also build test ERROR on v4.13-rc3 next-20170804]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Brendan-Higgins/ipmi-bt-i2c-a
Function handle_request called from bt_i2c_slave_cb with bt_slave->lock
held but uses GFP_KERNEL. Replace GFP_KERNEL by GFP_ATOMIC.
Generated by: scripts/coccinelle/locks/call_kern.cocci
Fixes: acd0208e3557 ("ipmi: bt-i2c: added IPMI Block Transfer over I2C BMC
side")
CC: Brendan Higgins
Signe
The thermal_zone_of_device_ops structure is only passed as the fourth
argument to thermal_zone_of_sensor_register, which is declared as const.
Thus the thermal_zone_of_device_ops structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
posi
The thermal_zone_of_device_ops structure is only passed as the fourth
argument to thermal_zone_of_sensor_register, which is declared as const.
Thus the thermal_zone_of_device_ops structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
posi
The thermal_zone_of_device_ops structure is only passed as the fourth
argument to thermal_zone_of_sensor_register, which is declared as const.
Thus the thermal_zone_of_device_ops structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
posi
The thermal_zone_of_device_ops structures are only passed as the fourth
argument to thermal_zone_of_sensor_register, which is declared as const.
Thus the thermal_zone_of_device_ops structures themselves can be const.
Done with the help of Coccinelle.
---
drivers/thermal/broadcom/bcm2835_thermal
The thermal_zone_of_device_ops structure is only passed as the fourth
argument to thermal_zone_of_sensor_register, which is declared as const.
Thus the thermal_zone_of_device_ops structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
posi
On Sat, Aug 05, 2017 at 01:30:20AM +0200, Rafael Wysocki wrote:
> On Friday, August 4, 2017 7:29:53 PM CEST Darren Hart wrote:
> > On Fri, Aug 04, 2017 at 12:00:06PM -0500, Mario Limonciello wrote:
> > > This fixes a problem where the system gets stuck in a loop
> > > unable to wakeup via power but
dsa_slave_create currently takes 4 arguments while it only needs the
related dsa_port and its name. Remove all other arguments.
Signed-off-by: Vivien Didelot
---
net/dsa/dsa2.c | 2 +-
net/dsa/dsa_priv.h | 3 +--
net/dsa/legacy.c | 2 +-
net/dsa/slave.c| 14 +++---
4 files c
Several DSA core setup functions take many arguments, mostly because of
the legacy code. This patch series removes the useless args of these
functions, where either the dsa_switch or dsa_port argument is enough.
Changes in v2:
- ds->dev is already assigned by dsa_switch_alloc
Vivien Didelot (3)
dsa_switch_alloc() already assigns ds-dev, which can be used in
dsa_switch_setup_one and dsa_cpu_dsa_setups instead of requiring an
additional struct device argument.
Signed-off-by: Vivien Didelot
---
net/dsa/legacy.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff -
dsa_cpu_dsa_setup currently takes 4 arguments but they are all available
from the dsa_port argument. Remove all others.
Signed-off-by: Vivien Didelot
---
net/dsa/dsa.c | 10 +-
net/dsa/dsa2.c | 4 ++--
net/dsa/dsa_priv.h | 3 +--
net/dsa/legacy.c | 4 +---
4 files changed,
On Sat, Aug 5, 2017 at 6:12 AM, Deepa Dinamani wrote:
> struct timespec is not y2038 safe. Use y2038 safe
> struct timespec64 to represent timeouts.
> The system call interface itself will be changed as
> part of different series.
>
> Timeouts will not really need more than 32 bits.
> But, replaci
Hi Andrew,
Andrew Lunn writes:
>> @@ -251,8 +251,9 @@ dsa_switch_setup(struct dsa_switch_tree *dst, struct
>> net_device *master,
>> ds->cd = cd;
>> ds->ops = ops;
>> ds->priv = priv;
>> +ds->dev = parent;
>
> Is this even needed? dsa_switch_alloc() does ds->dev = dev.
You a
The latest change of compat_sys_sigpending has broken it in two ways.
First, it tries to write 4 bytes more than userspace expects:
sizeof(old_sigset_t) == sizeof(long) == 8 instead of
sizeof(compat_old_sigset_t) == sizeof(u32) == 4.
Second, on big endian architectures these bytes are being writt
Den 05.08.2017 20.19, skrev Noralf Trønnes:
Den 04.08.2017 00.33, skrev David Lechner:
LEGO MINDSTORMS EV3 has an LCD with a ST7586 controller. This adds a new
module for the ST7586 controller with parameters for the LEGO MINDSTORMS
EV3 LCD display.
Signed-off-by: David Lechner
---
[...]
On Sat, Aug 5, 2017 at 6:12 AM, Deepa Dinamani wrote:
> Usage of these apis and their compat versions makes
> the syscalls: select family of syscalls and their
> compat implementations simpler.
>
> This is a preparatory patch to isolate data conversions to
> struct timespec64 at userspace boundari
Hi Rik,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.13-rc3 next-20170804]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/riel-redhat-com/x86-mpx-make-mpx-depend-on-x86-6
Dear linux developers,
since my upgrade from linux 4.11 to linux 4.12 the "kvm_intel" module does not
load correctly anymore. "Modprobing" the kernel module gives an Input/Output
error. It seems to be related to the CPU architecture and (to my knowledge)
affects Conroe CPUs. I did a bisect and
On 08/05/2017 08:43 AM, Greg Kroah-Hartman wrote:
On Sat, Aug 05, 2017 at 08:02:17AM +0200, Willy Tarreau wrote:
On Sat, Aug 05, 2017 at 07:55:11AM +0200, Willy Tarreau wrote:
On Fri, Aug 04, 2017 at 07:51:07PM -0700, Greg Kroah-Hartman wrote:
On Fri, Aug 04, 2017 at 07:46:57PM -0700, Greg Kro
Hi Daniel,
>>>
>>> So the only arch that sets __ARCH_WANT_SYSCALL_DEPRECATED
>>> is score:
>>>
>>>$ git grep -n __ARCH_WANT_SYSCALL_DEPRECATED
>>>arch/score/include/uapi/asm/unistd.h:7:#define
>>> __ARCH_WANT_SYSCALL_DEPRECATED
>>>include/uapi/asm-generic/unistd.h:837:#ifdef
>>> __ARC
Hi Rik,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.13-rc3 next-20170804]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/riel-redhat-com/x86-mpx-make-mpx-depend-on-x86-6
Den 04.08.2017 00.33, skrev David Lechner:
LEGO MINDSTORMS EV3 has an LCD with a ST7586 controller. This adds a new
module for the ST7586 controller with parameters for the LEGO MINDSTORMS
EV3 LCD display.
Signed-off-by: David Lechner
---
MAINTAINERS | 6 +
drivers/gp
On 2017-08-06 02:52, Aleksa Sarai wrote:
It appears as though the addition of the PID namespace did not update
the output code for /proc/$pid/sched, which made it trivial to figure
out whether a process was inside &init_pid_ns from userspace (making
container detection trivial[1]). This lead to s
On Sat, Aug 05, 2017 at 09:35:22AM -0700, Matthew Garrett wrote:
> On Sat, Aug 5, 2017 at 2:50 AM, Ard Biesheuvel
> wrote:
> > On 4 August 2017 at 22:20, Matthew Garrett wrote:
> > > If a machine is reset while secrets are present in RAM, it may be
> > > possible for code executed after the rebo
Ich bin reich und fühle mich verpflichtet Menschen in Not eine zweite Chance zu
geben.
Sie werden keine Überraschungen erleben, es ist kein Betrug.
Kontaktieren sie mich, geben sie an wieviel Geld sie leihen möchten.
Ich übersende ihnen sofort welche Möglichkeiten sie haben.
It appears as though the addition of the PID namespace did not update
the output code for /proc/$pid/sched, which made it trivial to figure
out whether a process was inside &init_pid_ns from userspace (making
container detection trivial[1]). This lead to situations such as:
% unshare -pf head -n
On Sat, Aug 5, 2017 at 2:50 AM, Ard Biesheuvel
wrote:
> On 4 August 2017 at 22:20, Matthew Garrett wrote:
>> If a machine is reset while secrets are present in RAM, it may be
>> possible for code executed after the reboot to extract those secrets
>> from untouched memory. The Trusted Computing Gr
The NAND page read fails without complete boot chain since
NAND_DEV_CMD_VLD value is not proper. The default power on reset
value for this register is
0xe - ERASE_START_VALID | WRITE_START_VALID | READ_STOP_VALID
The READ_START_VALID should be enabled for sending PAGE_READ
command. READ_STOP_
1. QPIC NAND controller uses 3 BAM channels: command, data tx
and data rx while EBI2 NAND controller uses only single ADM
channel.
2. CRCI is only required for ADM DMA and it's not required for
BAM DMA.
Reviewed-by: Archit Taneja
Signed-off-by: Abhishek Sahu
---
drivers/mtd/nand/qcom_n
The NAND controller returns ECC failure during read of completely
erased codeword. The NAND controller has hardware functionality
to detect erased codeword in case of BCH ECC algorithm. The
NAND_ERASED_CW_DETECT_CFG register controls the erased
codeword/page detection controller. This register shou
1. Add the data descriptor preparation function which will be used
only by BAM DMA for forming the data SGL’s
2. Add clear BAM transaction and call it before every new request
3. Check DMA mode for ADM or BAM and call the appropriate
descriptor formation function.
Signed-off-by: Abhishek Sah
1. DM_EN is only required for EBI2 NAND controller which uses ADM
2. BAM mode will be disabled after power on reset which needs to
be enabled before starting any BAM transfers.
Signed-off-by: Abhishek Sahu
---
drivers/mtd/nand/qcom_nandc.c | 17 ++---
1 file changed, 14 insertions
1. Add the function for command descriptor preparation which will
be used only by BAM DMA and it will form the DMA descriptors
containing command elements
2. DMA_PREP_CMD flag should be used for forming command DMA
descriptors
Signed-off-by: Abhishek Sahu
---
drivers/mtd/nand/qcom_nandc
Add the compatible string for IPQ4019 QPIC NAND controller
version 1.4.0 which uses BAM DMA.
Signed-off-by: Abhishek Sahu
---
drivers/mtd/nand/qcom_nandc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
index 16463ac.
Add the compatible string for IPQ8074 QPIC NAND controller
version 1.5.0 which uses BAM DMA and its FLASH_DEV_CMD registers
starting offset is 0x7000.
Signed-off-by: Abhishek Sahu
---
drivers/mtd/nand/qcom_nandc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/mtd/nand/q
1. Qualcom IPQ4019 SoC uses QPIC NAND controller version 1.4.0
which uses BAM DMA Engine while IPQ806x uses EBI2 NAND
which uses ADM DMA Engine.
2. QPIC NAND will 3 BAM channels: command, data tx and data rx
while EBI2 NAND uses only single ADM channel.
3. CRCI is only required for ADM DMA
Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0
which uses BAM DMA Engine.
Signed-off-by: Abhishek Sahu
---
Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
1. Correct the compatible string for IPQ806x
2. Change the NAND controller and NAND chip nodes name
for more clarity.
Signed-off-by: Abhishek Sahu
---
Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/d
The FLASH_DEV_CMD registers starting offset is not same in
different QPIC NAND controller versions. This patch adds
the starting offset in NAND controller properties and uses
the same for calculating the actual offset of these registers.
Signed-off-by: Abhishek Sahu
---
drivers/mtd/nand/qcom_nan
- The BAM transaction is the core data structure which will be used
for all the data transfers in QPIC NAND. Since the core framework
in nand_base.c is serializing all the NAND requests so allocating
BAM transaction before every transfer will be overhead. The memory
for it be allocated during probe
In EBI2, all codeword data will be read in FLASH_BUF_ACC buffer
and ADM will copy the data from source (FLASH_BUF_ACC) to
destination (memory for data read).
In QPIC, there is no FLASH_BUF_ACC and all the codeword data will
held in QPIC BAM FIFO buffers. It provides multiple READ_LOCATION
register
All the QPIC register read/write through BAM DMA requires
command descriptor which contains the array of command elements.
Signed-off-by: Abhishek Sahu
---
drivers/mtd/nand/qcom_nandc.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/qcom_
The BAM has multiple flags to control the transfer. This patch
adds flags parameter in register and data transfer functions and
modifies all these functions call with appropriate flags using
following rule
1. Read and write can’t go in single command descriptor so
separate SGL should be used.
2
1. prepare_bam_async_desc is the function which will call
all the DMA API’s. It will fetch the outstanding scatter gather
list for passed channel and will do the DMA descriptor formation.
The DMA flag is dependent upon the type of channel.
2. For ADM DMA, the descriptor is being formed fo
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