Pending cbs check in rcu_prepare_for_idle is inversed
in the sense that, it should accelerate if there are
pending cbs; but, the check does the opposite. So,
fix it.
Fixes: 15fecf89e46a ("srcu: Abstract multi-tail callback list handling")
Signed-off-by: Neeraj Upadhyay
Pending cbs check in rcu_prepare_for_idle is inversed
in the sense that, it should accelerate if there are
pending cbs; but, the check does the opposite. So,
fix it.
Fixes: 15fecf89e46a ("srcu: Abstract multi-tail callback list handling")
Signed-off-by: Neeraj Upadhyay
---
Hi Markus,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.13-rc4 next-20170804]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
Hi Markus,
[auto build test WARNING on linus/master]
[also build test WARNING on v4.13-rc4 next-20170804]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
From: "Gautham R. Shenoy"
The stop4 idle state on POWER9 is a deep idle state which loses
hypervisor resources, but whose latency is low enough that it can be
exposed via cpuidle.
Until now, the deep idle states which lose hypervisor resources (eg:
winkle) were only
From: "Gautham R. Shenoy"
The stop4 idle state on POWER9 is a deep idle state which loses
hypervisor resources, but whose latency is low enough that it can be
exposed via cpuidle.
Until now, the deep idle states which lose hypervisor resources (eg:
winkle) were only exposed via CPU-Hotplug.
From: "Gautham R. Shenoy"
Hi,
This is the fourth iteration of the patchset to enable exploitation of
stop4 idle state on POWER9 via cpuidle.
The earlier version can be found here :
[v3]: https://lkml.org/lkml/2017/7/21/209
[v2]: https://lkml.org/lkml/2017/7/19/152
From: "Gautham R. Shenoy"
Currently we use the stop-api provided by the firmware to program the
SLW engine to restore the values of hypervisor resources that get lost
on deeper idle states (such as winkle). Since the deep states were
only used for CPU-Hotplug on POWER8
From: "Gautham R. Shenoy"
Hi,
This is the fourth iteration of the patchset to enable exploitation of
stop4 idle state on POWER9 via cpuidle.
The earlier version can be found here :
[v3]: https://lkml.org/lkml/2017/7/21/209
[v2]: https://lkml.org/lkml/2017/7/19/152
[v1]:
From: "Gautham R. Shenoy"
Currently we use the stop-api provided by the firmware to program the
SLW engine to restore the values of hypervisor resources that get lost
on deeper idle states (such as winkle). Since the deep states were
only used for CPU-Hotplug on POWER8 systems, we would program
From: Huang Ying
VMA based swap readahead will readahead the virtual pages that is
continuous in the virtual address space. While the original swap
readahead will readahead the swap slots that is continuous in the swap
device. Although VMA based swap readahead is more
From: Huang Ying
VMA based swap readahead will readahead the virtual pages that is
continuous in the virtual address space. While the original swap
readahead will readahead the swap slots that is continuous in the swap
device. Although VMA based swap readahead is more correct for the
swap
From: Huang Ying
The sysfs interface to control the VMA based swap readahead is added
as follow,
/sys/kernel/mm/swap/vma_ra_enabled
Enable the VMA based swap readahead algorithm, or use the original
global swap readahead algorithm.
/sys/kernel/mm/swap/vma_ra_max_order
From: Huang Ying
The statistics for total readahead pages and total readahead hits are
recorded and exported via the following sysfs interface.
/sys/kernel/mm/swap/ra_hits
/sys/kernel/mm/swap/ra_total
With them, the efficiency of the swap readahead could be measured, so
From: Huang Ying
The swap readahead is an important mechanism to reduce the swap in
latency. Although pure sequential memory access pattern isn't very
popular for anonymous memory, the space locality is still considered
valid.
In the original swap readahead
From: Huang Ying
The sysfs interface to control the VMA based swap readahead is added
as follow,
/sys/kernel/mm/swap/vma_ra_enabled
Enable the VMA based swap readahead algorithm, or use the original
global swap readahead algorithm.
/sys/kernel/mm/swap/vma_ra_max_order
Set the max order of
From: Huang Ying
The statistics for total readahead pages and total readahead hits are
recorded and exported via the following sysfs interface.
/sys/kernel/mm/swap/ra_hits
/sys/kernel/mm/swap/ra_total
With them, the efficiency of the swap readahead could be measured, so
that the swap readahead
From: Huang Ying
The swap readahead is an important mechanism to reduce the swap in
latency. Although pure sequential memory access pattern isn't very
popular for anonymous memory, the space locality is still considered
valid.
In the original swap readahead implementation, the consecutive
From: Huang Ying
In the original implementation, it is possible that the existing pages
in the swap cache (not newly readahead) could be marked as the
readahead pages. This will cause the statistics of swap readahead be
wrong and influence the swap readahead algorithm too.
From: Huang Ying
In the original implementation, it is possible that the existing pages
in the swap cache (not newly readahead) could be marked as the
readahead pages. This will cause the statistics of swap readahead be
wrong and influence the swap readahead algorithm too.
This is fixed via
The swap readahead is an important mechanism to reduce the swap in
latency. Although pure sequential memory access pattern isn't very
popular for anonymous memory, the space locality is still considered
valid.
In the original swap readahead implementation, the consecutive blocks
in swap device
The swap readahead is an important mechanism to reduce the swap in
latency. Although pure sequential memory access pattern isn't very
popular for anonymous memory, the space locality is still considered
valid.
In the original swap readahead implementation, the consecutive blocks
in swap device
Check the value returned by 'devm_clk_get()' instead of the clock
identifier which can never be an ERR code.
Fixes: d6f3710a56e1 ("ASoC: mediatek: add structure define and clock control
for 2701")
Signed-off-by: Christophe JAILLET
---
Check the value returned by 'devm_clk_get()' instead of the clock
identifier which can never be an ERR code.
Fixes: d6f3710a56e1 ("ASoC: mediatek: add structure define and clock control
for 2701")
Signed-off-by: Christophe JAILLET
---
sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c | 2 +-
1
On Sun, Aug 6, 2017 at 9:47 PM, Rusty Russell wrote:
> Matthew Garrett writes:
>> And then you need an entire trusted userland, at which point you can
>> assert that the modules are trustworthy without having to validate
>> them so you don't need
On Sun, Aug 6, 2017 at 9:47 PM, Rusty Russell wrote:
> Matthew Garrett writes:
>> And then you need an entire trusted userland, at which point you can
>> assert that the modules are trustworthy without having to validate
>> them so you don't need CONFIG_MODULE_SIG anyway.
>
> Yep. But your
Hi,
On 2017년 08월 07일 13:47, gsant...@codeaurora.org wrote:
> On 2017-08-04 20:42, Chanwoo Choi wrote:
>> Hi,
>>
>> On Fri, Aug 4, 2017 at 12:57 PM, wrote:
>>> Hi,
>>>
>>> Adding error checks to devfreq userspace governor, the current
>>> implementation results in
Hi,
On 2017년 08월 07일 13:47, gsant...@codeaurora.org wrote:
> On 2017-08-04 20:42, Chanwoo Choi wrote:
>> Hi,
>>
>> On Fri, Aug 4, 2017 at 12:57 PM, wrote:
>>> Hi,
>>>
>>> Adding error checks to devfreq userspace governor, the current
>>> implementation results in setting wrong
>>> frequency
Hi Michael,
On Tue, Aug 01, 2017 at 08:56:18PM +1000, Michael Ellerman wrote:
> "Gautham R. Shenoy" writes:
> >
> > Subject: [v3 PATCH 1/2] powernv/powerpc:Save/Restore additional SPRs for
> > stop4 cpuidle
>
> I know it's not a big deal, but can we agree on the
Hi Michael,
On Tue, Aug 01, 2017 at 08:56:18PM +1000, Michael Ellerman wrote:
> "Gautham R. Shenoy" writes:
> >
> > Subject: [v3 PATCH 1/2] powernv/powerpc:Save/Restore additional SPRs for
> > stop4 cpuidle
>
> I know it's not a big deal, but can we agree on the subject format?
>
>
Hi Kees,
On Tuesday 23 May 2017 02:19 PM, Ankit Kumar wrote:
Hi Kees,
On Tuesday 23 May 2017 05:21 AM, Kees Cook wrote:
On Mon, May 22, 2017 at 3:20 AM, Ankit Kumar
wrote:
Currently on panic or Oops, kernel saves the last few bytes from dmesg
buffer to nvram.
Hi Kees,
On Tuesday 23 May 2017 02:19 PM, Ankit Kumar wrote:
Hi Kees,
On Tuesday 23 May 2017 05:21 AM, Kees Cook wrote:
On Mon, May 22, 2017 at 3:20 AM, Ankit Kumar
wrote:
Currently on panic or Oops, kernel saves the last few bytes from dmesg
buffer to nvram. Usually kdump does capture
Commit 0ee5941 : (x86/panic: replace smp_send_stop() with kdump friendly
version in panic path) introduced crash_smp_send_stop() which is a weak
function and can be overriden by architecture codes to fix the side effect
caused by commit f06e515 : (kernel/panic.c: add "crash_kexec_post_
notifiers"
Commit 0ee5941 : (x86/panic: replace smp_send_stop() with kdump friendly
version in panic path) introduced crash_smp_send_stop() which is a weak
function and can be overriden by architecture codes to fix the side effect
caused by commit f06e515 : (kernel/panic.c: add "crash_kexec_post_
notifiers"
The branch history code has a loop detection function. With
this, we can get the number of iterations by calculating the
removed loops.
While it would be nice for knowing the average cycles of
iterations. This patch adds up the cycles in branch entries
of removed loops and save the result to the
The branch history code has a loop detection function. With
this, we can get the number of iterations by calculating the
removed loops.
While it would be nice for knowing the average cycles of
iterations. This patch adds up the cycles in branch entries
of removed loops and save the result to the
On 07/31/2017 10:54 PM, Prateek Sood wrote:
> Fix ordering of link creation between node->prev and prev->next in
> osq_lock(). A case in which the status of optimistic spin queue is
> CPU6->CPU2 in which CPU6 has acquired the lock.
>
> tail
> v
> ,-. <- ,-.
> |6||2|
>
On 07/31/2017 10:54 PM, Prateek Sood wrote:
> Fix ordering of link creation between node->prev and prev->next in
> osq_lock(). A case in which the status of optimistic spin queue is
> CPU6->CPU2 in which CPU6 has acquired the lock.
>
> tail
> v
> ,-. <- ,-.
> |6||2|
>
'devm_pinctrl_get()' never returns NULL, so this test can be simplified.
Signed-off-by: Christophe JAILLET
---
drivers/i2c/busses/i2c-imx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-imx.c
'devm_pinctrl_get()' never returns NULL, so this test can be simplified.
Signed-off-by: Christophe JAILLET
---
drivers/i2c/busses/i2c-imx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index
rate_control_ops structure is only passed as an argument to the
function ieee80211_rate_control_{register/unregister}. This argument
is of type const, so declare the structure as const.
Signed-off-by: Bhumika Goyal
---
Changes in v2:
* Change subject line.
rate_control_ops structure is only passed as an argument to the
function ieee80211_rate_control_{register/unregister}. This argument
is of type const, so declare the structure as const.
Signed-off-by: Bhumika Goyal
---
Changes in v2:
* Change subject line.
Hi Neal,
On Sun, 6 Aug 2017 22:21:43 -0400 Neal Cardwell wrote:
>
> > I fixed it up (see below) and can carry the fix as necessary. This
> > is now fixed as far as linux-next is concerned, but any non trivial
> > conflicts should be mentioned to your upstream maintainer
Hi Neal,
On Sun, 6 Aug 2017 22:21:43 -0400 Neal Cardwell wrote:
>
> > I fixed it up (see below) and can carry the fix as necessary. This
> > is now fixed as far as linux-next is concerned, but any non trivial
> > conflicts should be mentioned to your upstream maintainer when your tree
> > is
On 2017-08-04 20:42, Chanwoo Choi wrote:
Hi,
On Fri, Aug 4, 2017 at 12:57 PM, wrote:
Hi,
Adding error checks to devfreq userspace governor, the current
implementation results in setting wrong
frequency when sscanf returns error.
From
On 2017-08-04 20:42, Chanwoo Choi wrote:
Hi,
On Fri, Aug 4, 2017 at 12:57 PM, wrote:
Hi,
Adding error checks to devfreq userspace governor, the current
implementation results in setting wrong
frequency when sscanf returns error.
From 12e0a347addd70529b2c378299b27b65f0766f99 Mon Sep 17
Matthew Garrett writes:
> On Sun, Aug 6, 2017 at 7:49 PM, Rusty Russell wrote:
>> Matthew Garrett writes:
>>> Binary modules will still be tainted by the license checker. The issue
>>> is that if you want to enforce module signatures
Matthew Garrett writes:
> On Sun, Aug 6, 2017 at 7:49 PM, Rusty Russell wrote:
>> Matthew Garrett writes:
>>> Binary modules will still be tainted by the license checker. The issue
>>> is that if you want to enforce module signatures under *some*
>>> circumstances, you need to build with
Hi Marc,
2017-08-03 22:30 GMT+09:00 Marc Zyngier :
> On 03/08/17 13:52, Masahiro Yamada wrote:
>> Hi Marc,
>>
>> 2017-08-03 17:41 GMT+09:00 Marc Zyngier :
>>> Hi Masahiro,
>>>
>>> On 03/08/17 08:32, Masahiro Yamada wrote:
Hi.
2017-08-01
Hi Marc,
2017-08-03 22:30 GMT+09:00 Marc Zyngier :
> On 03/08/17 13:52, Masahiro Yamada wrote:
>> Hi Marc,
>>
>> 2017-08-03 17:41 GMT+09:00 Marc Zyngier :
>>> Hi Masahiro,
>>>
>>> On 03/08/17 08:32, Masahiro Yamada wrote:
Hi.
2017-08-01 0:55 GMT+09:00 Thomas Gleixner :
> On
From: Florian Fainelli
Date: Thu, 3 Aug 2017 21:33:27 -0700
> During testing with a background iperf pushing 1Gbit/sec worth of
> traffic and having both ifconfig and ethtool collect statistics, we
> could see quite frequent deadlocks. Convert the often accessed DSA slave
From: Florian Fainelli
Date: Thu, 3 Aug 2017 21:33:27 -0700
> During testing with a background iperf pushing 1Gbit/sec worth of
> traffic and having both ifconfig and ethtool collect statistics, we
> could see quite frequent deadlocks. Convert the often accessed DSA slave
> network devices
On 2017/8/7 11:47, David Miller wrote:
> From: Ding Tianhong
> Date: Sat, 5 Aug 2017 15:15:09 +0800
>
>> Some devices have problems with Transaction Layer Packets with the Relaxed
>> Ordering Attribute set. This patch set adds a new PCIe Device Flag,
>>
On 2017/8/7 11:47, David Miller wrote:
> From: Ding Tianhong
> Date: Sat, 5 Aug 2017 15:15:09 +0800
>
>> Some devices have problems with Transaction Layer Packets with the Relaxed
>> Ordering Attribute set. This patch set adds a new PCIe Device Flag,
>> PCI_DEV_FLAGS_NO_RELAXED_ORDERING, a
On 08/07/2017 09:39 AM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This driver's Copyright is under Renesas Solutions Corp.
This patch updates the year, because this driver was moved
into synopsys folder in 2017.
Thanks. Queued to drm-misc-next.
On 08/07/2017 09:39 AM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This driver's Copyright is under Renesas Solutions Corp.
This patch updates the year, because this driver was moved
into synopsys folder in 2017.
Thanks. Queued to drm-misc-next.
Archit
Signed-off-by: Kuninori
From: Kuninori Morimoto
This driver's Copyright is under Renesas Solutions Corp.
This patch updates the year, because this driver was moved
into synopsys folder in 2017.
Signed-off-by: Kuninori Morimoto
---
v1 -> v2
-
From: Kuninori Morimoto
This driver's Copyright is under Renesas Solutions Corp.
This patch updates the year, because this driver was moved
into synopsys folder in 2017.
Signed-off-by: Kuninori Morimoto
---
v1 -> v2
- update year 2016 -> 2017
Hi Archit
> >> On 08/07/2017 07:41 AM, Kuninori Morimoto wrote:
> >>>
> >>> From: Kuninori Morimoto
> >>>
> >>> This driver's Copyright is under Renesas Solutions Corp
> >>
> >> Can we update the year to 2017 while we're at it?
> >
> > The original patch was
On Fri, Aug 04, 2017 at 02:00:24PM +0200, Michal Simek wrote:
> From: Naga Sureshkumar Relli
>
> This patch adds EDAC ECC support for ZynqMP DDRC IP
>
> Signed-off-by: Naga Sureshkumar Relli
> Signed-off-by: Michal Simek
Hi Archit
> >> On 08/07/2017 07:41 AM, Kuninori Morimoto wrote:
> >>>
> >>> From: Kuninori Morimoto
> >>>
> >>> This driver's Copyright is under Renesas Solutions Corp
> >>
> >> Can we update the year to 2017 while we're at it?
> >
> > The original patch was created and applied on 2016
> >
> >
On Fri, Aug 04, 2017 at 02:00:24PM +0200, Michal Simek wrote:
> From: Naga Sureshkumar Relli
>
> This patch adds EDAC ECC support for ZynqMP DDRC IP
>
> Signed-off-by: Naga Sureshkumar Relli
> Signed-off-by: Michal Simek
> ---
>
> drivers/edac/Kconfig | 2 +-
>
From: Edward Cree
Date: Thu, 3 Aug 2017 17:11:34 +0100
> Signed-off-by: Edward Cree
Sorry, this doesn't work.
The entire source tree must compile properly after each patch in the
patch series.
So if you change a datastructure, you have to update
From: Edward Cree
Date: Thu, 3 Aug 2017 17:11:34 +0100
> Signed-off-by: Edward Cree
Sorry, this doesn't work.
The entire source tree must compile properly after each patch in the
patch series.
So if you change a datastructure, you have to update all of the users
in that patch to keep
Hi,
I saw the log at the bottom and bisect the issue to the commits of
065ea0a7afd64d6c ("tty: improve tty_insert_flip_char() slow path")
979990c628481461 ("tty: improve tty_insert_flip_char() fast path")
I nearly could 100% reproduce this. Any thought?
[ 154.823106] Unable to handle
Hi,
I saw the log at the bottom and bisect the issue to the commits of
065ea0a7afd64d6c ("tty: improve tty_insert_flip_char() slow path")
979990c628481461 ("tty: improve tty_insert_flip_char() fast path")
I nearly could 100% reproduce this. Any thought?
[ 154.823106] Unable to handle
On 08/07/2017 09:25 AM, Kuninori Morimoto wrote:
Hi Archit
Thank you for your feedback
On 08/07/2017 07:41 AM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This driver's Copyright is under Renesas Solutions Corp
Can we update the year to 2017
On 08/07/2017 09:25 AM, Kuninori Morimoto wrote:
Hi Archit
Thank you for your feedback
On 08/07/2017 07:41 AM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This driver's Copyright is under Renesas Solutions Corp
Can we update the year to 2017 while we're at it?
The original
Hi Archit
Thank you for your feedback
> On 08/07/2017 07:41 AM, Kuninori Morimoto wrote:
> >
> > From: Kuninori Morimoto
> >
> > This driver's Copyright is under Renesas Solutions Corp
>
> Can we update the year to 2017 while we're at it?
The original patch
Hi Archit
Thank you for your feedback
> On 08/07/2017 07:41 AM, Kuninori Morimoto wrote:
> >
> > From: Kuninori Morimoto
> >
> > This driver's Copyright is under Renesas Solutions Corp
>
> Can we update the year to 2017 while we're at it?
The original patch was created and applied on 2016
On Mon, Aug 07, 2017 at 08:59:30AM +0800, AceLan Kao wrote:
> Looks like I'm one hour late to ack the patch.
> Thanks any way for the quick response.
Thanks for chiming in all the same - and normally I'd have provided for
more time. In this case, I will be away for a few days, and it was
On Mon, Aug 07, 2017 at 08:59:30AM +0800, AceLan Kao wrote:
> Looks like I'm one hour late to ack the patch.
> Thanks any way for the quick response.
Thanks for chiming in all the same - and normally I'd have provided for
more time. In this case, I will be away for a few days, and it was
When cpudl_find() returns any among free_cpus, the cpu might not be
closer than others, considering sched domain. For example:
this_cpu: 15
free_cpus: 0, 1,..., 14 (== later_mask)
best_cpu: 0
topology:
0 --+
+--+
1 --+ |
+-- ... --+
2 --+ | |
When cpudl_find() returns any among free_cpus, the cpu might not be
closer than others, considering sched domain. For example:
this_cpu: 15
free_cpus: 0, 1,..., 14 (== later_mask)
best_cpu: 0
topology:
0 --+
+--+
1 --+ |
+-- ... --+
2 --+ | |
It would be better to avoid pushing tasks to other cpu within
a SD_PREFER_SIBLING domain, instead, get more chances to check other
siblings.
Signed-off-by: Byungchul Park
---
kernel/sched/rt.c | 47 ---
1 file changed, 44
It would be better to avoid pushing tasks to other cpu within
a SD_PREFER_SIBLING domain, instead, get more chances to check other
siblings.
Signed-off-by: Byungchul Park
---
kernel/sched/deadline.c | 46 +++---
1 file changed, 43
It would be better to avoid pushing tasks to other cpu within
a SD_PREFER_SIBLING domain, instead, get more chances to check other
siblings.
Signed-off-by: Byungchul Park
---
kernel/sched/deadline.c | 46 +++---
1 file changed, 43 insertions(+), 3
It would be better to avoid pushing tasks to other cpu within
a SD_PREFER_SIBLING domain, instead, get more chances to check other
siblings.
Signed-off-by: Byungchul Park
---
kernel/sched/rt.c | 47 ---
1 file changed, 44 insertions(+), 3 deletions(-)
On Mon, Jul 24, 2017 at 02:07:52PM -0500, Brijesh Singh wrote:
> From: Tom Lendacky
>
> DMA access to memory mapped as encrypted while SEV is active can not be
> encrypted during device write or decrypted during device read.
Yeah, definitely rewrite that sentence.
> In
On Mon, Jul 24, 2017 at 02:07:52PM -0500, Brijesh Singh wrote:
> From: Tom Lendacky
>
> DMA access to memory mapped as encrypted while SEV is active can not be
> encrypted during device write or decrypted during device read.
Yeah, definitely rewrite that sentence.
> In order
> for DMA to
From: Ding Tianhong
Date: Sat, 5 Aug 2017 15:15:09 +0800
> Some devices have problems with Transaction Layer Packets with the Relaxed
> Ordering Attribute set. This patch set adds a new PCIe Device Flag,
> PCI_DEV_FLAGS_NO_RELAXED_ORDERING, a set of PCI Quirks to catch
From: Ding Tianhong
Date: Sat, 5 Aug 2017 15:15:09 +0800
> Some devices have problems with Transaction Layer Packets with the Relaxed
> Ordering Attribute set. This patch set adds a new PCIe Device Flag,
> PCI_DEV_FLAGS_NO_RELAXED_ORDERING, a set of PCI Quirks to catch some known
> devices with
On Sat, 2017-08-05 at 14:16 +0800, Ryder Lee wrote:
> On Sat, 2017-08-05 at 12:52 +0800, Ryder Lee wrote:
> > Hi Honghui, Bjorn,
> >
> > On Fri, 2017-08-04 at 08:18 -0500, Bjorn Helgaas wrote:
> > > On Fri, Aug 04, 2017 at 04:39:36PM +0800, Honghui Zhang wrote:
> > > > On Thu, 2017-08-03 at 17:42
On Sat, 2017-08-05 at 14:16 +0800, Ryder Lee wrote:
> On Sat, 2017-08-05 at 12:52 +0800, Ryder Lee wrote:
> > Hi Honghui, Bjorn,
> >
> > On Fri, 2017-08-04 at 08:18 -0500, Bjorn Helgaas wrote:
> > > On Fri, Aug 04, 2017 at 04:39:36PM +0800, Honghui Zhang wrote:
> > > > On Thu, 2017-08-03 at 17:42
On 08/07/2017 07:41 AM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This driver's Copyright is under Renesas Solutions Corp
Can we update the year to 2017 while we're at it?
Archit
Signed-off-by: Kuninori Morimoto
On 08/07/2017 07:41 AM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This driver's Copyright is under Renesas Solutions Corp
Can we update the year to 2017 while we're at it?
Archit
Signed-off-by: Kuninori Morimoto
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 3 ++-
On 04-08-17, 14:57, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> The if () in cpufreq_can_do_remote_dvfs() is superfluous, so drop
> it and simply return the value of the expression under it.
>
> Signed-off-by: Rafael J. Wysocki
On 04-08-17, 14:57, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> The if () in cpufreq_can_do_remote_dvfs() is superfluous, so drop
> it and simply return the value of the expression under it.
>
> Signed-off-by: Rafael J. Wysocki
> ---
>
> On top of the current linux-next.
>
> ---
>
On Sun, 2017-08-06 at 19:16 -0700, Frank Rowand wrote:
> On 08/04/17 21:45, Joe Perches wrote:
> > Allow for MAINTAINERS to become a directory and if it is,
> > read all the files in the directory for maintained sections.
> >
> > Optionally look for all files named MAINTAINERS in directories
> >
On Sun, 2017-08-06 at 19:16 -0700, Frank Rowand wrote:
> On 08/04/17 21:45, Joe Perches wrote:
> > Allow for MAINTAINERS to become a directory and if it is,
> > read all the files in the directory for maintained sections.
> >
> > Optionally look for all files named MAINTAINERS in directories
> >
The codes of qe_ic init from a variety of platforms are redundant,
merge them to a common function and put it to irqchip/irq-qeic.c
For non-p1021_mds mpc85xx_mds boards, use "qe_ic_init(np, 0,
qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);" instead of
"qe_ic_init(np, 0,
The codes of qe_ic init from a variety of platforms are redundant,
merge them to a common function and put it to irqchip/irq-qeic.c
For non-p1021_mds mpc85xx_mds boards, use "qe_ic_init(np, 0,
qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);" instead of
"qe_ic_init(np, 0,
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang
---
arch/powerpc/platforms/83xx/km83xx.c | 1 -
arch/powerpc/platforms/83xx/misc.c| 1 -
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
MAINTAINERS| 6 ++
drivers/irqchip/Makefile | 1 +
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang
---
arch/powerpc/platforms/83xx/km83xx.c | 1 -
arch/powerpc/platforms/83xx/misc.c| 1 -
arch/powerpc/platforms/83xx/mpc832x_mds.c
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
MAINTAINERS| 6 ++
drivers/irqchip/Makefile | 1 +
drivers/{soc/fsl/qe/qe_ic.c =>
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
drivers/irqchip/irq-qeic.c | 90
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
drivers/irqchip/irq-qeic.c | 90 --
QEIC is supported more than just powerpc boards, so remove PPCisms.
changelog:
Changes for v8:
- use IRQCHIP_DECLARE() instead of subsys_initcall in qeic driver
- remove include/soc/fsl/qe/qe_ic.h
Changes for v9:
- rebase
- fix the compile issue
QEIC is supported more than just powerpc boards, so remove PPCisms.
changelog:
Changes for v8:
- use IRQCHIP_DECLARE() instead of subsys_initcall in qeic driver
- remove include/soc/fsl/qe/qe_ic.h
Changes for v9:
- rebase
- fix the compile issue
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