From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
> RPS and probably other kernel features are currently broken on some if not
> all DSA devices. The root cause of this is that skb_hash will call the
> flow_dissector. At this point the skb still contains the magic switch
From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
> RPS and probably other kernel features are currently broken on some if not
> all DSA devices. The root cause of this is that skb_hash will call the
> flow_dissector. At this point the skb still contains the magic switch
> header and the
From: John Crispin
Date: Wed, 9 Aug 2017 12:09:30 +0200
> The MT7623 has several DMA rings. Inside the SW path, the core will use
> the PDMA when receiving traffic. While bringing up the HW path we noticed
> that the PPE requires the QDMA RX to also be brought up as it uses
From: John Crispin
Date: Wed, 9 Aug 2017 12:09:30 +0200
> The MT7623 has several DMA rings. Inside the SW path, the core will use
> the PDMA when receiving traffic. While bringing up the HW path we noticed
> that the PPE requires the QDMA RX to also be brought up as it uses this
> ring
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 15:02:08 +0530
> Make these const as they are only stored in the ops field of a atm_dev
> structure, which is const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Applied.
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 15:02:08 +0530
> Make these const as they are only stored in the ops field of a atm_dev
> structure, which is const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Applied.
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 14:49:15 +0530
> Make these structures const as they are either passed to the function
> atm_dev_register having the corresponding argument as const or stored in
> the ops field of a atm_dev structure, which is also const.
> Done
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 14:49:15 +0530
> Make these structures const as they are either passed to the function
> atm_dev_register having the corresponding argument as const or stored in
> the ops field of a atm_dev structure, which is also const.
> Done using Coccinelle.
>
>
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 10:34:15 +0530
> Make these structures const as they are only stored in the ops field of
> a dsa_switch structure, which is const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Applied, thank you.
From: Bhumika Goyal
Date: Wed, 9 Aug 2017 10:34:15 +0530
> Make these structures const as they are only stored in the ops field of
> a dsa_switch structure, which is const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Applied, thank you.
Hi John,
Is it possible to try the attached patch?
I am not sure if it actually fixes the issue. But I think it is worth a try.
Also, could you get me all the ipv6 routes when you plug in the usb
using "ip -6 route show"? (If you have multiple routing tables
configured, could you dump them all?)
Hi John,
Is it possible to try the attached patch?
I am not sure if it actually fixes the issue. But I think it is worth a try.
Also, could you get me all the ipv6 routes when you plug in the usb
using "ip -6 route show"? (If you have multiple routing tables
configured, could you dump them all?)
On Wednesday 09 August 2017 09:46 PM, Gustavo A. R. Silva wrote:
> platform_get_irq() returns an error code, but the pci-dra7xx driver
> ignores it and always returns -EINVAL. This is not correct and,
> prevents -EPROBE_DEFER from being propagated properly.
>
> Print and propagate the return
On Wednesday 09 August 2017 09:46 PM, Gustavo A. R. Silva wrote:
> platform_get_irq() returns an error code, but the pci-dra7xx driver
> ignores it and always returns -EINVAL. This is not correct and,
> prevents -EPROBE_DEFER from being propagated properly.
>
> Print and propagate the return
2017-08-10 1:07 GMT+08:00 Dmitry Vyukov :
> Hello,
>
> syzkaller fuzzer has hit the following WARNING in kvm_arch_vcpu_ioctl_run.
> This is easily reproducible and reproducer is attached at the bottom.
> The report is on upstream commit
>
2017-08-10 1:07 GMT+08:00 Dmitry Vyukov :
> Hello,
>
> syzkaller fuzzer has hit the following WARNING in kvm_arch_vcpu_ioctl_run.
> This is easily reproducible and reproducer is attached at the bottom.
> The report is on upstream commit
> 26c5cebfdb6ca799186f1e56be7d6f2480c5012c. This requires
Reported by syzkaller:
The kvm-intel.unrestricted_guest=0
WARNING: CPU: 5 PID: 1014 at /home/kernel/data/kvm/arch/x86/kvm//x86.c:7227
kvm_arch_vcpu_ioctl_run+0x38b/0x1be0 [kvm]
CPU: 5 PID: 1014 Comm: warn_test Tainted: GW OE 4.13.0-rc3+ #8
RIP:
Reported by syzkaller:
The kvm-intel.unrestricted_guest=0
WARNING: CPU: 5 PID: 1014 at /home/kernel/data/kvm/arch/x86/kvm//x86.c:7227
kvm_arch_vcpu_ioctl_run+0x38b/0x1be0 [kvm]
CPU: 5 PID: 1014 Comm: warn_test Tainted: GW OE 4.13.0-rc3+ #8
RIP:
On Wed, Aug 9, 2017 at 7:31 PM, Jeremy Kerr wrote:
> Hi Brendan,
>
>> The driver was handling interaction with userspace on its own. This
>> patch changes it to use the functionality of the ipmi_bmc framework
>> instead.
>>
>> Note that this removes the ability for the BMC to set
On Wed, Aug 9, 2017 at 7:31 PM, Jeremy Kerr wrote:
> Hi Brendan,
>
>> The driver was handling interaction with userspace on its own. This
>> patch changes it to use the functionality of the ipmi_bmc framework
>> instead.
>>
>> Note that this removes the ability for the BMC to set SMS_ATN by
On Thursday 10 August 2017 05:38 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:28AM +0530, Vignesh R wrote:
>> As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access
>> Controller programming sequence, a delay equal to couple QSPI master
>> clock(~5ns) is required after
On Thursday 10 August 2017 05:38 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:28AM +0530, Vignesh R wrote:
>> As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access
>> Controller programming sequence, a delay equal to couple QSPI master
>> clock(~5ns) is required after
On Wed, Aug 9, 2017 at 7:26 PM, Corey Minyard wrote:
> On 08/09/2017 08:04 PM, Brendan Higgins wrote:
>>>
>>> Perhaps that is some level of abuse, but it's pretty common. I'm not
>>> against it.
>>>
>>> There is standard IPMI firmware NetFN (though no commands defined) that
On Wed, Aug 9, 2017 at 7:26 PM, Corey Minyard wrote:
> On 08/09/2017 08:04 PM, Brendan Higgins wrote:
>>>
>>> Perhaps that is some level of abuse, but it's pretty common. I'm not
>>> against it.
>>>
>>> There is standard IPMI firmware NetFN (though no commands defined) that
>>> if
>>> you use
Please pull to get these sparc changes:
1) Recognize M8 cpus, just basic chip ID matching, from Allen Pais.
2) Prevent crashes when bringing up sunvdc virtual block devices in
some environments. From Jim Quigley.
Thanks!
The following changes since commit
Please pull to get these sparc changes:
1) Recognize M8 cpus, just basic chip ID matching, from Allen Pais.
2) Prevent crashes when bringing up sunvdc virtual block devices in
some environments. From Jim Quigley.
Thanks!
The following changes since commit
On Thursday 10 August 2017 05:40 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:29AM +0530, Vignesh R wrote:
>> Cadence QSPI IP has a adapted loopback circuit which can be enabled by
>> setting BYPASS field to 0 in READCAPTURE register. It enables use of
>> QSPI return clock to latch the
On Thursday 10 August 2017 05:40 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:29AM +0530, Vignesh R wrote:
>> Cadence QSPI IP has a adapted loopback circuit which can be enabled by
>> setting BYPASS field to 0 in READCAPTURE register. It enables use of
>> QSPI return clock to latch the
On Thursday 10 August 2017 05:35 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:28AM +0530, Vignesh R wrote:
>> As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access
>> Controller programming sequence, a delay equal to couple QSPI master
>> clock(~5ns) is required after
On Thursday 10 August 2017 05:35 AM, Rob Herring wrote:
> On Tue, Aug 01, 2017 at 10:24:28AM +0530, Vignesh R wrote:
>> As per 66AK2G02 TRM[1] SPRUHY8F section 11.15.5.3 Indirect Access
>> Controller programming sequence, a delay equal to couple QSPI master
>> clock(~5ns) is required after
clk_prepare_enable() can fail here and we must check its return value.
Signed-off-by: Arvind Yadav
---
changes in v2:
Rebase patch[1]https://lkml.org/lkml/2017/8/3/968
and apply this change. Otherwise will merge conflict.
clk_prepare_enable() can fail here and we must check its return value.
Signed-off-by: Arvind Yadav
---
changes in v2:
Rebase patch[1]https://lkml.org/lkml/2017/8/3/968
and apply this change. Otherwise will merge conflict.
drivers/memory/mtk-smi.c | 5 -
1 file
On Thu, Aug 10, 2017 at 12:34:23AM +0200, Rafael J. Wysocki wrote:
> --- linux-pm.orig/drivers/acpi/scan.c
> +++ linux-pm/drivers/acpi/scan.c
> @@ -2139,6 +2139,10 @@ int __init acpi_scan_init(void)
> acpi_get_spcr_uart_addr();
> }
>
> +
On Thu, Aug 10, 2017 at 12:34:23AM +0200, Rafael J. Wysocki wrote:
> --- linux-pm.orig/drivers/acpi/scan.c
> +++ linux-pm/drivers/acpi/scan.c
> @@ -2139,6 +2139,10 @@ int __init acpi_scan_init(void)
> acpi_get_spcr_uart_addr();
> }
>
> +
thanks, Doug!
Rafael,
Reviewed-by: Len Brown
On Tue, Aug 8, 2017 at 5:12 PM, Doug Smythies wrote:
> According to Intel 64 and IA-32 Architectures SDM, Volume 3,
> Chapter 14.2, "Software needs to exercise care to avoid delays
> between the two
thanks, Doug!
Rafael,
Reviewed-by: Len Brown
On Tue, Aug 8, 2017 at 5:12 PM, Doug Smythies wrote:
> According to Intel 64 and IA-32 Architectures SDM, Volume 3,
> Chapter 14.2, "Software needs to exercise care to avoid delays
> between the two RDMSRs (for example interrupts)".
>
> So,
Add a new rockchip,codec-names property, so that the driver can parse
the codecs by name.
Signed-off-by: Jeffy Chen
---
Changes in v2:
Let rockchip,codec-names be a required property.
Documentation/devicetree/bindings/sound/rockchip,rk3399-gru-sound.txt | 2 ++
1
Add a new rockchip,codec-names property, so that the driver can parse
the codecs by name.
Signed-off-by: Jeffy Chen
---
Changes in v2:
Let rockchip,codec-names be a required property.
Documentation/devicetree/bindings/sound/rockchip,rk3399-gru-sound.txt | 2 ++
1 file changed, 2 insertions(+)
Add rockchip,codec-names property for codecs.
Signed-off-by: Jeffy Chen
---
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
Add rockchip,codec-names property for codecs.
Signed-off-by: Jeffy Chen
---
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index
Currently we are using a fixed list of dai links in the driver.
This serial of patches would let the driver parse dai links from
dts, so that we can disable some of them for future boards in the
dts.
Tested on my chromebook bob(with cros 4.4 kernel), it still works
after disabled rt5514 codec in
Refactor rockchip_sound_probe, parse dai links from dts instead of
hard coding them.
Signed-off-by: Jeffy Chen
---
Changes in v2:
Let rockchip,codec-names be a required property, because we plan to
add more supported codecs to the fixed dai link list in the driver.
Currently we are using a fixed list of dai links in the driver.
This serial of patches would let the driver parse dai links from
dts, so that we can disable some of them for future boards in the
dts.
Tested on my chromebook bob(with cros 4.4 kernel), it still works
after disabled rt5514 codec in
Refactor rockchip_sound_probe, parse dai links from dts instead of
hard coding them.
Signed-off-by: Jeffy Chen
---
Changes in v2:
Let rockchip,codec-names be a required property, because we plan to
add more supported codecs to the fixed dai link list in the driver.
previously burst length (BURST_LENGTH) is always set to equal
to bits_per_word, causes a 10us gap between each word in
transfer, which significantly affects performance.
This patch uses 32 bits transfer to simulate lower bits transfer,
and adjusts burst length runtimely to use biggeest burst
previously burst length (BURST_LENGTH) is always set to equal
to bits_per_word, causes a 10us gap between each word in
transfer, which significantly affects performance.
This patch uses 32 bits transfer to simulate lower bits transfer,
and adjusts burst length runtimely to use biggeest burst
Hi Chao,
I've fixed the below in f2fs.git.
On 08/02, Chao Yu wrote:
> From: Chao Yu
>
> This patch enables inner app/fs io stats and introduces below virtual fs
> nodes for exposing stats info:
> /sys/fs/f2fs//iostat_enable
> /proc/fs/f2fs//iostat_info
>
> Signed-off-by:
Hi Chao,
I've fixed the below in f2fs.git.
On 08/02, Chao Yu wrote:
> From: Chao Yu
>
> This patch enables inner app/fs io stats and introduces below virtual fs
> nodes for exposing stats info:
> /sys/fs/f2fs//iostat_enable
> /proc/fs/f2fs//iostat_info
>
> Signed-off-by: Chao Yu
> ---
> v2:
From: Kuninori Morimoto
Now, we can use of_graph_get_remote_endpoint(). Let's use it.
Signed-off-by: Kuninori Morimoto
---
- not tested
drivers/of/property.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
From: Kuninori Morimoto
Now, we can use of_graph_get_remote_endpoint(). Let's use it.
Signed-off-by: Kuninori Morimoto
---
- not tested
drivers/of/property.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/of/property.c b/drivers/of/property.c
index
From: Kuninori Morimoto
Now, we can use of_graph_get_remote_endpoint(). Let's use it.
Signed-off-by: Kuninori Morimoto
---
- Not tested
drivers/gpu/drm/sun4i/sun4i_backend.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Kuninori Morimoto
Now, we can use of_graph_get_remote_endpoint(). Let's use it.
Signed-off-by: Kuninori Morimoto
---
- Not tested
drivers/gpu/drm/sun4i/sun4i_backend.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
于 2017年8月10日 GMT+08:00 上午11:56:02, Chen-Yu Tsai 写到:
>Hi,
>
>On Sat, Jul 22, 2017 at 10:28 AM, Icenowy Zheng
>wrote:
>> The Banana Pi M64 board uses the A64 chip's EMAC to provide Ethernet
>> link.
>>
>> Add the ethernet0 alias in the device tree, in order to let
于 2017年8月10日 GMT+08:00 上午11:56:02, Chen-Yu Tsai 写到:
>Hi,
>
>On Sat, Jul 22, 2017 at 10:28 AM, Icenowy Zheng
>wrote:
>> The Banana Pi M64 board uses the A64 chip's EMAC to provide Ethernet
>> link.
>>
>> Add the ethernet0 alias in the device tree, in order to let U-Boot
>> generate a MAC
On Mon, Jul 31, 2017 at 10:54:50PM +0530, Prateek Sood wrote:
> Fix ordering of link creation between node->prev and prev->next in
> osq_lock(). A case in which the status of optimistic spin queue is
> CPU6->CPU2 in which CPU6 has acquired the lock.
>
> tail
> v
> ,-. <- ,-.
>
On Mon, Jul 31, 2017 at 10:54:50PM +0530, Prateek Sood wrote:
> Fix ordering of link creation between node->prev and prev->next in
> osq_lock(). A case in which the status of optimistic spin queue is
> CPU6->CPU2 in which CPU6 has acquired the lock.
>
> tail
> v
> ,-. <- ,-.
>
On Wed, Aug 09, 2017 at 05:15:57PM -0700, Daniel Colascione wrote:
> /proc/pid/smaps_rollup is a new proc file that improves the
> performance of user programs that determine aggregate memory
> statistics (e.g., total PSS) of a process.
>
> Android regularly "samples" the memory usage of various
On Wed, Aug 09, 2017 at 05:15:57PM -0700, Daniel Colascione wrote:
> /proc/pid/smaps_rollup is a new proc file that improves the
> performance of user programs that determine aggregate memory
> statistics (e.g., total PSS) of a process.
>
> Android regularly "samples" the memory usage of various
The frequency update from the utilization update handlers can be divided
into two parts:
(A) Finding the next frequency
(B) Updating the frequency
While any CPU can do (A), (B) can be restricted to a group of CPUs only,
depending on the current platform.
For platforms where fast cpufreq
Utilization update callbacks are now processed remotely, even on the
CPUs that don't share cpufreq policy with the target CPU (if
dvfs_possible_from_any_cpu flag is set).
But in non-fast switch paths, the frequency is changed only from one of
policy->related_cpus. This happens because the kthread
The frequency update from the utilization update handlers can be divided
into two parts:
(A) Finding the next frequency
(B) Updating the frequency
While any CPU can do (A), (B) can be restricted to a group of CPUs only,
depending on the current platform.
For platforms where fast cpufreq
Utilization update callbacks are now processed remotely, even on the
CPUs that don't share cpufreq policy with the target CPU (if
dvfs_possible_from_any_cpu flag is set).
But in non-fast switch paths, the frequency is changed only from one of
policy->related_cpus. This happens because the kthread
On Wed, Aug 09, 2017 at 09:14:50PM -0700, Nadav Amit wrote:
Hi Nadav,
< snip >
> > According to the description it is "testcase:brk increase/decrease of
> > one
> > page”. According to the mode it spawns multiple processes, not threads.
> >
> > Since a single page is
On Wed, Aug 09, 2017 at 09:14:50PM -0700, Nadav Amit wrote:
Hi Nadav,
< snip >
> > According to the description it is "testcase:brk increase/decrease of
> > one
> > page”. According to the mode it spawns multiple processes, not threads.
> >
> > Since a single page is
Minchan Kim wrote:
> On Wed, Aug 09, 2017 at 10:59:02AM +0800, Ye Xiaolong wrote:
>> On 08/08, Minchan Kim wrote:
>>> On Mon, Aug 07, 2017 at 10:51:00PM -0700, Nadav Amit wrote:
Nadav Amit wrote:
> Minchan Kim wrote:
Minchan Kim wrote:
> On Wed, Aug 09, 2017 at 10:59:02AM +0800, Ye Xiaolong wrote:
>> On 08/08, Minchan Kim wrote:
>>> On Mon, Aug 07, 2017 at 10:51:00PM -0700, Nadav Amit wrote:
Nadav Amit wrote:
> Minchan Kim wrote:
>
>> Hi,
>>
>> On Tue, Aug 08, 2017 at
On Wed, Aug 09, 2017 at 10:59:02AM +0800, Ye Xiaolong wrote:
> On 08/08, Minchan Kim wrote:
> >On Mon, Aug 07, 2017 at 10:51:00PM -0700, Nadav Amit wrote:
> >> Nadav Amit wrote:
> >>
> >> > Minchan Kim wrote:
> >> >
> >> >> Hi,
> >> >>
> >> >> On Tue,
On Wed, Aug 09, 2017 at 10:59:02AM +0800, Ye Xiaolong wrote:
> On 08/08, Minchan Kim wrote:
> >On Mon, Aug 07, 2017 at 10:51:00PM -0700, Nadav Amit wrote:
> >> Nadav Amit wrote:
> >>
> >> > Minchan Kim wrote:
> >> >
> >> >> Hi,
> >> >>
> >> >> On Tue, Aug 08, 2017 at 09:19:23AM +0800, kernel
On Wed, Aug 09, 2017 at 08:04:33PM -0700, Matthew Wilcox wrote:
> On Wed, Aug 09, 2017 at 11:41:50AM +0900, Minchan Kim wrote:
> > On Tue, Aug 08, 2017 at 07:31:22PM -0700, Matthew Wilcox wrote:
> > > On Wed, Aug 09, 2017 at 10:51:13AM +0900, Minchan Kim wrote:
> > > > On Tue, Aug 08, 2017 at
On Wed, Aug 09, 2017 at 08:04:33PM -0700, Matthew Wilcox wrote:
> On Wed, Aug 09, 2017 at 11:41:50AM +0900, Minchan Kim wrote:
> > On Tue, Aug 08, 2017 at 07:31:22PM -0700, Matthew Wilcox wrote:
> > > On Wed, Aug 09, 2017 at 10:51:13AM +0900, Minchan Kim wrote:
> > > > On Tue, Aug 08, 2017 at
I think the aim of reserved_blocks function is to leave space for f2fs
and FTL, so I change it to a
soft version so that it can be used to fit to the data image which does
not satisfy the hard version,
especially for backward compatibility when updated kernel with new
default reserved_blocks
I think the aim of reserved_blocks function is to leave space for f2fs
and FTL, so I change it to a
soft version so that it can be used to fit to the data image which does
not satisfy the hard version,
especially for backward compatibility when updated kernel with new
default reserved_blocks
On Thu, Aug 10, 2017 at 8:20 AM, Andrew Lunn wrote:
> On Wed, Aug 09, 2017 at 03:47:34PM -0700, Florian Fainelli wrote:
>> On August 9, 2017 5:10:30 AM PDT, David Wu wrote:
>> >Add the documentation for internal phy. A boolean property
>> >indicates that
On Thu, Aug 10, 2017 at 8:20 AM, Andrew Lunn wrote:
> On Wed, Aug 09, 2017 at 03:47:34PM -0700, Florian Fainelli wrote:
>> On August 9, 2017 5:10:30 AM PDT, David Wu wrote:
>> >Add the documentation for internal phy. A boolean property
>> >indicates that a internal phy will be used.
>> >
>>
Hi,
On Sat, Jul 22, 2017 at 10:28 AM, Icenowy Zheng wrote:
> The Banana Pi M64 board uses the A64 chip's EMAC to provide Ethernet
> link.
>
> Add the ethernet0 alias in the device tree, in order to let U-Boot
> generate a MAC address from the chip's SID.
>
> Signed-off-by:
Hi,
On Sat, Jul 22, 2017 at 10:28 AM, Icenowy Zheng wrote:
> The Banana Pi M64 board uses the A64 chip's EMAC to provide Ethernet
> link.
>
> Add the ethernet0 alias in the device tree, in order to let U-Boot
> generate a MAC address from the chip's SID.
>
> Signed-off-by: Icenowy Zheng
As
My only suggestion for adding all these chips' orientation features, is
to start the discussion independently from this driver. Are there other
device series that provide such an orientation interrupt? Is it worth
finding a representation in iio?
Given the number of accelerometers these days have
My only suggestion for adding all these chips' orientation features, is
to start the discussion independently from this driver. Are there other
device series that provide such an orientation interrupt? Is it worth
finding a representation in iio?
Given the number of accelerometers these days have
On Thu, Aug 10, 2017 at 09:55:56AM +0900, Byungchul Park wrote:
> On Wed, Aug 09, 2017 at 05:50:59PM +0200, Peter Zijlstra wrote:
> >
> >
> > Heh, look what it does...
>
> It does not happen in my machine..
>
> I tihink it happens because of "Simplify xhlock ring buffer invalidation"
> patch
On Thu, Aug 10, 2017 at 09:55:56AM +0900, Byungchul Park wrote:
> On Wed, Aug 09, 2017 at 05:50:59PM +0200, Peter Zijlstra wrote:
> >
> >
> > Heh, look what it does...
>
> It does not happen in my machine..
>
> I tihink it happens because of "Simplify xhlock ring buffer invalidation"
> patch
add Danial and Thomas.
On 2017/8/10 10:52, Ding Tianhong wrote:
> On platforms with an arch timer erratum workaround, it's possible for
> arch_timer_reg_read_stable() to recurse into itself when certain
> tracing options are enabled, leading to stack overflows and related
> problems.
>
> For
add Danial and Thomas.
On 2017/8/10 10:52, Ding Tianhong wrote:
> On platforms with an arch timer erratum workaround, it's possible for
> arch_timer_reg_read_stable() to recurse into itself when certain
> tracing options are enabled, leading to stack overflows and related
> problems.
>
> For
On Mon, 31 Jul 2017 07:17:38 -0400
Harinath Nampally wrote:
This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453
and
fxls8471. Almost all these devices have more than one event. Current driver
design
hardcodes the event specific information, so
On Mon, 31 Jul 2017 07:17:38 -0400
Harinath Nampally wrote:
This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453
and
fxls8471. Almost all these devices have more than one event. Current driver
design
hardcodes the event specific information, so only one event can be
This patch adds support to set power-shifting-ratio which hints the
firmware how to distribute/throttle power between different entities
in a system (e.g CPU v/s GPU). This ratio is used by OCC for power
capping algorithm.
Signed-off-by: Shilpasri G Bhat
---
Adds a generic powercap framework to change the system powercap
inband through OPAL-OCC command/response interface.
Signed-off-by: Shilpasri G Bhat
---
.../ABI/testing/sysfs-firmware-opal-powercap | 31 +++
arch/powerpc/include/asm/opal-api.h
This patch adds support to set power-shifting-ratio which hints the
firmware how to distribute/throttle power between different entities
in a system (e.g CPU v/s GPU). This ratio is used by OCC for power
capping algorithm.
Signed-off-by: Shilpasri G Bhat
---
Adds a generic powercap framework to change the system powercap
inband through OPAL-OCC command/response interface.
Signed-off-by: Shilpasri G Bhat
---
.../ABI/testing/sysfs-firmware-opal-powercap | 31 +++
arch/powerpc/include/asm/opal-api.h| 3 +
In P9, OCC (On-Chip-Controller) supports shared memory based
commad-response interface. Within the shared memory there is an OPAL
command buffer and OCC response buffer that can be used to send
inband commands to OCC. The following commands are supported:
1) Set system powercap
2) Set CPU-GPU
Adds support for clearing different sensor groups. OCC inband sensor
groups like CSM, Profiler, Job Scheduler can be cleared using this
driver. The min/max of all sensors belonging to these sensor groups
will be cleared.
Signed-off-by: Shilpasri G Bhat
---
In P9, OCC (On-Chip-Controller) supports shared memory based
commad-response interface. Within the shared memory there is an OPAL
command buffer and OCC response buffer that can be used to send
inband commands to OCC. The following commands are supported:
1) Set system powercap
2) Set CPU-GPU
Adds support for clearing different sensor groups. OCC inband sensor
groups like CSM, Profiler, Job Scheduler can be cleared using this
driver. The min/max of all sensors belonging to these sensor groups
will be cleared.
Signed-off-by: Shilpasri G Bhat
---
On Mon, 31 Jul 2017 07:17:38 -0400
Harinath Nampally wrote:
This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453
and
fxls8471. Almost all these devices have more than one event. Current driver
design
hardcodes the event specific information, so
On Mon, 31 Jul 2017 07:17:38 -0400
Harinath Nampally wrote:
This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453
and
fxls8471. Almost all these devices have more than one event. Current driver
design
hardcodes the event specific information, so only one event can be
On 2017/8/8 21:43, Yunlong Song wrote:
> In this patch, we add a new sysfs interface, we can use it to gradually
> achieve
> the reserved_blocks finally, even when reserved_blocks is initially set over
> user_block_count - total_valid_block_count. This is very useful, especially
> when
> we
On 2017/8/8 21:43, Yunlong Song wrote:
> In this patch, we add a new sysfs interface, we can use it to gradually
> achieve
> the reserved_blocks finally, even when reserved_blocks is initially set over
> user_block_count - total_valid_block_count. This is very useful, especially
> when
> we
Hi,
On Aug 7 2017 21:22, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
This patch series adds support for Xen [1] para-virtualized
sound frontend driver. It implements the protocol from
include/xen/interface/io/sndif.h with the following
Hi,
On Aug 7 2017 21:22, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
This patch series adds support for Xen [1] para-virtualized
sound frontend driver. It implements the protocol from
include/xen/interface/io/sndif.h with the following limitations:
- mute/unmute is not
Hi Yoshihiro,
On 08/09/2017 06:44 AM, Yoshihiro Shimoda wrote:
Hi Gustavo,
Thank you for the patch!
I'm glad to help :)
-Original Message-
From: Gustavo A. R. Silva
Sent: Wednesday, August 9, 2017 7:35 AM
platform_get_irq() returns an error code, but the renesas_usb3 driver
Hi Yoshihiro,
On 08/09/2017 06:44 AM, Yoshihiro Shimoda wrote:
Hi Gustavo,
Thank you for the patch!
I'm glad to help :)
-Original Message-
From: Gustavo A. R. Silva
Sent: Wednesday, August 9, 2017 7:35 AM
platform_get_irq() returns an error code, but the renesas_usb3 driver
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