From: "leilei.lin"
This fix updating cgroup time when event is being scheduled in
by descendants
Signed-off-by: leilei.lin
Reviewed-and-tested-by: Jiri Olsa
---
kernel/events/core.c | 2 +-
1 file changed, 1
From: "leilei.lin"
This fix updating cgroup time when event is being scheduled in
by descendants
Signed-off-by: leilei.lin
Reviewed-and-tested-by: Jiri Olsa
---
kernel/events/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/events/core.c
On Wed, Sep 27, 2017 at 10:13:28AM -0500, Brijesh Singh wrote:
> When SEV is active, guest memory is encrypted with a guest-specific key, a
> guest memory region shared with the hypervisor must be mapped as decrypted
> before we can share it.
>
> Cc: Thomas Gleixner
> Cc:
On Wed, Sep 27, 2017 at 10:13:28AM -0500, Brijesh Singh wrote:
> When SEV is active, guest memory is encrypted with a guest-specific key, a
> guest memory region shared with the hypervisor must be mapped as decrypted
> before we can share it.
>
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: "H.
Hi all,
News: I will not be doing linux-next releases from Setp 30 to Oct 30
(inclusive).
Changes since 20170928:
The net-next tree gained a build failure, due to in interaction with the
net tree, for which I applied a merge fix patch.
The drm tree still had its build failure for which I
Hi all,
News: I will not be doing linux-next releases from Setp 30 to Oct 30
(inclusive).
Changes since 20170928:
The net-next tree gained a build failure, due to in interaction with the
net tree, for which I applied a merge fix patch.
The drm tree still had its build failure for which I
On 28-09-2017 18:35, Raj, Ashok wrote:
> Thanks for trying that Harsh.
>
> sp_off turns of super page support. Which this mode, do you still see offsets
> greater than 4k?
Yes, offset greater than 4k is still there. Refer below.
[56732.774872] offset 4110 len 76 dma addr 3a531200e dma len 76
On 28-09-2017 18:35, Raj, Ashok wrote:
> Thanks for trying that Harsh.
>
> sp_off turns of super page support. Which this mode, do you still see offsets
> greater than 4k?
Yes, offset greater than 4k is still there. Refer below.
[56732.774872] offset 4110 len 76 dma addr 3a531200e dma len 76
Currently, NVMe PCI host driver is programming CMB dma address as
I/O SQs addresses. This results in failures on systems where 1:1
outbound mapping is not used (example Broadcom iProc SOCs) because
CMB BAR will be progammed with PCI bus address but NVMe PCI EP will
try to access CMB using dma
Currently, NVMe PCI host driver is programming CMB dma address as
I/O SQs addresses. This results in failures on systems where 1:1
outbound mapping is not used (example Broadcom iProc SOCs) because
CMB BAR will be progammed with PCI bus address but NVMe PCI EP will
try to access CMB using dma
On Fri, Sep 29, 2017 at 3:17 AM, Jens Axboe wrote:
> On 09/28/2017 11:44 PM, Linus Torvalds wrote:
>> On Thu, Sep 28, 2017 at 2:41 PM, Andrew Morton
>> wrote:
>>>
>>> test_and_set_bit()?
>>
>> If there aren't any atomicity concerns (either because of
On Fri, Sep 29, 2017 at 3:17 AM, Jens Axboe wrote:
> On 09/28/2017 11:44 PM, Linus Torvalds wrote:
>> On Thu, Sep 28, 2017 at 2:41 PM, Andrew Morton
>> wrote:
>>>
>>> test_and_set_bit()?
>>
>> If there aren't any atomicity concerns (either because of higher-level
>> locking, or because racing
Issue: When the USB controller is configured as a USB device
mode, the device initiates low power when an ACK is pending for a
data packet (DP). When operating in SuperSpeed mode and when the
internal condition for low power (u1/u2) is satisfied, the device
initiates u1/u2 even though it has just
Issue: When the USB controller is configured as a USB device
mode, the device initiates low power when an ACK is pending for a
data packet (DP). When operating in SuperSpeed mode and when the
internal condition for low power (u1/u2) is satisfied, the device
initiates u1/u2 even though it has just
Hello,
(Cc-ing Andrew
lkml.kernel.org/r/20170928120405.18273-1-sergey.senozhat...@gmail.com )
On (09/28/17 21:13), Sergey Senozhatsky wrote:
> (Cc-ing Sasha)
>
> On (09/28/17 21:04), Sergey Senozhatsky wrote:
> [..]
> > : process 9121 (trinity-c78) no longer affine to cpu8
> > : smpboot:
Hi,
On 2017년 09월 29일 11:03, Yoshihiro Shimoda wrote:
> Hi,
>
>> From: Chanwoo Choi
>> Sent: Friday, September 29, 2017 9:02 AM
>>
> < snip >
>> drivers/phy/renesas/phy-rcar-gen3-usb2.c | 2 +-
> < snip >
>> drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
>
> These two drivers
Hello,
(Cc-ing Andrew
lkml.kernel.org/r/20170928120405.18273-1-sergey.senozhat...@gmail.com )
On (09/28/17 21:13), Sergey Senozhatsky wrote:
> (Cc-ing Sasha)
>
> On (09/28/17 21:04), Sergey Senozhatsky wrote:
> [..]
> > : process 9121 (trinity-c78) no longer affine to cpu8
> > : smpboot:
Hi,
On 2017년 09월 29일 11:03, Yoshihiro Shimoda wrote:
> Hi,
>
>> From: Chanwoo Choi
>> Sent: Friday, September 29, 2017 9:02 AM
>>
> < snip >
>> drivers/phy/renesas/phy-rcar-gen3-usb2.c | 2 +-
> < snip >
>> drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
>
> These two drivers
Use BUG_ON(in_interrupt()) in zs_map_object(). This is not a
new BUG_ON(), it's always been there, but was recently changed
to VM_BUG_ON(). There are several problems there. First, we use
use per-CPU mappings both in zsmalloc and in zram, and interrupt
may easily corrupt those buffers. Second, and
Use BUG_ON(in_interrupt()) in zs_map_object(). This is not a
new BUG_ON(), it's always been there, but was recently changed
to VM_BUG_ON(). There are several problems there. First, we use
use per-CPU mappings both in zsmalloc and in zram, and interrupt
may easily corrupt those buffers. Second, and
Dell Wireless 5819/5818 devices are re-branded Sierra Wireless MC74
series which will by default boot with vid 0x413c and pid's 0x81cf,
0x81d0, 0x81d1,0x81d2.
Signed-off-by: Shrirang Bagul
---
drivers/usb/serial/qcserial.c | 4
1 file changed, 4 insertions(+)
Dell Wireless 5819/5818 devices are re-branded Sierra Wireless MC74
series which will by default boot with vid 0x413c and pid's 0x81cf,
0x81d0, 0x81d1,0x81d2.
Signed-off-by: Shrirang Bagul
---
drivers/usb/serial/qcserial.c | 4
1 file changed, 4 insertions(+)
diff --git
Replace instances of drm_framebuffer_reference/unreference() with
*_get/put() suffixes and drm_dev_unref with *_put() suffix
because get/put is shorter and consistent with the
kernel use of *_get/put suffixes.
Done with following coccinelle semantic patch
@@
expression ex;
@@
(
Replace instances of drm_framebuffer_reference/unreference() with
*_get/put() suffixes and drm_dev_unref with *_put() suffix
because get/put is shorter and consistent with the
kernel use of *_get/put suffixes.
Done with following coccinelle semantic patch
@@
expression ex;
@@
(
On Fri, Sep 08, 2017 at 07:09:24PM +0800, Wei Wang wrote:
> On 09/08/2017 11:36 AM, Michael S. Tsirkin wrote:
> > On Tue, Aug 29, 2017 at 11:09:18AM +0800, Wei Wang wrote:
> > > On 08/29/2017 02:03 AM, Michael S. Tsirkin wrote:
> > > > On Mon, Aug 28, 2017 at 06:08:31PM +0800, Wei Wang wrote:
> >
On Fri, Sep 08, 2017 at 07:09:24PM +0800, Wei Wang wrote:
> On 09/08/2017 11:36 AM, Michael S. Tsirkin wrote:
> > On Tue, Aug 29, 2017 at 11:09:18AM +0800, Wei Wang wrote:
> > > On 08/29/2017 02:03 AM, Michael S. Tsirkin wrote:
> > > > On Mon, Aug 28, 2017 at 06:08:31PM +0800, Wei Wang wrote:
> >
On Thu, Sep 28, 2017 at 8:32 PM, Kyle Sanderson wrote:
> Not sure if the stack is crap or not, but this looks like an RCU crash?
>
> https://i.imgur.com/sBnNe1p.jpg
Hmm. Not the clearest picture, and the "Code:" line in particular is
missing the interesting part, but at a
On Thu, Sep 28, 2017 at 8:32 PM, Kyle Sanderson wrote:
> Not sure if the stack is crap or not, but this looks like an RCU crash?
>
> https://i.imgur.com/sBnNe1p.jpg
Hmm. Not the clearest picture, and the "Code:" line in particular is
missing the interesting part, but at a guess it's taking a
The allocation size of dapm routes is wrong, correct it.
Fixes: d9f9c167edae ("ASoC: rockchip: Init dapm routes dynamically")
Signed-off-by: Jeffy Chen
---
sound/soc/rockchip/rk3399_gru_sound.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
The allocation size of dapm routes is wrong, correct it.
Fixes: d9f9c167edae ("ASoC: rockchip: Init dapm routes dynamically")
Signed-off-by: Jeffy Chen
---
sound/soc/rockchip/rk3399_gru_sound.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
Not sure if the stack is crap or not, but this looks like an RCU crash?
https://i.imgur.com/sBnNe1p.jpg
Kyle.
FileServer ~ # uname -a
Linux FileServer.OpenWRT.local 4.12.5-gentoo #1 SMP PREEMPT Fri Aug 18
17:23:00 PDT 2017 x86_64 Intel(R) Atom(TM) CPU 330 @ 1.60GHz
GenuineIntel GNU/Linux
Not sure if the stack is crap or not, but this looks like an RCU crash?
https://i.imgur.com/sBnNe1p.jpg
Kyle.
FileServer ~ # uname -a
Linux FileServer.OpenWRT.local 4.12.5-gentoo #1 SMP PREEMPT Fri Aug 18
17:23:00 PDT 2017 x86_64 Intel(R) Atom(TM) CPU 330 @ 1.60GHz
GenuineIntel GNU/Linux
The bit offset used to check if DCDC5 and DCDC6 are tied together in
poly-phase output is wrong. It was checking against a reserved bit,
which is always false.
In reality, neither the reference design layout nor actually produced
boards tie these two buck regulators together. But we should still
The bit offset used to check if DCDC5 and DCDC6 are tied together in
poly-phase output is wrong. It was checking against a reserved bit,
which is always false.
In reality, neither the reference design layout nor actually produced
boards tie these two buck regulators together. But we should still
The AXP81x family of PMIC is used with the Allwinner A83T and H8 SoCs.
This includes the AXP813 and AXP818. There is no discernible difference
except the labeling. The AXP813 is paired with the A83T, while the
AXP818 is paired with the H8.
This patch adds a dtsi file for all the common bindings
The AXP81x family of PMIC is used with the Allwinner A83T and H8 SoCs.
This includes the AXP813 and AXP818. There is no discernible difference
except the labeling. The AXP813 is paired with the A83T, while the
AXP818 is paired with the H8.
This patch adds a dtsi file for all the common bindings
The AXP813 PMIC has 7 DC-DC buck regulators, 16 LDOs (including the
fixed RTC LDO and 2 GPIO LDOs), and 1 switchable. The drive-vbus
feature is also supported. All the hardware details are very similar
to the AXP803, with the following exceptions:
- Extra DCDC7 buck regulator, with the same
On Thu, Sep 28, 2017 at 6:53 PM, Mimi Zohar wrote:
>
> The locking issue isn't with validating the file hash, but with the
> setxattr, chmod, chown syscalls. Each of these syscalls takes the
> i_rwsem exclusively before IMA (or EVM) is called.
Read my email again.
>
The AXP813 PMIC has 7 DC-DC buck regulators, 16 LDOs (including the
fixed RTC LDO and 2 GPIO LDOs), and 1 switchable. The drive-vbus
feature is also supported. All the hardware details are very similar
to the AXP803, with the following exceptions:
- Extra DCDC7 buck regulator, with the same
On Thu, Sep 28, 2017 at 6:53 PM, Mimi Zohar wrote:
>
> The locking issue isn't with validating the file hash, but with the
> setxattr, chmod, chown syscalls. Each of these syscalls takes the
> i_rwsem exclusively before IMA (or EVM) is called.
Read my email again.
> In setxattr, chmod, chown
Now that axp20x-regulator supports AXP813, we can add a cell for it
to enable it.
Signed-off-by: Chen-Yu Tsai
Tested-by: Maxime Ripard
---
drivers/mfd/axp20x.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mfd/axp20x.c
Now that axp20x-regulator supports AXP813, we can add a cell for it
to enable it.
Signed-off-by: Chen-Yu Tsai
Tested-by: Maxime Ripard
---
drivers/mfd/axp20x.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 336de66ca408..2468b431bb22
Hi everyone,
This series adds support for the X-Powers AXP813/818 [1] PMICs'
regulators. The series is quite straightforward. There are no compile
time dependencies between the driver patches, so each can go through
their respective (mfd and regulator) trees.
Patch 1 fixes a wrong bit offset for
This patch adds device nodes for all the regulators of the AXP818 PMIC.
References to the 3V dummy regulator are replaced, and it is disabled.
The 3.3V and 5V are also disabled.
Signed-off-by: Chen-Yu Tsai
---
.../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 126
This patch adds device nodes for all the regulators of the AXP813 PMIC.
References to the 3.3V dummy regulator are replaced, and it is disabled.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 134 ++-
1 file changed, 132
This patch adds device nodes for all the regulators of the AXP818 PMIC.
References to the 3.3V dummy regulator are replaced, and it is disabled.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 150 ++-
1 file changed, 148
Hi everyone,
This series adds support for the X-Powers AXP813/818 [1] PMICs'
regulators. The series is quite straightforward. There are no compile
time dependencies between the driver patches, so each can go through
their respective (mfd and regulator) trees.
Patch 1 fixes a wrong bit offset for
This patch adds device nodes for all the regulators of the AXP818 PMIC.
References to the 3V dummy regulator are replaced, and it is disabled.
The 3.3V and 5V are also disabled.
Signed-off-by: Chen-Yu Tsai
---
.../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 126 -
1
This patch adds device nodes for all the regulators of the AXP813 PMIC.
References to the 3.3V dummy regulator are replaced, and it is disabled.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 134 ++-
1 file changed, 132 insertions(+), 2
This patch adds device nodes for all the regulators of the AXP818 PMIC.
References to the 3.3V dummy regulator are replaced, and it is disabled.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 150 ++-
1 file changed, 148 insertions(+), 2
If EC events occurred during BIOS S3-exit and early OS S3-exit steps can
be detected by OS earlier, then there can be less driver order issues
between acpi_ec_resume() and some other drivers' .resume() hook (e.x.
acpi_button_resume()).
However there are known facts that EC FW does drop EC events
This patch tries to detect EC events earlier after resume, so that if an
event occurred before invoking acpi_ec_unblock_transactions(), it could be
detected by acpi_ec_unblock_transactions() which is the earliest EC driver
call after resume.
However after the noirq stage, if an event ocurred
This patch adds a timer to poll EC events:
1. between acpi_ec_suspend() and acpi_ec_block_transactions(),
2. between acpi_ec_unblock_transactions() and acpi_ec_resume().
During these periods, if an EC event occurred, we have not mean to detect
it. Thus the events occurred in late S3-entry could be
This patch enables noirq stage event detection for the EC driver.
EC is a very special driver, required to detecting events throughout the
entire suspend/resume process. Thus this patch enables event detection for
EC during noirq stages to meet this requirement. This is done by making
sure that
If EC events occurred during BIOS S3-exit and early OS S3-exit steps can
be detected by OS earlier, then there can be less driver order issues
between acpi_ec_resume() and some other drivers' .resume() hook (e.x.
acpi_button_resume()).
However there are known facts that EC FW does drop EC events
This patch tries to detect EC events earlier after resume, so that if an
event occurred before invoking acpi_ec_unblock_transactions(), it could be
detected by acpi_ec_unblock_transactions() which is the earliest EC driver
call after resume.
However after the noirq stage, if an event ocurred
This patch adds a timer to poll EC events:
1. between acpi_ec_suspend() and acpi_ec_block_transactions(),
2. between acpi_ec_unblock_transactions() and acpi_ec_resume().
During these periods, if an EC event occurred, we have not mean to detect
it. Thus the events occurred in late S3-entry could be
This patch enables noirq stage event detection for the EC driver.
EC is a very special driver, required to detecting events throughout the
entire suspend/resume process. Thus this patch enables event detection for
EC during noirq stages to meet this requirement. This is done by making
sure that
CC LKML. Sorry it's a site level power down during the 10.1 holidays. :(
On Fri, Sep 29, 2017 at 10:12:20AM +0800, Philip Li wrote:
Hi all, this is Philip who maintains the 0-Day kernel test service. Thanks for
subscribing to 0-Day kernel testing. We will have lab power down from Oct 1
to Oct
CC LKML. Sorry it's a site level power down during the 10.1 holidays. :(
On Fri, Sep 29, 2017 at 10:12:20AM +0800, Philip Li wrote:
Hi all, this is Philip who maintains the 0-Day kernel test service. Thanks for
subscribing to 0-Day kernel testing. We will have lab power down from Oct 1
to Oct
Thanks, I will look into it.
Xiang Gao
2017-09-28 4:06 GMT-04:00 kernel test robot :
>
> FYI, we noticed the following commit:
>
> commit: 31e9170bdeb6ebe66426337b4e2b9924683a412b ("mac80211: aead api to
> reduce redundancy")
> url:
>
Thanks, I will look into it.
Xiang Gao
2017-09-28 4:06 GMT-04:00 kernel test robot :
>
> FYI, we noticed the following commit:
>
> commit: 31e9170bdeb6ebe66426337b4e2b9924683a412b ("mac80211: aead api to
> reduce redundancy")
> url:
>
Hi Steven, Peter,
I'm planning to make the following changes for the next rev, could you
let me know if you're Ok with it?
1. Drop the stop_critical_timings changes - previous patch was
generating the preempt_enable/disable events but they aren't "real"
events. Instead since we already have
Hi Steven, Peter,
I'm planning to make the following changes for the next rev, could you
let me know if you're Ok with it?
1. Drop the stop_critical_timings changes - previous patch was
generating the preempt_enable/disable events but they aren't "real"
events. Instead since we already have
Hi all, this is Philip who maintains the 0-Day kernel test service. Thanks for
subscribing to 0-Day kernel testing. We will have lab power down from Oct 1
to Oct 5, so that the service will be shut down from Asia Pacific Time Sep 30
3PM
and will recover from Oct 6 as soon as we can. Sorry for any
Hi all, this is Philip who maintains the 0-Day kernel test service. Thanks for
subscribing to 0-Day kernel testing. We will have lab power down from Oct 1
to Oct 5, so that the service will be shut down from Asia Pacific Time Sep 30
3PM
and will recover from Oct 6 as soon as we can. Sorry for any
Le 09/28/17 à 18:36, Stephen Rothwell a écrit :
> Hi all,
>
> After merging the net-next tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> net/dsa/slave.c: In function 'dsa_slave_create':
> net/dsa/slave.c:1191:18: error: 'struct dsa_slave_priv' has no member named
Le 09/28/17 à 18:36, Stephen Rothwell a écrit :
> Hi all,
>
> After merging the net-next tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> net/dsa/slave.c: In function 'dsa_slave_create':
> net/dsa/slave.c:1191:18: error: 'struct dsa_slave_priv' has no member named
On 2017/9/28 21:50, Leon Romanovsky wrote:
On Thu, Sep 28, 2017 at 12:57:27PM +0800, Wei Hu (Xavier) wrote:
From: Lijun Ou
It mainly places the lines for checking send doorbell status
into a special functions. As a result, we can directly call it in
On 2017/9/28 21:50, Leon Romanovsky wrote:
On Thu, Sep 28, 2017 at 12:57:27PM +0800, Wei Hu (Xavier) wrote:
From: Lijun Ou
It mainly places the lines for checking send doorbell status
into a special functions. As a result, we can directly call it in
check_qp_db_process_status function and
On Tue, Sep 12, 2017 at 06:48:20PM -0500, Derald D. Woods wrote:
> This patch set allows TMDSEVM3530(omap3-evm.dts) to boot using common
> processor module data that is shared with 'omap3-evm-37xx.dts'. A new
> common file for processor module data is introduced to help facilitate
> the updated
On Tue, Sep 12, 2017 at 06:48:20PM -0500, Derald D. Woods wrote:
> This patch set allows TMDSEVM3530(omap3-evm.dts) to boot using common
> processor module data that is shared with 'omap3-evm-37xx.dts'. A new
> common file for processor module data is introduced to help facilitate
> the updated
Hi,
> From: Chanwoo Choi
> Sent: Friday, September 29, 2017 9:02 AM
>
< snip >
> drivers/phy/renesas/phy-rcar-gen3-usb2.c | 2 +-
< snip >
> drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
These two drivers need the modification.
But...
< snip >
> diff --git
Hi,
> From: Chanwoo Choi
> Sent: Friday, September 29, 2017 9:02 AM
>
< snip >
> drivers/phy/renesas/phy-rcar-gen3-usb2.c | 2 +-
< snip >
> drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
These two drivers need the modification.
But...
< snip >
> diff --git
On Wed, 2017-09-27 at 09:18 +0800, Chaotian Jing wrote:
> On Wed, 2017-09-27 at 00:33 +0200, Ulf Hansson wrote:
> > On 14 September 2017 at 04:10, Chaotian Jing
> > wrote:
> > > On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:
> > >> On Tue, Sep 12, 2017 at
On Wed, 2017-09-27 at 09:18 +0800, Chaotian Jing wrote:
> On Wed, 2017-09-27 at 00:33 +0200, Ulf Hansson wrote:
> > On 14 September 2017 at 04:10, Chaotian Jing
> > wrote:
> > > On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:
> > >> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing
On Thu, 2017-09-28 at 17:33 -0700, Linus Torvalds wrote:
> On Thu, Sep 28, 2017 at 5:12 PM, Mimi Zohar wrote:
> >
> > Originally IMA did define it's own lock, prior to IMA-appraisal. IMA-
> > appraisal introduced writing the file hash as an xattr, which required
> >
On Thu, 2017-09-28 at 17:33 -0700, Linus Torvalds wrote:
> On Thu, Sep 28, 2017 at 5:12 PM, Mimi Zohar wrote:
> >
> > Originally IMA did define it's own lock, prior to IMA-appraisal. IMA-
> > appraisal introduced writing the file hash as an xattr, which required
> > taking the i_mutex.
On 2017年09月29日 05:29, Andrew Morton wrote:
> On Thu, 28 Sep 2017 14:11:41 +0800 Kemi Wang wrote:
>
>> This is the second step which introduces a tunable interface that allow
>> numa stats configurable for optimizing zone_statistics(), as suggested by
>> Dave Hansen and
On 2017年09月29日 05:29, Andrew Morton wrote:
> On Thu, 28 Sep 2017 14:11:41 +0800 Kemi Wang wrote:
>
>> This is the second step which introduces a tunable interface that allow
>> numa stats configurable for optimizing zone_statistics(), as suggested by
>> Dave Hansen and Ying Huang.
>
> Looks
On Thu, Sep 28, 2017 at 04:53:09PM -0700, Linus Torvalds wrote:
> On Thu, Sep 28, 2017 at 2:58 PM, Josh Poimboeuf wrote:
> >
> > Reported-by: kernel test robot
> > Fixes: f5caf621ee35 ("x86/asm: Fix inline asm call constraints for Clang")
> >
On Thu, Sep 28, 2017 at 04:53:09PM -0700, Linus Torvalds wrote:
> On Thu, Sep 28, 2017 at 2:58 PM, Josh Poimboeuf wrote:
> >
> > Reported-by: kernel test robot
> > Fixes: f5caf621ee35 ("x86/asm: Fix inline asm call constraints for Clang")
> > Signed-off-by: Josh Poimboeuf
>
> Side note: it's
Hi all,
After merging the net-next tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
net/dsa/slave.c: In function 'dsa_slave_create':
net/dsa/slave.c:1191:18: error: 'struct dsa_slave_priv' has no member named
'phy'
phy_disconnect(p->phy);
^
Caused
Hi all,
After merging the net-next tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
net/dsa/slave.c: In function 'dsa_slave_create':
net/dsa/slave.c:1191:18: error: 'struct dsa_slave_priv' has no member named
'phy'
phy_disconnect(p->phy);
^
Caused
From: Wanpeng Li
[ cut here ]
WARNING: CPU: 4 PID: 5280 at /home/kernel/linux/arch/x86/kvm//vmx.c:11394
nested_vmx_vmexit+0xc2b/0xd70 [kvm_intel]
CPU: 4 PID: 5280 Comm: qemu-system-x86 Tainted: GW OE 4.13.0+ #17
RIP:
From: Wanpeng Li
[ cut here ]
WARNING: CPU: 4 PID: 5280 at /home/kernel/linux/arch/x86/kvm//vmx.c:11394
nested_vmx_vmexit+0xc2b/0xd70 [kvm_intel]
CPU: 4 PID: 5280 Comm: qemu-system-x86 Tainted: GW OE 4.13.0+ #17
RIP: 0010:nested_vmx_vmexit+0xc2b/0xd70
On Thu, Sep 28, 2017 at 06:03:57PM +0200, Sebastian Andrzej Siewior wrote:
> On 2017-09-22 11:46:10 [-0700], Paul E. McKenney wrote:
> > On Fri, Sep 22, 2017 at 05:28:05PM +0200, Sebastian Andrzej Siewior wrote:
> > > On RT we can't invoke queue_delayed_work() within an atomic section
> > > (which
On Thu, Sep 28, 2017 at 06:03:57PM +0200, Sebastian Andrzej Siewior wrote:
> On 2017-09-22 11:46:10 [-0700], Paul E. McKenney wrote:
> > On Fri, Sep 22, 2017 at 05:28:05PM +0200, Sebastian Andrzej Siewior wrote:
> > > On RT we can't invoke queue_delayed_work() within an atomic section
> > > (which
On Thu, Sep 28, 2017 at 06:02:08PM +0200, Sebastian Andrzej Siewior wrote:
> On 2017-09-22 11:43:14 [-0700], Paul E. McKenney wrote:
> > On Fri, Sep 22, 2017 at 05:28:04PM +0200, Sebastian Andrzej Siewior wrote:
> > > The current check via srcu_online is slightly racy because after looking
> > >
On Thu, Sep 28, 2017 at 06:02:08PM +0200, Sebastian Andrzej Siewior wrote:
> On 2017-09-22 11:43:14 [-0700], Paul E. McKenney wrote:
> > On Fri, Sep 22, 2017 at 05:28:04PM +0200, Sebastian Andrzej Siewior wrote:
> > > The current check via srcu_online is slightly racy because after looking
> > >
From: Wanpeng Li
PLE_Window: Software can configure this field as an upper bound on the amount
of time
a guest is allowed to execute in a PAUSE LOOP.
KVM doesn't expose the PLE capability to the L1 hypervisor, however, ple_window
still
shows the default value on L1
From: Wanpeng Li
PLE_Window: Software can configure this field as an upper bound on the amount
of time
a guest is allowed to execute in a PAUSE LOOP.
KVM doesn't expose the PLE capability to the L1 hypervisor, however, ple_window
still
shows the default value on L1 hypervisor. This patch
From: Wanpeng Li
If we take TSC-deadline mode timer out of the picture, the Intel SDM
does not say that the timer is disable when the timer mode is change,
either from one-shot to periodic or vice versa.
After this patch, the timer is no longer disarmed on change of
From: Wanpeng Li
If we take TSC-deadline mode timer out of the picture, the Intel SDM
does not say that the timer is disable when the timer mode is change,
either from one-shot to periodic or vice versa.
After this patch, the timer is no longer disarmed on change of mode, so
the counter (TMCCT)
From: Wanpeng Li
Vectors 0-15 are reserved, and a physical LAPIC - upon sending or
receiving one - would generate an APIC error instead of doing the
requested action. Make our emulation behave similarly.
Cc: Paolo Bonzini
Cc: Radim Krčmář
From: Wanpeng Li
The description in the Intel SDM of how the divide configuration
register is used: "The APIC timer frequency will be the processor's bus
clock or core crystal clock frequency divided by the value specified in
the divide configuration register."
From: Wanpeng Li
Vectors 0-15 are reserved, and a physical LAPIC - upon sending or
receiving one - would generate an APIC error instead of doing the
requested action. Make our emulation behave similarly.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c |
From: Wanpeng Li
The description in the Intel SDM of how the divide configuration
register is used: "The APIC timer frequency will be the processor's bus
clock or core crystal clock frequency divided by the value specified in
the divide configuration register."
Observation of baremetal shown
From: Wanpeng Li
SDM 10.5.4.1 TSC-Deadline Mode mentioned that "Transitioning between
TSC-Deadline
mode and other timer modes also disarms the timer". So the APIC Timer Initial
Count
Register for one-shot/periodic mode should be reset. This patch do it.
Cc: Paolo
The issue is reported in xen community.
Anthony PERARD pointed out:
https://www.mail-archive.com/xen-devel@lists.xen.org/msg117283.html#
| When developing PVH for OVMF, I've used the lapic timer. It turns out that
the
| way it is used by OVMF did not work with Xen [1]. I tried to find out
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