From: Milian Wolff
The inline_node structs are maintained by the new dso->inlines tree.
This in turn keeps ownership of the fake symbols and srcline string
representing an inline frame.
This tree is sorted by address to allow quick lookups. All other entries
of the symbol
From: Milian Wolff
The inline_node structs are maintained by the new dso->inlines tree.
This in turn keeps ownership of the fake symbols and srcline string
representing an inline frame.
This tree is sorted by address to allow quick lookups. All other entries
of the symbol beside the function
From: Milian Wolff
The fake symbols we create for inlined frames will represent different
functions but can use the symbol start address. This leads to issues
when different inline branches all lead to the same function.
Before:
~
$ perf report -s sym -i
From: Milian Wolff
The fake symbols we create for inlined frames will represent different
functions but can use the symbol start address. This leads to issues
when different inline branches all lead to the same function.
Before:
~
$ perf report -s sym -i perf.inlining.data --inline --stdio
From: Milian Wolff
Instead of showing the (repeated) DSO name of the non-inlined frame, we
now show the "(inlined)" suffix instead.
Before:
214f7 __hypot_finite (/usr/lib/libm-2.25.so)
ace3 hypot (/usr/lib/libm-2.25.so)
From: Milian Wolff
Instead of showing the (repeated) DSO name of the non-inlined frame, we
now show the "(inlined)" suffix instead.
Before:
214f7 __hypot_finite (/usr/lib/libm-2.25.so)
ace3 hypot (/usr/lib/libm-2.25.so)
a4a
From: Milian Wolff
Some of the code paths I introduced before returned too early without
running the code to handle a node's branch count. By refactoring
match_chain to only have one exit point, this can be remedied.
Signed-off-by: Milian Wolff
From: Milian Wolff
Some of the code paths I introduced before returned too early without
running the code to handle a node's branch count. By refactoring
match_chain to only have one exit point, this can be remedied.
Signed-off-by: Milian Wolff
Acked-by: Namhyung Kim
Cc: David Ahern
Cc: Jin
From: Milian Wolff
On one hand this ensures that the memory is properly freed when the DSO
gets freed. On the other hand this significantly speeds up the
processing of the callchain nodes when lots of srclines are requested.
For one of my data files e.g.:
Before:
From: Milian Wolff
Now that we have caches in place to speed up the process of finding
inlined frames and srcline information repeatedly, we can enable this
useful option by default.
Suggested-by: Ingo Molnar
Signed-off-by: Milian Wolff
From: Milian Wolff
On one hand this ensures that the memory is properly freed when the DSO
gets freed. On the other hand this significantly speeds up the
processing of the callchain nodes when lots of srclines are requested.
For one of my data files e.g.:
Before:
Performance counter stats for
From: Milian Wolff
Now that we have caches in place to speed up the process of finding
inlined frames and srcline information repeatedly, we can enable this
useful option by default.
Suggested-by: Ingo Molnar
Signed-off-by: Milian Wolff
Reviewed-by: Andi Kleen
Cc: David Ahern
Cc: Jin Yao
From: Milian Wolff
This also removes the symbol name from the srcline column, more on this
below.
This ensures we use the correct srcline, which could originate from a
potentially inlined function. The hist entries used to query for the
srcline based purely on the IP,
From: Milian Wolff
This also removes the symbol name from the srcline column, more on this
below.
This ensures we use the correct srcline, which could originate from a
potentially inlined function. The hist entries used to query for the
srcline based purely on the IP, which leads to wrong
From: Milian Wolff
When no inlined frames could be found for a given address, we did not
store this information anywhere. That means we potentially do the costly
inliner lookup repeatedly for cases where we know it can never succeed.
This patch makes
From: Milian Wolff
When no inlined frames could be found for a given address, we did not
store this information anywhere. That means we potentially do the costly
inliner lookup repeatedly for cases where we know it can never succeed.
This patch makes dso__parse_addr_inlines always return a
From: Milian Wolff
Similar to the callstack frame matching, we also have to compare the
symbol name when sorting hist entries. The reason is twofold: On one
hand, multiple inlined functions will use the same symbol start/end
values of the parent, non-inlined symbol.
As
From: Milian Wolff
Similar to the callstack frame matching, we also have to compare the
symbol name when sorting hist entries. The reason is twofold: On one
hand, multiple inlined functions will use the same symbol start/end
values of the parent, non-inlined symbol.
As such, all of these
From: Milian Wolff
The follow-up commits will make inline frames first-class citizens in
the callchain, thereby obsoleting all of this special code.
Signed-off-by: Milian Wolff
Reviewed-by: Jiri Olsa
Reviewed-by: Namhyung Kim
From: Milian Wolff
The follow-up commits will make inline frames first-class citizens in
the callchain, thereby obsoleting all of this special code.
Signed-off-by: Milian Wolff
Reviewed-by: Jiri Olsa
Reviewed-by: Namhyung Kim
Cc: David Ahern
Cc: Peter Zijlstra
Cc: Yao Jin
Link:
From: Milian Wolff
When a callchain entry has no srcline available, we ended up comparing
the instruction pointer. I consider this to be not too useful. Rather, I
think we should group the entries by function name, which this patch
adds. For people who want to split the
From: Milian Wolff
When a callchain entry has no srcline available, we ended up comparing
the instruction pointer. I consider this to be not too useful. Rather, I
think we should group the entries by function name, which this patch
adds. For people who want to split the data on the IP boundary,
at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
tags/perf-core-for-mingo-4.15-20171025
for you to fetch changes up to d8a88dd243a170a226aba33e7c53704db2f82aa6:
perf util: Enable handling of inlined frames by default (2017-10-25 10:50:47
-0300
at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
tags/perf-core-for-mingo-4.15-20171025
for you to fetch changes up to d8a88dd243a170a226aba33e7c53704db2f82aa6:
perf util: Enable handling of inlined frames by default (2017-10-25 10:50:47
-0300
On Wed, Oct 25, 2017 at 5:46 AM, David Laight wrote:
> From: Jim QuinlanPCIE_IPROC_MSI
>> Sent: 24 October 2017 19:16
>> The Broadcom STB PCIe host controller is intimately related to the
>> memory subsystem. This close relationship adds complexity to how cpu
>> system
On Wed, Oct 25, 2017 at 5:46 AM, David Laight wrote:
> From: Jim QuinlanPCIE_IPROC_MSI
>> Sent: 24 October 2017 19:16
>> The Broadcom STB PCIe host controller is intimately related to the
>> memory subsystem. This close relationship adds complexity to how cpu
>> system memory is mapped to PCIe
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Friday, October 20, 2017 5:54 PM
> To: Oleksandr Shamray
> Cc: a...@arndb.de; linux-kernel@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; devicet...@vger.kernel.org;
>
> -Original Message-
> From: Greg KH [mailto:gre...@linuxfoundation.org]
> Sent: Friday, October 20, 2017 5:54 PM
> To: Oleksandr Shamray
> Cc: a...@arndb.de; linux-kernel@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; devicet...@vger.kernel.org;
> open...@lists.ozlabs.org;
Fix checkpatch.pl error:
ERROR: space prohibited before open square bracket '['.
Signed-off-by: Arvind Yadav
---
drivers/staging/rtl8723bs/os_dep/rtw_proc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Fix checkpatch.pl error:
ERROR: space prohibited before open square bracket '['.
Signed-off-by: Arvind Yadav
---
drivers/staging/rtl8723bs/os_dep/rtw_proc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/rtl8723bs/os_dep/rtw_proc.c
On Wed, 25 Oct 2017 17:09:27 +0200,
Kees Cook wrote:
>
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly. These are all the
> "mechanical" changes
On Wed, 25 Oct 2017 17:09:27 +0200,
Kees Cook wrote:
>
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly. These are all the
> "mechanical" changes
On Tue, 2017-10-24 at 21:00 +, Perez-Gonzalez, Inaky wrote:
> > ping
> > any comments on this?
>
> None from me; I don't have access to this HW anymore, so I can't
> validate
> if the change would work or not.
I still have a 5350 around somewhere, I can make sure firmware loads if
you like.
Hi,
On 25-10-17 16:33, SF Markus Elfring wrote:
From: Markus Elfring
Date: Wed, 25 Oct 2017 16:26:29 +0200
Add a jump target so that a call of the function "mutex_unlock" is mostly
stored at the end of these function implementations.
Replace five calls by goto
On Tue, 2017-10-24 at 21:00 +, Perez-Gonzalez, Inaky wrote:
> > ping
> > any comments on this?
>
> None from me; I don't have access to this HW anymore, so I can't
> validate
> if the change would work or not.
I still have a 5350 around somewhere, I can make sure firmware loads if
you like.
Hi,
On 25-10-17 16:33, SF Markus Elfring wrote:
From: Markus Elfring
Date: Wed, 25 Oct 2017 16:26:29 +0200
Add a jump target so that a call of the function "mutex_unlock" is mostly
stored at the end of these function implementations.
Replace five calls by goto statements.
This issue was
On Wed, Oct 25, 2017 at 9:22 AM, Bjorn Helgaas wrote:
> On Tue, Oct 24, 2017 at 02:15:47PM -0400, Jim Quinlan wrote:
>> This commit adds MSI to the Broadcom STB PCIe host controller. It does
>> not add MSIX since that functiostbsrvnality is not in the HW. The MSI
>>
On Wed, Oct 25, 2017 at 9:22 AM, Bjorn Helgaas wrote:
> On Tue, Oct 24, 2017 at 02:15:47PM -0400, Jim Quinlan wrote:
>> This commit adds MSI to the Broadcom STB PCIe host controller. It does
>> not add MSIX since that functiostbsrvnality is not in the HW. The MSI
>> controller is physically
> > > > > > removing libata modules and rebooting fixes it - so it seems to be
> > > > > > loading of libata.
> > > > >
> > > > > Can you please cherry-pick:
> > > > >
> > > > > commit b1f9e5e355e9 ("ide: fix IRQ assignment for PCI bus order
> > > > > probing")
> > > > >
> > > > > from
> > > > > > removing libata modules and rebooting fixes it - so it seems to be
> > > > > > loading of libata.
> > > > >
> > > > > Can you please cherry-pick:
> > > > >
> > > > > commit b1f9e5e355e9 ("ide: fix IRQ assignment for PCI bus order
> > > > > probing")
> > > > >
> > > > > from
On 10/25/2017 02:52 AM, SF Markus Elfring wrote:
From: Markus Elfring
NAK. We don't need any more Markus Elfring spam.
Date: Wed, 25 Oct 2017 11:45:48 +0200
Add a jump target so that a specific error message is stored only once
at the end of this function
On 10/25/2017 02:52 AM, SF Markus Elfring wrote:
From: Markus Elfring
NAK. We don't need any more Markus Elfring spam.
Date: Wed, 25 Oct 2017 11:45:48 +0200
Add a jump target so that a specific error message is stored only once
at the end of this function implementation.
Please read C
On 10/06/2017 05:10 PM, Waiman Long wrote:
> Given the fact that thread mode had been merged into 4.14, it is now
> time to enable cpuset to be used in the default hierarchy (cgroup v2)
> as it is clearly threaded.
>
> The cpuset controller had experienced feature creep since its
> introduction
On 10/06/2017 05:10 PM, Waiman Long wrote:
> Given the fact that thread mode had been merged into 4.14, it is now
> time to enable cpuset to be used in the default hierarchy (cgroup v2)
> as it is clearly threaded.
>
> The cpuset controller had experienced feature creep since its
> introduction
Hi Egil,
> >> @@ -62,7 +80,10 @@ static struct sk_buff *lan9303_xmit(struct sk_buff
> *skb,
> >> struct net_device *dev)
> >>
> >>lan9303_tag = (u16 *)(skb->data + 2 * ETH_ALEN);
> >>lan9303_tag[0] = htons(ETH_P_8021Q);
> >> - lan9303_tag[1] = htons(dp->index | BIT(4));
> >> +
Hi Egil,
> >> @@ -62,7 +80,10 @@ static struct sk_buff *lan9303_xmit(struct sk_buff
> *skb,
> >> struct net_device *dev)
> >>
> >>lan9303_tag = (u16 *)(skb->data + 2 * ETH_ALEN);
> >>lan9303_tag[0] = htons(ETH_P_8021Q);
> >> - lan9303_tag[1] = htons(dp->index | BIT(4));
> >> +
On Wed, Oct 25, 2017 at 05:28:41PM +0200, Clement Courbet wrote:
> Thanks for the comments Yury.
>
> > But I'd like also to keep _find_next_bit() consistent with
> > _find_next_bit_le()
>
> Not sure I understand what you're suggesting here: Do you want a
> find_next_and_bit_le() or do you want
On Wed, Oct 25, 2017 at 05:28:41PM +0200, Clement Courbet wrote:
> Thanks for the comments Yury.
>
> > But I'd like also to keep _find_next_bit() consistent with
> > _find_next_bit_le()
>
> Not sure I understand what you're suggesting here: Do you want a
> find_next_and_bit_le() or do you want
Hello,
On Monday, 23 October 2017 11:45:01 EEST Alexandre Courbot wrote:
> On Thu, Oct 19, 2017 at 11:43 PM, Sakari Ailus wrote:
> > On Thu, Sep 28, 2017 at 06:50:18PM +0900, Alexandre Courbot wrote:
> >> Hi everyone,
> >>
> >> Here is a new attempt at the "request" (which
On 2017/10/25 14:30, Jaegeuk Kim wrote:
> On 10/25, Chao Yu wrote:
>> On 2017/10/25 13:44, Jaegeuk Kim wrote:
>>> On 10/24, Chao Yu wrote:
On 2017/10/24 6:14, Jaegeuk Kim wrote:
> This patch adds to call quota_intialize in f2fs_set_acl.
>
> Signed-off-by: Jaegeuk Kim
Hello,
On Monday, 23 October 2017 11:45:01 EEST Alexandre Courbot wrote:
> On Thu, Oct 19, 2017 at 11:43 PM, Sakari Ailus wrote:
> > On Thu, Sep 28, 2017 at 06:50:18PM +0900, Alexandre Courbot wrote:
> >> Hi everyone,
> >>
> >> Here is a new attempt at the "request" (which I propose to rename
On 2017/10/25 14:30, Jaegeuk Kim wrote:
> On 10/25, Chao Yu wrote:
>> On 2017/10/25 13:44, Jaegeuk Kim wrote:
>>> On 10/24, Chao Yu wrote:
On 2017/10/24 6:14, Jaegeuk Kim wrote:
> This patch adds to call quota_intialize in f2fs_set_acl.
>
> Signed-off-by: Jaegeuk Kim
> ---
On 25/10/17 09:32 AM, sba...@raithlin.com wrote:
From: Stephen Bates
If the amount of resources allocated to a gen_pool exceeds 2^32 then
the avail atomic overflows and this causes problems when clients try
and borrow resources from the pool.
Add the header to pull in
On 25/10/17 09:32 AM, sba...@raithlin.com wrote:
From: Stephen Bates
If the amount of resources allocated to a gen_pool exceeds 2^32 then
the avail atomic overflows and this causes problems when clients try
and borrow resources from the pool.
Add the header to pull in atomic64 operations
On 2017/10/25 22:06, Yunlong Song wrote:
> Hi, Chao,
> Please see my comments below.
>
> On 2017/10/25 20:26, Chao Yu wrote:
>> On 2017/10/25 18:02, Yunlong Song wrote:
>>> ping...
>> I've replied in this thread, check your email list please, or you can check
>> the
>> comments in below
On 2017/10/25 22:06, Yunlong Song wrote:
> Hi, Chao,
> Please see my comments below.
>
> On 2017/10/25 20:26, Chao Yu wrote:
>> On 2017/10/25 18:02, Yunlong Song wrote:
>>> ping...
>> I've replied in this thread, check your email list please, or you can check
>> the
>> comments in below
On Wed, Oct 11, 2017 at 10:03:01AM +0200, Geert Uytterhoeven wrote:
> PSCI support may be disabled at build time (by configuration) or at
> run-time (PSCI firmware not present). While CONFIG_ARM_PSCI_FW can be
> used to check for build time enablement, there is currently no simple
> way to check
On Wed, Oct 11, 2017 at 10:03:01AM +0200, Geert Uytterhoeven wrote:
> PSCI support may be disabled at build time (by configuration) or at
> run-time (PSCI firmware not present). While CONFIG_ARM_PSCI_FW can be
> used to check for build time enablement, there is currently no simple
> way to check
From: Stephen Bates
If the amount of resources allocated to a gen_pool exceeds 2^32 then
the avail atomic overflows and this causes problems when clients try
and borrow resources from the pool.
Add the header to pull in atomic64 operations on
platforms that do not support
From: Stephen Bates
If the amount of resources allocated to a gen_pool exceeds 2^32 then
the avail atomic overflows and this causes problems when clients try
and borrow resources from the pool.
Add the header to pull in atomic64 operations on
platforms that do not support them natively.
On Tue, Oct 24, 2017 at 2:57 PM, Florian Fainelli wrote:
> Hi Jim,
>
> On 10/24/2017 11:15 AM, Jim Quinlan wrote:
>> This commit adds MSI to the Broadcom STB PCIe host controller. It does
>> not add MSIX since that functionality is not in the HW. The MSI
>> controller is
On Tue, Oct 24, 2017 at 2:57 PM, Florian Fainelli wrote:
> Hi Jim,
>
> On 10/24/2017 11:15 AM, Jim Quinlan wrote:
>> This commit adds MSI to the Broadcom STB PCIe host controller. It does
>> not add MSIX since that functionality is not in the HW. The MSI
>> controller is physically located
V2 just sent to linuxppc-dev[0] list, with some simplifications.
This one is then officially dropped!
Thanks,
Guilherme
[0] http://patchwork.ozlabs.org/patch/830320
V2 just sent to linuxppc-dev[0] list, with some simplifications.
This one is then officially dropped!
Thanks,
Guilherme
[0] http://patchwork.ozlabs.org/patch/830320
Thanks for the comments Yury.
> But I'd like also to keep _find_next_bit() consistent with
> _find_next_bit_le()
Not sure I understand what you're suggesting here: Do you want a
find_next_and_bit_le() or do you want to make _find_next_bit_le() more
like _find_next_bit() ? In the latter case we
Thanks for the comments Yury.
> But I'd like also to keep _find_next_bit() consistent with
> _find_next_bit_le()
Not sure I understand what you're suggesting here: Do you want a
find_next_and_bit_le() or do you want to make _find_next_bit_le() more
like _find_next_bit() ? In the latter case we
Change #define lines to use tabs consistently.
Acked-by: Vladimir Zapolskiy
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 190 +++
1
Change #define lines to use tabs consistently.
Acked-by: Vladimir Zapolskiy
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 190 +++
1 file changed, 95 insertions(+), 95 deletions(-)
diff --git
First patch change spaces to tabs, second adds HASH support for Exynos.
Changes:
version 8:
- fixes suggested by Vladimir Zapolskiy: drop first condition check in
s5p_hash_import, delete unused include delay.h, fix typo in commit
message, fix descriptions of struct s5p_hash_reqctx and
First patch change spaces to tabs, second adds HASH support for Exynos.
Changes:
version 8:
- fixes suggested by Vladimir Zapolskiy: drop first condition check in
s5p_hash_import, delete unused include delay.h, fix typo in commit
message, fix descriptions of struct s5p_hash_reqctx and
This is quite useful for debugging. Currently, always TERMINATE the
translation when the fault handler returns (since this is all we need
for debugging drivers). But I expect the SVM work should eventually
let us do something more clever.
Signed-off-by: Rob Clark
---
v2:
This is quite useful for debugging. Currently, always TERMINATE the
translation when the fault handler returns (since this is all we need
for debugging drivers). But I expect the SVM work should eventually
let us do something more clever.
Signed-off-by: Rob Clark
---
v2: add back a hunk that
This is quite useful for debugging. Currently, always TERMINATE the
translation when the fault handler returns (since this is all we need
for debugging drivers). But I expect the SVM work should eventually
let us do something more clever.
Signed-off-by: Rob Clark
---
This is quite useful for debugging. Currently, always TERMINATE the
translation when the fault handler returns (since this is all we need
for debugging drivers). But I expect the SVM work should eventually
let us do something more clever.
Signed-off-by: Rob Clark
---
Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
It uses the crypto framework asynchronous hash api.
It is based on omap-sham.c driver.
S5P has some HW differencies and is not implemented.
Modifications in s5p-sss:
- Add hash supporting structures and functions.
- Modify irq
Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
It uses the crypto framework asynchronous hash api.
It is based on omap-sham.c driver.
S5P has some HW differencies and is not implemented.
Modifications in s5p-sss:
- Add hash supporting structures and functions.
- Modify irq
Hi Vladimir,
On 25.10.2017 17:09, Vladimir Zapolskiy wrote:
>
> thank you for updates, everything looks good from my point of view.
>
Thank you for your work, I am still newbie, I forgot 'v8'
and to: linux-crypto :(
So I will resend this patch series with improved title
and your Ack added.
Hi Vladimir,
On 25.10.2017 17:09, Vladimir Zapolskiy wrote:
>
> thank you for updates, everything looks good from my point of view.
>
Thank you for your work, I am still newbie, I forgot 'v8'
and to: linux-crypto :(
So I will resend this patch series with improved title
and your Ack added.
Hi Jason,
On 25 October 2017 at 20:48, Jason Gunthorpe
wrote:
> On Wed, Oct 25, 2017 at 08:15:09PM +0530, PrasannaKumar Muralidharan
> wrote:
>
>> > +static int tpm_add_hwrng(struct tpm_chip *chip)
>> > +{
>> > + if (!IS_ENABLED(CONFIG_HW_RANDOM_TPM))
>> >
Hi Jason,
On 25 October 2017 at 20:48, Jason Gunthorpe
wrote:
> On Wed, Oct 25, 2017 at 08:15:09PM +0530, PrasannaKumar Muralidharan
> wrote:
>
>> > +static int tpm_add_hwrng(struct tpm_chip *chip)
>> > +{
>> > + if (!IS_ENABLED(CONFIG_HW_RANDOM_TPM))
>> > + return 0;
>>
>>
On Wed, Oct 25, 2017 at 01:55:04PM +0200, Jarkko Sakkinen wrote:
> Device number (the character device index) is not a stable identifier
> for a TPM chip. That is the reason why every call site passes
> TPM_ANY_NUM to tpm_chip_find_get().
>
> This commit changes the API in a way that instead a
On Wed, Oct 25, 2017 at 01:55:04PM +0200, Jarkko Sakkinen wrote:
> Device number (the character device index) is not a stable identifier
> for a TPM chip. That is the reason why every call site passes
> TPM_ANY_NUM to tpm_chip_find_get().
>
> This commit changes the API in a way that instead a
On Tue, Oct 24, 2017 at 01:20:39PM +0530, Arvind Yadav wrote:
> pr_err() messages should end with a new-line to avoid other messages
> being concatenated.
>
> Signed-off-by: Arvind Yadav
FWIW,
Acked-by: Javi Merino
> ---
>
On Tue, Oct 24, 2017 at 01:20:39PM +0530, Arvind Yadav wrote:
> pr_err() messages should end with a new-line to avoid other messages
> being concatenated.
>
> Signed-off-by: Arvind Yadav
FWIW,
Acked-by: Javi Merino
> ---
> drivers/thermal/cpu_cooling.c | 2 +-
> 1 file changed, 1
On Wed, Oct 25, 2017 at 08:15:09PM +0530, PrasannaKumar Muralidharan
wrote:
> > +static int tpm_add_hwrng(struct tpm_chip *chip)
> > +{
> > + if (!IS_ENABLED(CONFIG_HW_RANDOM_TPM))
> > + return 0;
>
> Can #ifndef CONFIG_HW_RANDOM_TPM be used instead? That way an if
>
On Wed, Oct 25, 2017 at 08:15:09PM +0530, PrasannaKumar Muralidharan
wrote:
> > +static int tpm_add_hwrng(struct tpm_chip *chip)
> > +{
> > + if (!IS_ENABLED(CONFIG_HW_RANDOM_TPM))
> > + return 0;
>
> Can #ifndef CONFIG_HW_RANDOM_TPM be used instead? That way an if
>
Hi Jarkko,
On 25 October 2017 at 17:25, Jarkko Sakkinen
wrote:
> Device number (the character device index) is not a stable identifier
> for a TPM chip. That is the reason why every call site passes
> TPM_ANY_NUM to tpm_chip_find_get().
>
> This commit changes
Hi Jarkko,
On 25 October 2017 at 17:25, Jarkko Sakkinen
wrote:
> Device number (the character device index) is not a stable identifier
> for a TPM chip. That is the reason why every call site passes
> TPM_ANY_NUM to tpm_chip_find_get().
>
> This commit changes the API in a way that instead a
On Wed, Oct 25, 2017 at 5:31 PM, Miklos Szeredi wrote:
> On Wed, Oct 25, 2017 at 10:41 AM, Miklos Szeredi wrote:
>> We discovered some problems in the latest fsnotify/fanotify codebase with
>> the help of a stress test (Xiong Zhou is working on
On Wed, Oct 25, 2017 at 5:31 PM, Miklos Szeredi wrote:
> On Wed, Oct 25, 2017 at 10:41 AM, Miklos Szeredi wrote:
>> We discovered some problems in the latest fsnotify/fanotify codebase with
>> the help of a stress test (Xiong Zhou is working on upstreaming it to
>> fstests).
>>
>> This series
On 10/25/2017 02:02 AM, Andy Gross wrote:
> On Tue, Oct 24, 2017 at 05:20:20PM -0700, Stephen Boyd wrote:
>> On 10/20, Alex Elder wrote:
>>> This series deletes three config options related to USB on Qualcomm
>>> SoCs from the arm64 "defconfig", along with the code that they
>>> enable. The code
On 10/25/2017 02:02 AM, Andy Gross wrote:
> On Tue, Oct 24, 2017 at 05:20:20PM -0700, Stephen Boyd wrote:
>> On 10/20, Alex Elder wrote:
>>> This series deletes three config options related to USB on Qualcomm
>>> SoCs from the arm64 "defconfig", along with the code that they
>>> enable. The code
MediaTek PMIC are multi-function devices that can handle key interrupts,
typically there are two keys attached to PMIC, which called pwrkey and homekey.
PWRKEY usually used to wake up system from sleep. Homekey can used as volume
down key due to board design. Long press keys can shutdown PMIC,
MediaTek PMIC are multi-function devices that can handle key interrupts,
typically there are two keys attached to PMIC, which called pwrkey and homekey.
PWRKEY usually used to wake up system from sleep. Homekey can used as volume
down key due to board design. Long press keys can shutdown PMIC,
On Wed, Oct 25, 2017 at 05:49:54PM +0300, Meelis Roos wrote:
> > > > > removing libata modules and rebooting fixes it - so it seems to be
> > > > > loading of libata.
> > > >
> > > > Can you please cherry-pick:
> > > >
> > > > commit b1f9e5e355e9 ("ide: fix IRQ assignment for PCI bus order
> >
On Wed, Oct 25, 2017 at 05:49:54PM +0300, Meelis Roos wrote:
> > > > > removing libata modules and rebooting fixes it - so it seems to be
> > > > > loading of libata.
> > > >
> > > > Can you please cherry-pick:
> > > >
> > > > commit b1f9e5e355e9 ("ide: fix IRQ assignment for PCI bus order
> >
On 10/25/2017 02:45 AM, Dongli Zhang wrote:
> After guest live migration on xen, steal time in /proc/stat
> (cpustat[CPUTIME_STEAL]) might decrease because steal returned by
> xen_steal_lock() might be less than this_rq()->prev_steal_time which is
> derived from previous return value of
On 10/25/2017 02:45 AM, Dongli Zhang wrote:
> After guest live migration on xen, steal time in /proc/stat
> (cpustat[CPUTIME_STEAL]) might decrease because steal returned by
> xen_steal_lock() might be less than this_rq()->prev_steal_time which is
> derived from previous return value of
In case gntdev_mmap() succeeds only partially in mapping grant pages
it will leave some vital information uninitialized needed later for
cleanup. This will lead to an out of bounds array access when unmapping
the already mapped pages.
So just initialize the data needed for unmapping the pages a
In case gntdev_mmap() succeeds only partially in mapping grant pages
it will leave some vital information uninitialized needed later for
cleanup. This will lead to an out of bounds array access when unmapping
the already mapped pages.
So just initialize the data needed for unmapping the pages a
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