[PATCH 06/17] tools lib symbol: Skip non-address kallsyms line

Adding check on failed attempt to parse the address and skip the line parsing early in that case. Link: http://lkml.kernel.org/n/tip-djqwni3p6lgctf6o7xhhw...@git.kernel.org Signed-off-by: Jiri Olsa --- tools/lib/symbol/kallsyms.c | 4 1 file changed, 4 insertions(+) diff

[PATCH 06/17] tools lib symbol: Skip non-address kallsyms line

Adding check on failed attempt to parse the address and skip the line parsing early in that case. Link: http://lkml.kernel.org/n/tip-djqwni3p6lgctf6o7xhhw...@git.kernel.org Signed-off-by: Jiri Olsa --- tools/lib/symbol/kallsyms.c | 4 1 file changed, 4 insertions(+) diff --git

Re: [RFC PATCH v1 13/13] mm: splice local lists onto the front of the LRU

On 02/02/2018 10:22 AM, Laurent Dufour wrote: On 01/02/2018 00:04, daniel.m.jor...@oracle.com wrote: ...snip... diff --git a/mm/memcontrol.c b/mm/memcontrol.c index 99a54df760e3..6911626f29b2 100644 --- a/mm/memcontrol.c +++ b/mm/memcontrol.c @@ -2077,6 +2077,7 @@ static void

Re: [RFC PATCH v1 13/13] mm: splice local lists onto the front of the LRU

On 02/02/2018 10:22 AM, Laurent Dufour wrote: On 01/02/2018 00:04, daniel.m.jor...@oracle.com wrote: ...snip... diff --git a/mm/memcontrol.c b/mm/memcontrol.c index 99a54df760e3..6911626f29b2 100644 --- a/mm/memcontrol.c +++ b/mm/memcontrol.c @@ -2077,6 +2077,7 @@ static void

Re: [PATCH] ARM: dts: da850-evm: add clock properties to the nand node

On 02/06/2018 07:51 AM, Sekhar Nori wrote: On Tuesday 06 February 2018 06:38 PM, Bartosz Golaszewski wrote: 2018-02-06 12:07 GMT+01:00 Sekhar Nori : On Monday 05 February 2018 09:22 PM, Bartosz Golaszewski wrote: From: Bartosz Golaszewski Make nand

Re: [PATCH] ARM: dts: da850-evm: add clock properties to the nand node

On 02/06/2018 07:51 AM, Sekhar Nori wrote: On Tuesday 06 February 2018 06:38 PM, Bartosz Golaszewski wrote: 2018-02-06 12:07 GMT+01:00 Sekhar Nori : On Monday 05 February 2018 09:22 PM, Bartosz Golaszewski wrote: From: Bartosz Golaszewski Make nand work with the common clock framework by

Re: [PATCH v3 0/6] cpufreq: schedutil: fixes for flags updates

Hi Patrick, Il 06/02/2018 16:43, Patrick Bellasi ha scritto: Hi Claudio, On 06-Feb 11:55, Claudio Scordino wrote: Hi Peter, Il 20/12/2017 16:30, Peter Zijlstra ha scritto: So I ended up with the below (on top of Juri's cpufreq-dl patches). It compiles, but that's about all the testing it

Re: [PATCH v3 0/6] cpufreq: schedutil: fixes for flags updates

Hi Patrick, Il 06/02/2018 16:43, Patrick Bellasi ha scritto: Hi Claudio, On 06-Feb 11:55, Claudio Scordino wrote: Hi Peter, Il 20/12/2017 16:30, Peter Zijlstra ha scritto: So I ended up with the below (on top of Juri's cpufreq-dl patches). It compiles, but that's about all the testing it

Re: [RFC 2/4] KVM: arm64: Support dirty page tracking for PUD hugepages

Christoffer Dall writes: > On Wed, Jan 10, 2018 at 07:07:27PM +, Punit Agrawal wrote: >> In preparation for creating PUD hugepages at stage 2, add support for >> write protecting PUD hugepages when they are encountered. Write >> protecting guest tables is used to

Re: [RFC 2/4] KVM: arm64: Support dirty page tracking for PUD hugepages

Christoffer Dall writes: > On Wed, Jan 10, 2018 at 07:07:27PM +, Punit Agrawal wrote: >> In preparation for creating PUD hugepages at stage 2, add support for >> write protecting PUD hugepages when they are encountered. Write >> protecting guest tables is used to track dirty pages when

RE: [PATCH] vsprintf: avoid misleading "(null)" for %px

> -Original Message- > From: Tobin C. Harding [mailto:m...@tobin.cc] > Sent: Monday, February 5, 2018 2:23 PM > To: Adam Borowski > Cc: Kees Cook ; Petr Mladek ; > Sergey Senozhatsky ; Steven

RE: [PATCH] vsprintf: avoid misleading "(null)" for %px

> -Original Message- > From: Tobin C. Harding [mailto:m...@tobin.cc] > Sent: Monday, February 5, 2018 2:23 PM > To: Adam Borowski > Cc: Kees Cook ; Petr Mladek ; > Sergey Senozhatsky ; Steven Rostedt > ; LKML ; Andrew Morton > ; Joe Perches ; Roberts, > William C ; Linus Torvalds

Re: [RFC 4/4] KVM: arm64: Add support for PUD hugepages at stage 2

Christoffer Dall writes: > On Wed, Jan 10, 2018 at 07:07:29PM +, Punit Agrawal wrote: >> KVM only supports PMD hugepages at stage 2. Extend the stage 2 fault >> handling to add support for PUD hugepages. >> >> Addition of PUD hugpage support enables additional

Re: [RFC 4/4] KVM: arm64: Add support for PUD hugepages at stage 2

Christoffer Dall writes: > On Wed, Jan 10, 2018 at 07:07:29PM +, Punit Agrawal wrote: >> KVM only supports PMD hugepages at stage 2. Extend the stage 2 fault >> handling to add support for PUD hugepages. >> >> Addition of PUD hugpage support enables additional hugepage sizes (1G > >

Re: [PATCH v1 0/1] spi_ks8995: use regmap to access chip registers.

Andrew and Florian, thanks for your input. On Tue, Feb 6, 2018 at 12:05 PM, Andrew Lunn wrote: > I would NACK sysfs bin file. Do it right, or don't do it at all. On Tue, Feb 6, 2018 at 12:47 PM, Florian Fainelli wrote: > Sven, there is a standard ethtool

Re: [PATCH v1 0/1] spi_ks8995: use regmap to access chip registers.

Andrew and Florian, thanks for your input. On Tue, Feb 6, 2018 at 12:05 PM, Andrew Lunn wrote: > I would NACK sysfs bin file. Do it right, or don't do it at all. On Tue, Feb 6, 2018 at 12:47 PM, Florian Fainelli wrote: > Sven, there is a standard ethtool register dump interface that can be >

Re: [PATCH 16/20] auxdisplay: img-ascii-lcd: Remove MIPS_SEAD3 dep.

On 02/04/2018 05:58 PM, Ulf Magnusson wrote: > On Mon, Feb 5, 2018 at 2:21 AM, Ulf Magnusson wrote: >> The MIPS_SEAD3 symbol was removed in commit 64601cb1343f ("leds: Remove >> SEAD-3 >> driver"). >> >> Remove the MIPS_SEAD3 dependency from IMG_ASCII_LCD. >> >> Discovered

Re: [PATCH 16/20] auxdisplay: img-ascii-lcd: Remove MIPS_SEAD3 dep.

On 02/04/2018 05:58 PM, Ulf Magnusson wrote: > On Mon, Feb 5, 2018 at 2:21 AM, Ulf Magnusson wrote: >> The MIPS_SEAD3 symbol was removed in commit 64601cb1343f ("leds: Remove >> SEAD-3 >> driver"). >> >> Remove the MIPS_SEAD3 dependency from IMG_ASCII_LCD. >> >> Discovered with the >>

[PATCH v3 1/2] drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs

>From : Archana Sathyakumar The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an interrupt controller along with other domain control functions to handle interrupt related functions like handle falling edge or active low which are not detected at the GIC

[PATCH v3 1/2] drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs

>From : Archana Sathyakumar The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an interrupt controller along with other domain control functions to handle interrupt related functions like handle falling edge or active low which are not detected at the GIC and handle wakeup

[PATCH v3 2/2] dt-bindings/interrupt-controller: pdc: descibe PDC device binding

From: Archana Sathyakumar Add device binding documentation for the PDC Interrupt controller on QCOM SoC's like the SDM845. The interrupt-controller can be used to sense edge low interrupts and wakeup interrupts when the GIC is non-operational. Cc:

[PATCH v3 2/2] dt-bindings/interrupt-controller: pdc: descibe PDC device binding

From: Archana Sathyakumar Add device binding documentation for the PDC Interrupt controller on QCOM SoC's like the SDM845. The interrupt-controller can be used to sense edge low interrupts and wakeup interrupts when the GIC is non-operational. Cc: devicet...@vger.kernel.org Signed-off-by:

[PATCH v3 0/2] irqchip: qcom: add support for PDC interrupt controller

Changes since RFC v2: - Fixed up DT probe based on suggestions from Thomas and Marc - Code clean up as suggested by Thomas - Switch to SPDX license marker - Dropped the FTRACE patch for now, will need more thought and discussions On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC

[PATCH v3 0/2] irqchip: qcom: add support for PDC interrupt controller

Changes since RFC v2: - Fixed up DT probe based on suggestions from Thomas and Marc - Code clean up as suggested by Thomas - Switch to SPDX license marker - Dropped the FTRACE patch for now, will need more thought and discussions On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC

[PATCH] x86: PM: Make APM idle driver initialize polling state

From: Rafael J. Wysocki Update the APM driver overlooked by commit 1b39e3f813b4 (cpuidle: Make drivers initialize polling state) to initialize the polling state like the other cpuidle drivers modified by that commit to prevent cpuidle from crashing. Fixes:

[PATCH] x86: PM: Make APM idle driver initialize polling state

From: Rafael J. Wysocki Update the APM driver overlooked by commit 1b39e3f813b4 (cpuidle: Make drivers initialize polling state) to initialize the polling state like the other cpuidle drivers modified by that commit to prevent cpuidle from crashing. Fixes: 1b39e3f813b4 (cpuidle: Make drivers

Re: [PATCH v2] arc: dts: use 'atmel' as manufacturer for at24 in axs10x_mb

2018-02-06 13:25 GMT+01:00 Alexey Brodkin : > Hi Bartosz, > > On Tue, 2018-02-06 at 12:08 +0100, Bartosz Golaszewski wrote: >> Using compatible strings without the part for at24 is >> deprecated since commit 6da28acf745f ("dt-bindings: at24: consistently >> document

Re: [PATCH v2] arc: dts: use 'atmel' as manufacturer for at24 in axs10x_mb

2018-02-06 13:25 GMT+01:00 Alexey Brodkin : > Hi Bartosz, > > On Tue, 2018-02-06 at 12:08 +0100, Bartosz Golaszewski wrote: >> Using compatible strings without the part for at24 is >> deprecated since commit 6da28acf745f ("dt-bindings: at24: consistently >> document the compatible property"). Use

Re: possible deadlock in rtnl_lock (3)

On Tue, Feb 6, 2018 at 6:58 PM, syzbot wrote: > Hello, > > syzbot hit the following crash on net-next commit > 617aebe6a97efa539cc4b8a52adccd89596e6be0 (Sun Feb 4 00:25:42 2018 +) > Merge tag 'usercopy-v4.16-rc1' of >

Re: possible deadlock in rtnl_lock (3)

On Tue, Feb 6, 2018 at 6:58 PM, syzbot wrote: > Hello, > > syzbot hit the following crash on net-next commit > 617aebe6a97efa539cc4b8a52adccd89596e6be0 (Sun Feb 4 00:25:42 2018 +) > Merge tag 'usercopy-v4.16-rc1' of > git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux > > So far this

Re: [PATCH] Revert "cpuidle: Make drivers initialize polling state"

On Tuesday, February 6, 2018 5:31:34 PM CET Ville Syrjälä wrote: > On Mon, Feb 05, 2018 at 06:56:31PM +0100, Rafael J. Wysocki wrote: > > On Monday, February 5, 2018 3:04:45 PM CET Ville Syrjälä wrote: > > > On Sun, Feb 04, 2018 at 10:18:07AM +0100, Rafael J. Wysocki wrote: > > > > On Sun, Feb 4,

Re: [PATCH] Revert "cpuidle: Make drivers initialize polling state"

On Tuesday, February 6, 2018 5:31:34 PM CET Ville Syrjälä wrote: > On Mon, Feb 05, 2018 at 06:56:31PM +0100, Rafael J. Wysocki wrote: > > On Monday, February 5, 2018 3:04:45 PM CET Ville Syrjälä wrote: > > > On Sun, Feb 04, 2018 at 10:18:07AM +0100, Rafael J. Wysocki wrote: > > > > On Sun, Feb 4,

[PATCH v4 05/17] arm/arm64: KVM: Add PSCI_VERSION helper

As we're about to trigger a PSCI version explosion, it doesn't hurt to introduce a PSCI_VERSION helper that is going to be used everywhere. Reviewed-by: Christoffer Dall Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier

[PATCH v4 05/17] arm/arm64: KVM: Add PSCI_VERSION helper

As we're about to trigger a PSCI version explosion, it doesn't hurt to introduce a PSCI_VERSION helper that is going to be used everywhere. Reviewed-by: Christoffer Dall Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier --- include/kvm/arm_psci.h| 6 -- include/uapi/linux/psci.h |

Re: [STABLE 4.9.y PATCH 0/9] Backport of KVM Speculation Control support

On 06/02/2018 18:29, David Woodhouse wrote: > I've put together a linux-4.9.y branch at > http://git.infradead.org/retpoline-stable.git/shortlog/refs/heads/linux-4.9.y > > Most of it is fairly straightforward, apart from the IBPB on context > switch for which Tim has already posted a candidate.

Re: [STABLE 4.9.y PATCH 0/9] Backport of KVM Speculation Control support

On 06/02/2018 18:29, David Woodhouse wrote: > I've put together a linux-4.9.y branch at > http://git.infradead.org/retpoline-stable.git/shortlog/refs/heads/linux-4.9.y > > Most of it is fairly straightforward, apart from the IBPB on context > switch for which Tim has already posted a candidate.

[PATCH v4 06/17] arm/arm64: KVM: Add smccc accessors to PSCI code

Instead of open coding the accesses to the various registers, let's add explicit SMCCC accessors. Reviewed-by: Christoffer Dall Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier --- virt/kvm/arm/psci.c | 52

[PATCH v4 06/17] arm/arm64: KVM: Add smccc accessors to PSCI code

Instead of open coding the accesses to the various registers, let's add explicit SMCCC accessors. Reviewed-by: Christoffer Dall Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier --- virt/kvm/arm/psci.c | 52 ++-- 1 file changed, 42

[PATCH v4 08/17] arm/arm64: KVM: Advertise SMCCC v1.1

The new SMC Calling Convention (v1.1) allows for a reduced overhead when calling into the firmware, and provides a new feature discovery mechanism. Make it visible to KVM guests. Tested-by: Ard Biesheuvel Reviewed-by: Christoffer Dall

[PATCH v4 08/17] arm/arm64: KVM: Advertise SMCCC v1.1

The new SMC Calling Convention (v1.1) allows for a reduced overhead when calling into the firmware, and provides a new feature discovery mechanism. Make it visible to KVM guests. Tested-by: Ard Biesheuvel Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier ---

[PATCH v4 15/17] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive

One of the major improvement of SMCCC v1.1 is that it only clobbers the first 4 registers, both on 32 and 64bit. This means that it becomes very easy to provide an inline version of the SMC call primitive, and avoid performing a function call to stash the registers that would otherwise be

[PATCH v4 15/17] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive

One of the major improvement of SMCCC v1.1 is that it only clobbers the first 4 registers, both on 32 and 64bit. This means that it becomes very easy to provide an inline version of the SMC call primitive, and avoid performing a function call to stash the registers that would otherwise be

[PATCH v4 16/17] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. It is lovely. Really. Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier --- arch/arm64/kernel/bpi.S| 20 + arch/arm64/kernel/cpu_errata.c | 68

[PATCH v4 16/17] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support

Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1. It is lovely. Really. Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier --- arch/arm64/kernel/bpi.S| 20 + arch/arm64/kernel/cpu_errata.c | 68 +- 2 files

[PATCH v4 17/17] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround

Now that we've standardised on SMCCC v1.1 to perform the branch prediction invalidation, let's drop the previous band-aid. If vendors haven't updated their firmware to do SMCCC 1.1, they haven't updated PSCI either, so we don't loose anything. Tested-by: Ard Biesheuvel

[PATCH v4 17/17] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround

Now that we've standardised on SMCCC v1.1 to perform the branch prediction invalidation, let's drop the previous band-aid. If vendors haven't updated their firmware to do SMCCC 1.1, they haven't updated PSCI either, so we don't loose anything. Tested-by: Ard Biesheuvel Signed-off-by: Marc

Re: [PATCH V3 1/5] perf/x86/intel: fix event update for auto-reload

With the exception of handling 'empty' buffers, I ended up with the below. Please try again. There are two small errors. After fixing them, the patch works well. --- --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1156,16 +1156,13 @@ int x86_perf_event_set_period(struct per

[PATCH v4 11/17] arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling

We want SMCCC_ARCH_WORKAROUND_1 to be fast. As fast as possible. So let's intercept it as early as we can by testing for the function call number as soon as we've identified a HVC call coming from the guest. Tested-by: Ard Biesheuvel Reviewed-by: Christoffer Dall

Re: [PATCH V3 1/5] perf/x86/intel: fix event update for auto-reload

With the exception of handling 'empty' buffers, I ended up with the below. Please try again. There are two small errors. After fixing them, the patch works well. --- --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1156,16 +1156,13 @@ int x86_perf_event_set_period(struct per

[PATCH v4 11/17] arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling

We want SMCCC_ARCH_WORKAROUND_1 to be fast. As fast as possible. So let's intercept it as early as we can by testing for the function call number as soon as we've identified a HVC call coming from the guest. Tested-by: Ard Biesheuvel Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier

[PATCH v4 10/17] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support

A new feature of SMCCC 1.1 is that it offers firmware-based CPU workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides BP hardening for CVE-2017-5715. If the host has some mitigation for this issue, report that we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the host workaround

[PATCH v4 10/17] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support

A new feature of SMCCC 1.1 is that it offers firmware-based CPU workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides BP hardening for CVE-2017-5715. If the host has some mitigation for this issue, report that we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the host workaround

[PATCH v4 14/17] arm/arm64: smccc: Make function identifiers an unsigned quantity

Function identifiers are a 32bit, unsigned quantity. But we never tell so to the compiler, resulting in the following: 4ac: b26187e0mov x0, #0x8001 We thus rely on the firmware narrowing it for us, which is not always a reasonable expectation. Cc:

[PATCH v4 14/17] arm/arm64: smccc: Make function identifiers an unsigned quantity

Function identifiers are a 32bit, unsigned quantity. But we never tell so to the compiler, resulting in the following: 4ac: b26187e0mov x0, #0x8001 We thus rely on the firmware narrowing it for us, which is not always a reasonable expectation. Cc:

[PATCH v4 07/17] arm/arm64: KVM: Implement PSCI 1.0 support

PSCI 1.0 can be trivially implemented by providing the FEATURES call on top of PSCI 0.2 and returning 1.0 as the PSCI version. We happily ignore everything else, as they are either optional or are clarifications that do not require any additional change. PSCI 1.0 is now the default until we

[PATCH v4 07/17] arm/arm64: KVM: Implement PSCI 1.0 support

PSCI 1.0 can be trivially implemented by providing the FEATURES call on top of PSCI 0.2 and returning 1.0 as the PSCI version. We happily ignore everything else, as they are either optional or are clarifications that do not require any additional change. PSCI 1.0 is now the default until we

[PATCH v4 12/17] firmware/psci: Expose PSCI conduit

In order to call into the firmware to apply workarounds, it is useful to find out whether we're using HVC or SMC. Let's expose this through the psci_ops. Acked-by: Lorenzo Pieralisi Reviewed-by: Robin Murphy Tested-by: Ard Biesheuvel

[PATCH v4 12/17] firmware/psci: Expose PSCI conduit

In order to call into the firmware to apply workarounds, it is useful to find out whether we're using HVC or SMC. Let's expose this through the psci_ops. Acked-by: Lorenzo Pieralisi Reviewed-by: Robin Murphy Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier --- drivers/firmware/psci.c |

[PATCH v4 09/17] arm/arm64: KVM: Turn kvm_psci_version into a static inline

We're about to need kvm_psci_version in HYP too. So let's turn it into a static inline, and pass the kvm structure as a second parameter (so that HYP can do a kern_hyp_va on it). Tested-by: Ard Biesheuvel Reviewed-by: Christoffer Dall

[PATCH v4 09/17] arm/arm64: KVM: Turn kvm_psci_version into a static inline

We're about to need kvm_psci_version in HYP too. So let's turn it into a static inline, and pass the kvm structure as a second parameter (so that HYP can do a kern_hyp_va on it). Tested-by: Ard Biesheuvel Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier ---

[PATCH v4 13/17] firmware/psci: Expose SMCCC version through psci_ops

Since PSCI 1.0 allows the SMCCC version to be (indirectly) probed, let's do that at boot time, and expose the version of the calling convention as part of the psci_ops structure. Acked-by: Lorenzo Pieralisi Reviewed-by: Robin Murphy Tested-by:

[PATCH v4 13/17] firmware/psci: Expose SMCCC version through psci_ops

Since PSCI 1.0 allows the SMCCC version to be (indirectly) probed, let's do that at boot time, and expose the version of the calling convention as part of the psci_ops structure. Acked-by: Lorenzo Pieralisi Reviewed-by: Robin Murphy Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier ---

[PATCH v4 04/17] arm/arm64: KVM: Consolidate the PSCI include files

As we're about to update the PSCI support, and because I'm lazy, let's move the PSCI include file to include/kvm so that both ARM architectures can find it. Acked-by: Christoffer Dall Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier

[PATCH v4 04/17] arm/arm64: KVM: Consolidate the PSCI include files

As we're about to update the PSCI support, and because I'm lazy, let's move the PSCI include file to include/kvm so that both ARM architectures can find it. Acked-by: Christoffer Dall Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier --- arch/arm/include/asm/kvm_psci.h

[PATCH v4 01/17] arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls

KVM doesn't follow the SMCCC when it comes to unimplemented calls, and inject an UNDEF instead of returning an error. Since firmware calls are now used for security mitigation, they are becoming more common, and the undef is counter productive. Instead, let's follow the SMCCC which states that -1

[PATCH v4 02/17] arm: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls

KVM doesn't follow the SMCCC when it comes to unimplemented calls, and inject an UNDEF instead of returning an error. Since firmware calls are now used for security mitigation, they are becoming more common, and the undef is counter productive. Instead, let's follow the SMCCC which states that -1

[PATCH v4 01/17] arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls

KVM doesn't follow the SMCCC when it comes to unimplemented calls, and inject an UNDEF instead of returning an error. Since firmware calls are now used for security mitigation, they are becoming more common, and the undef is counter productive. Instead, let's follow the SMCCC which states that -1

[PATCH v4 02/17] arm: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls

KVM doesn't follow the SMCCC when it comes to unimplemented calls, and inject an UNDEF instead of returning an error. Since firmware calls are now used for security mitigation, they are becoming more common, and the undef is counter productive. Instead, let's follow the SMCCC which states that -1

[PATCH v4 03/17] arm64: KVM: Increment PC after handling an SMC trap

When handling an SMC trap, the "preferred return address" is set to that of the SMC, and not the next PC (which is a departure from the behaviour of an SMC that isn't trapped). Increment PC in the handler, as the guest is otherwise forever stuck... Cc: sta...@vger.kernel.org Fixes: acfb3b883f6d

[PATCH v4 03/17] arm64: KVM: Increment PC after handling an SMC trap

When handling an SMC trap, the "preferred return address" is set to that of the SMC, and not the next PC (which is a departure from the behaviour of an SMC that isn't trapped). Increment PC in the handler, as the guest is otherwise forever stuck... Cc: sta...@vger.kernel.org Fixes: acfb3b883f6d

[PATCH v4 00/17] arm64: Add SMCCC v1.1 support and CVE-2017-5715 (Spectre variant 2) mitigation

ARM has recently published a SMC Calling Convention (SMCCC) specification update[1] that provides an optimised calling convention and optional, discoverable support for mitigating CVE-2017-5715. ARM Trusted Firmware (ATF) has already gained such an implementation[2]. This series addresses a few

[PATCH v4 00/17] arm64: Add SMCCC v1.1 support and CVE-2017-5715 (Spectre variant 2) mitigation

ARM has recently published a SMC Calling Convention (SMCCC) specification update[1] that provides an optimised calling convention and optional, discoverable support for mitigating CVE-2017-5715. ARM Trusted Firmware (ATF) has already gained such an implementation[2]. This series addresses a few

Re: [PATCH] mm: Always print RLIMIT_DATA warning

On Tue, Feb 6, 2018 at 7:45 PM, David Woodhouse wrote: > The documentation for ignore_rlimit_data says that it will print a warning > at first misuse. Yet it doesn't seem to do that. Fix the code to print > the warning even when we allow the process to continue. Ack. But I

Re: [PATCH] mm: Always print RLIMIT_DATA warning

On Tue, Feb 6, 2018 at 7:45 PM, David Woodhouse wrote: > The documentation for ignore_rlimit_data says that it will print a warning > at first misuse. Yet it doesn't seem to do that. Fix the code to print > the warning even when we allow the process to continue. Ack. But I think this was a

Re: [RFC PATCH v1 12/13] mm: split up release_pages into non-sentinel and sentinel passes

On 02/02/2018 12:00 PM, Laurent Dufour wrote: On 02/02/2018 15:40, Laurent Dufour wrote: On 01/02/2018 00:04, daniel.m.jor...@oracle.com wrote: A common case in release_pages is for the 'pages' list to be in roughly the same order as they are in their LRU. With LRU batch locking, when a

Re: [RFC PATCH v1 12/13] mm: split up release_pages into non-sentinel and sentinel passes

On 02/02/2018 12:00 PM, Laurent Dufour wrote: On 02/02/2018 15:40, Laurent Dufour wrote: On 01/02/2018 00:04, daniel.m.jor...@oracle.com wrote: A common case in release_pages is for the 'pages' list to be in roughly the same order as they are in their LRU. With LRU batch locking, when a

Re: [PATCH v1 0/1] spi_ks8995: use regmap to access chip registers.

On 02/06/2018 09:05 AM, Andrew Lunn wrote: > On Tue, Feb 06, 2018 at 11:58:17AM -0500, Sven Van Asbroeck wrote: >> On Tue, Feb 6, 2018 at 11:50 AM, Andrew Lunn wrote: >>> And a DSA driver does not need to be complex. You can start simple, >>> and add more features later. >> >> I

Re: [PATCH v1 0/1] spi_ks8995: use regmap to access chip registers.

On 02/06/2018 09:05 AM, Andrew Lunn wrote: > On Tue, Feb 06, 2018 at 11:58:17AM -0500, Sven Van Asbroeck wrote: >> On Tue, Feb 6, 2018 at 11:50 AM, Andrew Lunn wrote: >>> And a DSA driver does not need to be complex. You can start simple, >>> and add more features later. >> >> I see. Would it be

[PATCH 2/2] mtd: nand: gpmi: add support for specific ECC strength

Add support for specified ECC strength/size using device tree properties nand-ecc-strength/nand-ecc-step-size. Signed-off-by: Stefan Agner --- .../devicetree/bindings/mtd/gpmi-nand.txt | 5 drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 29

[PATCH 2/2] mtd: nand: gpmi: add support for specific ECC strength

Add support for specified ECC strength/size using device tree properties nand-ecc-strength/nand-ecc-step-size. Signed-off-by: Stefan Agner --- .../devicetree/bindings/mtd/gpmi-nand.txt | 5 drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 29 ++ 2 files

[PATCH 1/2] dt-bindings: mtd: gpmi-nand: specify fsl,use-minimum-ecc behavior

The dt property fsl,use-minimum-ecc requires a NAND chip to provide a ECC strength/step size, otherwise the driver fails to probe. This is by design to avoid that the driver uses a fallback and later changes ECC parameters due to additionion of a NAND chip driver. Document the current behavior.

[PATCH 1/2] dt-bindings: mtd: gpmi-nand: specify fsl,use-minimum-ecc behavior

The dt property fsl,use-minimum-ecc requires a NAND chip to provide a ECC strength/step size, otherwise the driver fails to probe. This is by design to avoid that the driver uses a fallback and later changes ECC parameters due to additionion of a NAND chip driver. Document the current behavior.

Re: [RFC PATCH v1 13/13] mm: splice local lists onto the front of the LRU

On 02/02/2018 12:21 AM, Aaron Lu wrote: On Wed, Jan 31, 2018 at 06:04:13PM -0500, daniel.m.jor...@oracle.com wrote: Now that release_pages is scaling better with concurrent removals from the LRU, the performance results (included below) showed increased contention on lru_lock in the add-to-LRU

Re: [RFC PATCH v1 13/13] mm: splice local lists onto the front of the LRU

On 02/02/2018 12:21 AM, Aaron Lu wrote: On Wed, Jan 31, 2018 at 06:04:13PM -0500, daniel.m.jor...@oracle.com wrote: Now that release_pages is scaling better with concurrent removals from the LRU, the performance results (included below) showed increased contention on lru_lock in the add-to-LRU

Re: [RESEND PATCH] sched/fair: consider RT/IRQ pressure in select_idle_sibling

On 02/05/2018 10:50 PM, Joel Fernandes wrote: On Wed, Jan 31, 2018 at 9:50 AM, Rohit Jain wrote: kernel/sched/fair.c | 38 -- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/kernel/sched/fair.c

Re: [RESEND PATCH] sched/fair: consider RT/IRQ pressure in select_idle_sibling

On 02/05/2018 10:50 PM, Joel Fernandes wrote: On Wed, Jan 31, 2018 at 9:50 AM, Rohit Jain wrote: kernel/sched/fair.c | 38 -- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index

Re: WARNING: bad usercopy in put_cmsg

On Tue, Feb 6, 2018 at 6:31 PM, syzbot wrote: > Hello, > > syzbot hit the following crash on upstream commit > e237f98a9c134c3d600353f21e07db915516875b (Mon Feb 5 21:35:56 2018 +) > Merge tag 'xfs-4.16-merge-5' of >

Re: WARNING: bad usercopy in put_cmsg

On Tue, Feb 6, 2018 at 6:31 PM, syzbot wrote: > Hello, > > syzbot hit the following crash on upstream commit > e237f98a9c134c3d600353f21e07db915516875b (Mon Feb 5 21:35:56 2018 +) > Merge tag 'xfs-4.16-merge-5' of > git://git.kernel.org/pub/scm/fs/xfs/xfs-linux > > So far this crash happened

[PATCH 2/9] KVM: nVMX: mark vmcs12 pages dirty on L2 exit

From: David Matlack The host physical addresses of L1's Virtual APIC Page and Posted Interrupt descriptor are loaded into the VMCS02. The CPU may write to these pages via their host physical address while L2 is running, bypassing address-translation-based dirty tracking

[PATCH 2/9] KVM: nVMX: mark vmcs12 pages dirty on L2 exit

From: David Matlack The host physical addresses of L1's Virtual APIC Page and Posted Interrupt descriptor are loaded into the VMCS02. The CPU may write to these pages via their host physical address while L2 is running, bypassing address-translation-based dirty tracking (e.g. EPT write

[PATCH 6/9] KVM/x86: Add IBPB support

From: Ashok Raj The Indirect Branch Predictor Barrier (IBPB) is an indirect branch control mechanism. It keeps earlier branches from influencing later ones. Unlike IBRS and STIBP, IBPB does not define a new mode of operation. It's a command that ensures predicted branch

[PATCH 6/9] KVM/x86: Add IBPB support

From: Ashok Raj The Indirect Branch Predictor Barrier (IBPB) is an indirect branch control mechanism. It keeps earlier branches from influencing later ones. Unlike IBRS and STIBP, IBPB does not define a new mode of operation. It's a command that ensures predicted branch targets aren't used

[PATCH 4/9] KVM: VMX: introduce alloc_loaded_vmcs

From: Paolo Bonzini Group together the calls to alloc_vmcs and loaded_vmcs_init. Soon we'll also allocate an MSR bitmap there. Cc: sta...@vger.kernel.org # prereq for Spectre mitigation Signed-off-by: Paolo Bonzini (cherry picked from commit

[PATCH 4/9] KVM: VMX: introduce alloc_loaded_vmcs

From: Paolo Bonzini Group together the calls to alloc_vmcs and loaded_vmcs_init. Soon we'll also allocate an MSR bitmap there. Cc: sta...@vger.kernel.org # prereq for Spectre mitigation Signed-off-by: Paolo Bonzini (cherry picked from commit f21f165ef922c2146cc5bdc620f542953c41714b)

Re: [RESEND PATCH] sched/fair: consider RT/IRQ pressure in select_idle_sibling

On 02/05/2018 10:42 PM, Joel Fernandes wrote: On Tue, Jan 30, 2018 at 11:47 AM, Rohit Jain wrote: [...] @@ -6102,7 +6107,8 @@ static int select_idle_core(struct task_struct *p, struct sched_domain *sd, int */ static int select_idle_smt(struct task_struct *p,

Re: [RESEND PATCH] sched/fair: consider RT/IRQ pressure in select_idle_sibling

On 02/05/2018 10:42 PM, Joel Fernandes wrote: On Tue, Jan 30, 2018 at 11:47 AM, Rohit Jain wrote: [...] @@ -6102,7 +6107,8 @@ static int select_idle_core(struct task_struct *p, struct sched_domain *sd, int */ static int select_idle_smt(struct task_struct *p, struct sched_domain *sd,

[PATCH 2/2] HID: asus: Return an error code only as a constant in asus_start_multitouch()

From: Markus Elfring Date: Tue, 6 Feb 2018 18:18:50 +0100 Return an error code without storing it in an intermediate variable. Signed-off-by: Markus Elfring --- drivers/hid/hid-asus.c | 6 ++ 1 file changed, 2 insertions(+), 4

[PATCH 2/2] HID: asus: Return an error code only as a constant in asus_start_multitouch()

From: Markus Elfring Date: Tue, 6 Feb 2018 18:18:50 +0100 Return an error code without storing it in an intermediate variable. Signed-off-by: Markus Elfring --- drivers/hid/hid-asus.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/hid/hid-asus.c

[PATCH 1/9] KVM: nVMX: vmx_complete_nested_posted_interrupt() can't fail

From: David Hildenbrand vmx_complete_nested_posted_interrupt() can't fail, let's turn it into a void function. Signed-off-by: David Hildenbrand Signed-off-by: Paolo Bonzini (cherry picked from commit

[PATCH 1/9] KVM: nVMX: vmx_complete_nested_posted_interrupt() can't fail

From: David Hildenbrand vmx_complete_nested_posted_interrupt() can't fail, let's turn it into a void function. Signed-off-by: David Hildenbrand Signed-off-by: Paolo Bonzini (cherry picked from commit 6342c50ad12e8ce0736e722184a7dbdea4a3477f) Signed-off-by: David Woodhouse ---

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