This patch updates the vmmc-supply properties on the mmc0 and mmc2
node to use the allready existent regulators.
We can now remove the sunxi-common-regulators.dtsi include since we
don't need it anymore.
Signed-off-by: Philipp Rossak
---
This patch updates the vmmc-supply properties on the mmc0 and mmc2
node to use the allready existent regulators.
We can now remove the sunxi-common-regulators.dtsi include since we
don't need it anymore.
Signed-off-by: Philipp Rossak
---
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 5
This patchseries fixes the bananapi m1 devicetree, to be able to boot again.
The first two patches update/improve the devicetree and the last patch adds
all missing regulators.
Regards,
Philipp
Philipp Rossak (3):
arm: dts: sun6i: a31s: bpi-m2: update mmc supply nodes
arm: dts: sun6i: a31s:
This patch fixes a bootproblem with the Bananapi M2 board. Since there
are some regulators missing we add them right now. Those values come
from the schematic, below you can find a small overview:
* reg_aldo1: 3,3V, powers the wifi
* reg_aldo2: 2,5V, powers the IO of the RTL8211E
* reg_aldo3:
The eldoin is supplied from the dcdc1 regulator. The N_VBUSEN pin is
connected to an external power regulator (SY6280AAC).
With this commit we update the pmic binding properties to support
those features.
Signed-off-by: Philipp Rossak
---
This patchseries fixes the bananapi m1 devicetree, to be able to boot again.
The first two patches update/improve the devicetree and the last patch adds
all missing regulators.
Regards,
Philipp
Philipp Rossak (3):
arm: dts: sun6i: a31s: bpi-m2: update mmc supply nodes
arm: dts: sun6i: a31s:
This patch fixes a bootproblem with the Bananapi M2 board. Since there
are some regulators missing we add them right now. Those values come
from the schematic, below you can find a small overview:
* reg_aldo1: 3,3V, powers the wifi
* reg_aldo2: 2,5V, powers the IO of the RTL8211E
* reg_aldo3:
The eldoin is supplied from the dcdc1 regulator. The N_VBUSEN pin is
connected to an external power regulator (SY6280AAC).
With this commit we update the pmic binding properties to support
those features.
Signed-off-by: Philipp Rossak
---
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 2 ++
On Fri, 2018-02-09 at 12:33 -0500, Steven Sistare wrote:
> On 2/9/2018 12:08 PM, Mike Galbraith wrote:
>
> > Shrug. It's bogus no mater what we do. Once Upon A Time, a cost
> > number was generated via measurement, but the end result was just as
> > bogus as a number pulled out of the ether.
On Fri, 2018-02-09 at 12:33 -0500, Steven Sistare wrote:
> On 2/9/2018 12:08 PM, Mike Galbraith wrote:
>
> > Shrug. It's bogus no mater what we do. Once Upon A Time, a cost
> > number was generated via measurement, but the end result was just as
> > bogus as a number pulled out of the ether.
On Fri, Feb 9, 2018 at 9:25 AM, Joerg Roedel wrote:
> From: Joerg Roedel
>
> When we populate a PGD entry, make sure we populate it in
> the user page-table too.
>
> Signed-off-by: Joerg Roedel
> ---
> arch/x86/include/asm/pgtable-3level.h | 7
On Fri, Feb 9, 2018 at 9:25 AM, Joerg Roedel wrote:
> From: Joerg Roedel
>
> When we populate a PGD entry, make sure we populate it in
> the user page-table too.
>
> Signed-off-by: Joerg Roedel
> ---
> arch/x86/include/asm/pgtable-3level.h | 7 +++
> 1 file changed, 7 insertions(+)
>
>
On Fri, Feb 9, 2018 at 9:25 AM, Joerg Roedel wrote:
> Hi,
>
> here is the second version of my PTI implementation for
> x86_32, based on tip/x86-pti-for-linus. It took a lot longer
> than I had hoped, but there have been a number of obstacles
> on the way. It also isn't the small
On Fri, Feb 9, 2018 at 9:25 AM, Joerg Roedel wrote:
> Hi,
>
> here is the second version of my PTI implementation for
> x86_32, based on tip/x86-pti-for-linus. It took a lot longer
> than I had hoped, but there have been a number of obstacles
> on the way. It also isn't the small patch-set
Hi gengdongjiu,
On 05/02/18 06:19, gengdongjiu wrote:
> On 2018/1/31 3:21, James Morse wrote:
>> On 24/01/18 20:06, gengdongjiu wrote:
On 06/01/18 16:02, Dongjiu Geng wrote:
> The ARM64 RAS SError Interrupt(SEI) syndrome value is specific to the
> guest and user space needs a way to
Hi gengdongjiu,
On 05/02/18 06:19, gengdongjiu wrote:
> On 2018/1/31 3:21, James Morse wrote:
>> On 24/01/18 20:06, gengdongjiu wrote:
On 06/01/18 16:02, Dongjiu Geng wrote:
> The ARM64 RAS SError Interrupt(SEI) syndrome value is specific to the
> guest and user space needs a way to
On Fri, Feb 9, 2018 at 5:05 PM, Linus Torvalds
wrote:
> On Fri, Feb 9, 2018 at 1:25 AM, Joerg Roedel wrote:
>> +
>> + /* Copy over the stack-frame */
>> + cld
>> + rep movsb
>
> Ugh. This is going to be horrendous. Maybe not
On Fri, Feb 9, 2018 at 5:05 PM, Linus Torvalds
wrote:
> On Fri, Feb 9, 2018 at 1:25 AM, Joerg Roedel wrote:
>> +
>> + /* Copy over the stack-frame */
>> + cld
>> + rep movsb
>
> Ugh. This is going to be horrendous. Maybe not noticeable on modern
> CPU's, but the whole 32-bit
On Fri, Feb 9, 2018 at 9:25 AM, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Move it out of the X86_64 specific processor defines so
> that its visible for 32bit too.
>
> Signed-off-by: Joerg Roedel
Reviewed-by: Andy Lutomirski
On Fri, Feb 9, 2018 at 9:25 AM, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Move it out of the X86_64 specific processor defines so
> that its visible for 32bit too.
>
> Signed-off-by: Joerg Roedel
Reviewed-by: Andy Lutomirski
We want to add support for ads1118 which uses SPI interface.
In order to do that we first refactor existing code into a core
part (bus independent) and an I2C part for current supported
devices.
Next patch will introduce support for ADS1118 which uses
SPI bus for communication.
Cc: Daniel Baluta
We want to add support for ads1118 which uses SPI interface.
In order to do that we first refactor existing code into a core
part (bus independent) and an I2C part for current supported
devices.
Next patch will introduce support for ADS1118 which uses
SPI bus for communication.
Cc: Daniel Baluta
Change log:
v2 - v3
Andrew Morton's comments:
- Moved read of pgdat->first_deferred_pfn into
deferred_zone_grow_lock, thus got rid of READ_ONCE()/WRITE_ONCE()
- Replaced spin_lock() with spin_lock_irqsave() in
deferred_grow_zone
- Updated
Change log:
v2 - v3
Andrew Morton's comments:
- Moved read of pgdat->first_deferred_pfn into
deferred_zone_grow_lock, thus got rid of READ_ONCE()/WRITE_ONCE()
- Replaced spin_lock() with spin_lock_irqsave() in
deferred_grow_zone
- Updated
Quoting Leon Romanovsky :
On Fri, Feb 09, 2018 at 09:56:00AM -0600, Gustavo A. R. Silva wrote:
Quoting Leon Romanovsky :
> On Fri, Feb 09, 2018 at 07:36:49AM -0600, Gustavo A. R. Silva wrote:
> > Hi Leon,
> >
> > Quoting Leon Romanovsky :
>
Quoting Leon Romanovsky :
On Fri, Feb 09, 2018 at 09:56:00AM -0600, Gustavo A. R. Silva wrote:
Quoting Leon Romanovsky :
> On Fri, Feb 09, 2018 at 07:36:49AM -0600, Gustavo A. R. Silva wrote:
> > Hi Leon,
> >
> > Quoting Leon Romanovsky :
> >
> > > On Fri, Feb 09, 2018 at 12:37:02AM -0600,
On 2/9/2018 12:08 PM, Mike Galbraith wrote:
> On Fri, 2018-02-09 at 11:10 -0500, Steven Sistare wrote:
>> On 2/8/2018 10:54 PM, Mike Galbraith wrote:
>>> On Thu, 2018-02-08 at 14:19 -0800, Rohit Jain wrote:
This patch introduces the sysctl for sched_domain based migration costs.
These in
On 2/9/2018 12:08 PM, Mike Galbraith wrote:
> On Fri, 2018-02-09 at 11:10 -0500, Steven Sistare wrote:
>> On 2/8/2018 10:54 PM, Mike Galbraith wrote:
>>> On Thu, 2018-02-08 at 14:19 -0800, Rohit Jain wrote:
This patch introduces the sysctl for sched_domain based migration costs.
These in
On Fri, Feb 9, 2018 at 1:32 AM, Jani Nikula wrote:
>> + # miguel-style comment kludge, look for blank lines after
>> + # @parameter line to signify start of description
>
> The "miguel-style" always intrigued me, but its origin predates git
> history. Does
On Fri, Feb 9, 2018 at 1:32 AM, Jani Nikula wrote:
>> + # miguel-style comment kludge, look for blank lines after
>> + # @parameter line to signify start of description
>
> The "miguel-style" always intrigued me, but its origin predates git
> history. Does anyone know?
It came with the
On Fri, 2018-02-09 at 14:21 +0100, Oleksandr Natalenko wrote:
>
> In addition to this I think it should be worth considering CC'ing Greg
> to pull this fix into 4.15 stable tree.
This isn't one he can cherry-pick, some munging required, in which case
he usually wants a properly tested backport.
On Fri, 2018-02-09 at 14:21 +0100, Oleksandr Natalenko wrote:
>
> In addition to this I think it should be worth considering CC'ing Greg
> to pull this fix into 4.15 stable tree.
This isn't one he can cherry-pick, some munging required, in which case
he usually wants a properly tested backport.
Hi Wolfram,
On Tue, Jan 16, 2018 at 3:11 PM, Javier Martinez Canillas
wrote:
> Hello Dmitry,
>
> On 01/16/2018 02:55 PM, Dmitry Mastykin wrote:
>> On Sun, 3 Dec 2017 22:40:50 +0100, Javier Martinez Canillas
>> wrote:
>>
>>> The buses should honor the
Hi Wolfram,
On Tue, Jan 16, 2018 at 3:11 PM, Javier Martinez Canillas
wrote:
> Hello Dmitry,
>
> On 01/16/2018 02:55 PM, Dmitry Mastykin wrote:
>> On Sun, 3 Dec 2017 22:40:50 +0100, Javier Martinez Canillas
>> wrote:
>>
>>> The buses should honor the firmware interface used to register the
On Fri, 9 Feb 2018 10:47:58 -0500
Steven Rostedt wrote:
> Good catch!
>
> It should have been:
>
> return process_redirects(arg, val, buf);
Although I need to add this :-p
diff --git a/kernel/trace/trace_event_ftrace.c
b/kernel/trace/trace_event_ftrace.c
On Fri, 9 Feb 2018 10:47:58 -0500
Steven Rostedt wrote:
> Good catch!
>
> It should have been:
>
> return process_redirects(arg, val, buf);
Although I need to add this :-p
diff --git a/kernel/trace/trace_event_ftrace.c
b/kernel/trace/trace_event_ftrace.c
index
On Wed, Feb 07, 2018 at 03:05:26PM -0600, Alan Tull wrote:
> Setting drvdata is fine for DT based devices which have one manager,
> bridge, or region device per platform device. However, PCIe based
> devices may have multiple FPGA mgr/bridge/regions under one PCIe
> device. Without these
On Wed, Feb 07, 2018 at 03:05:26PM -0600, Alan Tull wrote:
> Setting drvdata is fine for DT based devices which have one manager,
> bridge, or region device per platform device. However, PCIe based
> devices may have multiple FPGA mgr/bridge/regions under one PCIe
> device. Without these
On 02/09/2018 06:05 PM, Linus Torvalds wrote:
On Fri, Feb 9, 2018 at 1:25 AM, Joerg Roedel wrote:
+
+ /* Copy over the stack-frame */
+ cld
+ rep movsb
Ugh. This is going to be horrendous. Maybe not noticeable on modern
CPU's, but the whole 32-bit code is
On 02/09/2018 06:05 PM, Linus Torvalds wrote:
On Fri, Feb 9, 2018 at 1:25 AM, Joerg Roedel wrote:
+
+ /* Copy over the stack-frame */
+ cld
+ rep movsb
Ugh. This is going to be horrendous. Maybe not noticeable on modern
CPU's, but the whole 32-bit code is kind of pointless
On 2/9/18 6:21 AM, Oleksandr Natalenko wrote:
> Hi.
>
> 08.02.2018 08:16, Paolo Valente wrote:
>>> Il giorno 07 feb 2018, alle ore 23:18, Jens Axboe ha
>>> scritto:
>>>
>>> On 2/7/18 2:19 PM, Paolo Valente wrote:
Commit 'a6a252e64914 ("blk-mq-sched: decide how to handle
On 2/9/18 6:21 AM, Oleksandr Natalenko wrote:
> Hi.
>
> 08.02.2018 08:16, Paolo Valente wrote:
>>> Il giorno 07 feb 2018, alle ore 23:18, Jens Axboe ha
>>> scritto:
>>>
>>> On 2/7/18 2:19 PM, Paolo Valente wrote:
Commit 'a6a252e64914 ("blk-mq-sched: decide how to handle flush rq
via
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On 02/09/2018 08:18 AM, Igor Stoppa wrote:
>
>
> On 05/02/18 00:34, Randy Dunlap wrote:
>> On 02/04/2018 08:47 AM, Igor Stoppa wrote:
>
> [...]
>
>> It would be good for a lot of this to be in a source file or the
>> pmalloc.rst documentation file instead of living only in the git repository.
On 02/09/2018 08:18 AM, Igor Stoppa wrote:
>
>
> On 05/02/18 00:34, Randy Dunlap wrote:
>> On 02/04/2018 08:47 AM, Igor Stoppa wrote:
>
> [...]
>
>> It would be good for a lot of this to be in a source file or the
>> pmalloc.rst documentation file instead of living only in the git repository.
On Fri, Feb 09, 2018 at 09:50:58AM +0800, jianchao.wang wrote:
>
> if we set NVME_REQ_CANCELLED and return BLK_EH_HANDLED as the RESETTING case,
> nvme_reset_work will hang forever, because no one could complete the entered
> requests.
Except it's no longer in the "RESETTING" case since you
On Fri, 2018-02-09 at 11:10 -0500, Steven Sistare wrote:
> On 2/8/2018 10:54 PM, Mike Galbraith wrote:
> > On Thu, 2018-02-08 at 14:19 -0800, Rohit Jain wrote:
> >> This patch introduces the sysctl for sched_domain based migration costs.
> >> These in turn can be used for performance tuning of
On Fri, Feb 09, 2018 at 09:50:58AM +0800, jianchao.wang wrote:
>
> if we set NVME_REQ_CANCELLED and return BLK_EH_HANDLED as the RESETTING case,
> nvme_reset_work will hang forever, because no one could complete the entered
> requests.
Except it's no longer in the "RESETTING" case since you
On Fri, 2018-02-09 at 11:10 -0500, Steven Sistare wrote:
> On 2/8/2018 10:54 PM, Mike Galbraith wrote:
> > On Thu, 2018-02-08 at 14:19 -0800, Rohit Jain wrote:
> >> This patch introduces the sysctl for sched_domain based migration costs.
> >> These in turn can be used for performance tuning of
On Fri, Feb 9, 2018 at 1:25 AM, Joerg Roedel wrote:
> +
> + /* Copy over the stack-frame */
> + cld
> + rep movsb
Ugh. This is going to be horrendous. Maybe not noticeable on modern
CPU's, but the whole 32-bit code is kind of pointless on a modern CPU.
At
On Fri, Feb 9, 2018 at 1:25 AM, Joerg Roedel wrote:
> +
> + /* Copy over the stack-frame */
> + cld
> + rep movsb
Ugh. This is going to be horrendous. Maybe not noticeable on modern
CPU's, but the whole 32-bit code is kind of pointless on a modern CPU.
At least use "rep
Add secure-reg-access on PPD device tree to enable PMU and
hardware counters for perf.
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx53-ppd.dts | 4
arch/arm/boot/dts/imx53.dtsi| 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff
Add secure-reg-access on PPD device tree to enable PMU and
hardware counters for perf.
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx53-ppd.dts | 4
arch/arm/boot/dts/imx53.dtsi| 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git
On i.MX53 it is necessary to set the DBG_EN bit in the
platform GPC register to enable access to PMU counters
other than the cycle counter.
Signed-off-by: Sebastian Reichel
---
arch/arm/mach-imx/mach-imx53.c | 41 -
1
Hi,
This improves perf on imx53 by adding support for enabling the Secure
Debug Enable Register (SDER) SUNIDEN bit. This unlocks new
functionality:
ppd before patchset# perf stat -e cycles,instructions sleep 1 2>&1 | grep
instructions
0 instructions #0.00
On i.MX53 it is necessary to set the DBG_EN bit in the
platform GPC register to enable access to PMU counters
other than the cycle counter.
Signed-off-by: Sebastian Reichel
---
arch/arm/mach-imx/mach-imx53.c | 41 -
1 file changed, 40 insertions(+), 1
Hi,
This improves perf on imx53 by adding support for enabling the Secure
Debug Enable Register (SDER) SUNIDEN bit. This unlocks new
functionality:
ppd before patchset# perf stat -e cycles,instructions sleep 1 2>&1 | grep
instructions
0 instructions #0.00
On Fri, Feb 09, 2018 at 05:30:55PM +0200, Andy Shevchenko wrote:
> On Fri, Feb 9, 2018 at 2:07 PM, Jonathan Neuschäfer
> wrote:
> > The Nintendo Wii's chipset (called "Hollywood") has a GPIO controller
> > that supports a configurable number of pins (up to 32), interrupts,
On Fri, Feb 09, 2018 at 05:30:55PM +0200, Andy Shevchenko wrote:
> On Fri, Feb 9, 2018 at 2:07 PM, Jonathan Neuschäfer
> wrote:
> > The Nintendo Wii's chipset (called "Hollywood") has a GPIO controller
> > that supports a configurable number of pins (up to 32), interrupts, and
> > some special
From: Archana Sathyakumar
Add device binding documentation for the PDC Interrupt controller on
QCOM SoC's like the SDM845. The interrupt-controller can be used to
sense edge low interrupts and wakeup interrupts when the GIC is
non-operational.
Cc:
From: Archana Sathyakumar
Add device binding documentation for the PDC Interrupt controller on
QCOM SoC's like the SDM845. The interrupt-controller can be used to
sense edge low interrupts and wakeup interrupts when the GIC is
non-operational.
Cc: devicet...@vger.kernel.org
Signed-off-by:
Changes since v5:
- Fixed comment style of SPDX
Changes since v4:
- Code clean up as suggested by Marc
On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
power domain that can be powered off when not needed. Interrupts that need to
be sensed even when the GIC is powered
>From : Archana Sathyakumar
The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an
interrupt controller along with other domain control functions to handle
interrupt related functions like handle falling edge or active low which
are not detected at the GIC
Changes since v5:
- Fixed comment style of SPDX
Changes since v4:
- Code clean up as suggested by Marc
On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
power domain that can be powered off when not needed. Interrupts that need to
be sensed even when the GIC is powered
>From : Archana Sathyakumar
The Power Domain Controller (PDC) on QTI SoCs like SDM845 houses an
interrupt controller along with other domain control functions to handle
interrupt related functions like handle falling edge or active low which
are not detected at the GIC and handle wakeup
On Fri, Feb 9, 2018 at 7:33 AM, David Binderman wrote:
> Hello there,
>
> linux-4.15/drivers/dma/ppc4xx/adma.c:3797]: (warning) Redundant assignment of
> 'adev->common.cap_mask' to itself.
>
> Source code is
>
>adev->common.cap_mask = adev->common.cap_mask;
>
>
On Fri, Feb 9, 2018 at 7:33 AM, David Binderman wrote:
> Hello there,
>
> linux-4.15/drivers/dma/ppc4xx/adma.c:3797]: (warning) Redundant assignment of
> 'adev->common.cap_mask' to itself.
>
> Source code is
>
>adev->common.cap_mask = adev->common.cap_mask;
>
> Suggest either remove the
On 02/09/2018 07:24 AM, Arnd Bergmann wrote:
gcc-8 points out that source and destination of the memcpy() are
always the same pointer, so the effect of memcpy() is undefined
here (its arguments must not overlap):
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c: In function
On 02/09/2018 07:24 AM, Arnd Bergmann wrote:
gcc-8 points out that source and destination of the memcpy() are
always the same pointer, so the effect of memcpy() is undefined
here (its arguments must not overlap):
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c: In function
On Fri, Feb 09, 2018 at 09:56:00AM -0600, Gustavo A. R. Silva wrote:
>
> Quoting Leon Romanovsky :
>
> > On Fri, Feb 09, 2018 at 07:36:49AM -0600, Gustavo A. R. Silva wrote:
> > > Hi Leon,
> > >
> > > Quoting Leon Romanovsky :
> > >
> > > > On Fri, Feb 09, 2018 at
On Fri, Feb 09, 2018 at 09:56:00AM -0600, Gustavo A. R. Silva wrote:
>
> Quoting Leon Romanovsky :
>
> > On Fri, Feb 09, 2018 at 07:36:49AM -0600, Gustavo A. R. Silva wrote:
> > > Hi Leon,
> > >
> > > Quoting Leon Romanovsky :
> > >
> > > > On Fri, Feb 09, 2018 at 12:37:02AM -0600, Gustavo A. R.
Hi Bartosz, all,
On Fri, Feb 9, 2018 at 8:22 AM, Bartosz Golaszewski wrote:
> 2018-01-08 3:17 GMT+01:00 David Lechner :
>> This adds platform-specific declarations for the PSC clocks on TI DA850/
>> OMAP-L138/AM18XX SoCs.
>>
>> Signed-off-by: David Lechner
Hi Bartosz, all,
On Fri, Feb 9, 2018 at 8:22 AM, Bartosz Golaszewski wrote:
> 2018-01-08 3:17 GMT+01:00 David Lechner :
>> This adds platform-specific declarations for the PSC clocks on TI DA850/
>> OMAP-L138/AM18XX SoCs.
>>
>> Signed-off-by: David Lechner
>> ---
>>
On 02/09/2018 07:24 AM, Arnd Bergmann wrote:
gcc-8 points out that source and destination of the memcpy() are
always the same pointer, so the effect of memcpy() is undefined
here (its arguments must not overlap):
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c: In function
On 02/09/2018 07:24 AM, Arnd Bergmann wrote:
gcc-8 points out that source and destination of the memcpy() are
always the same pointer, so the effect of memcpy() is undefined
here (its arguments must not overlap):
drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c: In function
On 04/02/18 23:37, Randy Dunlap wrote:
[...]
>> +reason, could neither be declared as constant, nor it could take advantage
>
> nor could it
ok
[...]
>> +Ex: A policy that is loaded from userspace.
>
> Either
>Example:
> or
>E.g.:
>
On 04/02/18 23:37, Randy Dunlap wrote:
[...]
>> +reason, could neither be declared as constant, nor it could take advantage
>
> nor could it
ok
[...]
>> +Ex: A policy that is loaded from userspace.
>
> Either
>Example:
> or
>E.g.:
>
On Fri, Feb 09, 2018 at 06:47:52AM -0800, Wanpeng Li wrote:
> From: Wanpeng Li
>
> Waiman Long mentioned that:
>
> Generally speaking, unfair lock performs well for VMs with a small
> number of vCPUs. Native qspinlock may perform better than pvqspinlock
> if there is
On Fri, Feb 09, 2018 at 06:47:52AM -0800, Wanpeng Li wrote:
> From: Wanpeng Li
>
> Waiman Long mentioned that:
>
> Generally speaking, unfair lock performs well for VMs with a small
> number of vCPUs. Native qspinlock may perform better than pvqspinlock
> if there is vCPU pinning and there
Nikita Leshenko writes:
> The patch looks correct, however I’m confused about why you consider
> this to be a bug in the guest rather than a bug in KVM.
>
> The spec for x2APIC states:
> "The support for Directed EOI capability can be detected by means of
> bit 24
Nikita Leshenko writes:
> The patch looks correct, however I’m confused about why you consider
> this to be a bug in the guest rather than a bug in KVM.
>
> The spec for x2APIC states:
> "The support for Directed EOI capability can be detected by means of
> bit 24 in the Local APIC Version
A couple of small stmmac irq fixes/cleanups.
Niklas Cassel (3):
net: stmmac: discard disabled flags in interrupt status register
net: stmmac: rename GMAC_INT_DEFAULT_MASK for dwmac4
net: stmmac: remove redundant enable of PMT irq
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 2
On Fri, Feb 09, 2018 at 04:08:14PM +0800, Wei Wang wrote:
> The PAGE_POISON macro is used in page_poison.c only, so avoid exporting
> it. Also remove the "mm/debug-pagealloc.c" related comment, which is
> obsolete.
>
> Signed-off-by: Wei Wang
> Cc: Andrew Morton
A couple of small stmmac irq fixes/cleanups.
Niklas Cassel (3):
net: stmmac: discard disabled flags in interrupt status register
net: stmmac: rename GMAC_INT_DEFAULT_MASK for dwmac4
net: stmmac: remove redundant enable of PMT irq
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 2
On Fri, Feb 09, 2018 at 04:08:14PM +0800, Wei Wang wrote:
> The PAGE_POISON macro is used in page_poison.c only, so avoid exporting
> it. Also remove the "mm/debug-pagealloc.c" related comment, which is
> obsolete.
>
> Signed-off-by: Wei Wang
> Cc: Andrew Morton
> Cc: Michal Hocko
> Cc:
GMAC_INT_DEFAULT_MASK is written to the interrupt enable register.
In previous versions of the IP (e.g. dwmac1000), this register was
instead an interrupt mask register.
To improve clarity and reflect reality, rename GMAC_INT_DEFAULT_MASK
to GMAC_INT_DEFAULT_ENABLE.
Signed-off-by: Niklas Cassel
GMAC_INT_DEFAULT_MASK is written to the interrupt enable register.
In previous versions of the IP (e.g. dwmac1000), this register was
instead an interrupt mask register.
To improve clarity and reflect reality, rename GMAC_INT_DEFAULT_MASK
to GMAC_INT_DEFAULT_ENABLE.
Signed-off-by: Niklas Cassel
For dwmac4, GMAC_INT_DEFAULT_ENABLE already includes
GMAC_INT_PMT_EN, so it is redundant to check if hw->pmt
is set, and if so, setting the bit again.
For dwmac1000, GMAC_INT_DEFAULT_MASK does not include
GMAC_INT_DISABLE_PMT, so it is redundant to check if
hw->pmt is set, and if so, clearing an
For dwmac4, GMAC_INT_DEFAULT_ENABLE already includes
GMAC_INT_PMT_EN, so it is redundant to check if hw->pmt
is set, and if so, setting the bit again.
For dwmac1000, GMAC_INT_DEFAULT_MASK does not include
GMAC_INT_DISABLE_PMT, so it is redundant to check if
hw->pmt is set, and if so, clearing an
The interrupt status register in both dwmac1000 and dwmac4 ignores
interrupt enable (for dwmac4) / interrupt mask (for dwmac1000).
Therefore, if we want to check only the bits that can actually trigger
an irq, we have to filter the interrupt status register manually.
Commit 0a764db10337 ("stmmac:
The interrupt status register in both dwmac1000 and dwmac4 ignores
interrupt enable (for dwmac4) / interrupt mask (for dwmac1000).
Therefore, if we want to check only the bits that can actually trigger
an irq, we have to filter the interrupt status register manually.
Commit 0a764db10337 ("stmmac:
2018-01-08 3:17 GMT+01:00 David Lechner :
> This adds platform-specific declarations for the PSC clocks on TI DA850/
> OMAP-L138/AM18XX SoCs.
>
> Signed-off-by: David Lechner
> ---
> drivers/clk/davinci/Makefile| 1 +
>
2018-01-08 3:17 GMT+01:00 David Lechner :
> This adds platform-specific declarations for the PSC clocks on TI DA850/
> OMAP-L138/AM18XX SoCs.
>
> Signed-off-by: David Lechner
> ---
> drivers/clk/davinci/Makefile| 1 +
> drivers/clk/davinci/psc-da850.c | 117
>
On Fri, Feb 9, 2018 at 6:21 AM, Arnd Bergmann wrote:
> On Fri, Feb 9, 2018 at 3:13 PM, David Laight wrote:
>> From: Arnd Bergmann
>>> Sent: 09 February 2018 12:58
>> ...
>>> However, aside from this driver, I wonder if we should be worried about
>>>
On Fri, Feb 9, 2018 at 6:21 AM, Arnd Bergmann wrote:
> On Fri, Feb 9, 2018 at 3:13 PM, David Laight wrote:
>> From: Arnd Bergmann
>>> Sent: 09 February 2018 12:58
>> ...
>>> However, aside from this driver, I wonder if we should be worried about
>>> Spectre type 1 attacks on similar code, when
Neither clang nor GCC like this very much with -m32:
long long ret;
asm ("movb $5, %0" : "=q" (ret));
However, GCC can tolerate this variant:
long long ret;
switch (sizeof(ret)) {
case 1:
asm ("movb $5, %0" : "=q" (ret));
case 8:
Neither clang nor GCC like this very much with -m32:
long long ret;
asm ("movb $5, %0" : "=q" (ret));
However, GCC can tolerate this variant:
long long ret;
switch (sizeof(ret)) {
case 1:
asm ("movb $5, %0" : "=q" (ret));
case 8:
On 05/02/18 00:34, Randy Dunlap wrote:
> On 02/04/2018 08:47 AM, Igor Stoppa wrote:
[...]
> It would be good for a lot of this to be in a source file or the
> pmalloc.rst documentation file instead of living only in the git repository.
This is actually about genalloc. The genalloc
On 05/02/18 00:34, Randy Dunlap wrote:
> On 02/04/2018 08:47 AM, Igor Stoppa wrote:
[...]
> It would be good for a lot of this to be in a source file or the
> pmalloc.rst documentation file instead of living only in the git repository.
This is actually about genalloc. The genalloc
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